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machine: stm32l0x1,l0x2: TIM: adapt to 32-bit register access

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Recent changes in stm32-svd result in a change from previous
16-bit register access to 32-bit access.
Both access types are allowed, according to the register manuals.
This commit is contained in:
Michael Teichgräber
2026-02-23 17:01:16 +01:00
committed by deadprogram
parent 46a2a177c1
commit 88a68eaf7e
2 changed files with 4 additions and 4 deletions
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src/machine/machine_stm32l0x1.go
+2 -2
View File
@@ -188,8 +188,8 @@ func (t *TIM) enableMainOutput() {
// nothing to do - no BDTR register
}
type arrtype = uint16
type arrRegType = volatile.Register16
type arrtype = uint32
type arrRegType = volatile.Register32
const (
ARR_MAX = 0x10000
src/machine/machine_stm32l0x2.go
+2 -2
View File
@@ -245,8 +245,8 @@ func (t *TIM) enableMainOutput() {
// nothing to do - no BDTR register
}
type arrtype = uint16
type arrRegType = volatile.Register16
type arrtype = uint32
type arrRegType = volatile.Register32
const (
ARR_MAX = 0x10000