ws2812: add nrf52 support, update timings for m0 and avr

This commit adds support for the nrf52, which is a Cortex-M4 running at
64MHz.
While implementing this, I discovered that the timings for AVR/16MHz and
Cortex-M0 at 16MHz weren't quite right. They do work, but were slightly
out of spec. So I fixed this as well.
This commit is contained in:
Ayke van Laethem
2019-02-13 15:16:50 +01:00
committed by Ron Evans
parent 1475a63798
commit 4ff437e5d4
3 changed files with 132 additions and 12 deletions
+15 -9
View File
@@ -15,23 +15,29 @@ func (d Device) WriteByte(c byte) error {
portSet, maskSet := d.Pin.PortMaskSet()
portClear, maskClear := d.Pin.PortMaskClear()
// See:
// https://wp.josh.com/2014/05/13/ws2812-neopixels-are-not-so-finicky-once-you-get-to-know-them/
// T0H: 4 cycles or 250ns
// T0L: 14 cycles or 875ns -> together 18 cycles or 1125ns
// T1H: 10 cycles or 625ns
// T1H: 8 cycles or 500ns -> together 18 cycles or 1125ns
value := uint32(c) << 24
arm.AsmFull(`
send_bit:
str {maskSet}, {portSet}
lsls {value}, #1
bcs.n skip_store
str {maskClear}, {portClear}
str {maskSet}, {portSet} @ [2] T0H and T0L start here
lsls {value}, #1 @ [1]
bcs.n skip_store @ [1/3]
str {maskClear}, {portClear} @ [2] T0H -> T0L transition
skip_store:
nop @ [4]
nop
nop
nop
str {maskClear}, {portClear} @ [2] T1H -> T1L transition
nop @ [2]
nop
nop
nop
str {maskClear}, {portClear}
subs {i}, #1
bne.n send_bit
subs {i}, #1 @ [1]
bne.n send_bit @ [1/3]
`, map[string]interface{}{
"value": value,
"i": 8,