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23 Commits

Author SHA1 Message Date
stafur 56adca3bf6 Resolved root cause for loss of bluetooth functionality and added more testing options (#3049)
* Added PRO button to analog_audio.cpp for debugging metallic ringing sounds in Audio app. Ensured consitency to 4MHz in analog_audio.cpp

* Restored blutooth after loss.

* Added several sampling rates to analog_audio for testing.

* Ran format-code.sh

* Fixed 0x03 mode for DC/Q-INV/Q-SHFT being set at every tuning and sample rate change. This was the root cause for loss of bluetooth before. Sample rate, and frequency can now be changed without need for manually resetting DC/Q-INV/Q-SHIFT settings. Updated method for setting frequncies in praline so that we have more testing options.

* Ran format-code.sh and cleaned up stale comments.

* Addressed comments, and removed commented line, opting for higher register values, 5E and 5D. Added WFM Debug View to support testing demodulation ringing.

* Addressed comments in PR conversation to clean comments and ensure consistency at initializtion accross updated methods and displays.

* Ran format-code.sh
2026-02-26 11:16:07 -05:00
stafur cd7c412aa4 Improve low band signal reception (FM Radio Station Audio tests) (#3048)
* Added PRO button to analog_audio.cpp for debugging metallic ringing sounds in Audio app. Ensured consitency to 4MHz in analog_audio.cpp

* Restored blutooth after loss.

* Added several sampling rates to analog_audio for testing.

* Ran format-code.sh
2026-02-25 03:29:21 -05:00
gullradriel 16c4c28584 fix guru in level / scanner / recon app (#3047)
* fix guru
* fix potential guru
* added information for the sudden return
2026-02-25 01:28:16 +01:00
Totoo 10d17fa7ce Fix device locking in grid item selection callback (#3044) 2026-02-24 16:32:05 +01:00
Totoo e63f54c0a2 Fixes (#3032) 2026-02-24 11:23:41 +01:00
stafur b09efb4d3c Mixer lock:: update clocks and move fpga_bridge_init to portapack.cpp (#3039)
* Updated harckrf_gpio methods to more closely reflect hackrf_usb. Added some ui debug updates to RFFC5072 Status View.

* Updated tuning tables for tuning.cpp. Remnoved 15MHz lower limit in max2831.cpp since lower bandwidths don't seem to be causing lower band issues. Added more opportunities for clocks to stabalize at startup in board.cpp. Added/amended UI to help with addresssing low band tuning issues. Cleaned up stale comments in radio.cpp.

* Ran format-code.sh

* Updated to remove commented lines as part of clean up addressing review comments.

* Fixed clock_manager.cpp configruation for praline. Praline hackrf pro should have: CLK4: 6mA, Invert RFFC5072 40MHz ref and CLK5: 4mA, Invert MAX2831 40MHz ref. Improvements should be visible in the watefall at 2.4GHz, and between 2.311 and 2.599GHz.

* After reviewin clock config, updated values to reflect: CLK0 MAX5864 (ADC) 40 MHz 4mA Normal Integer Minimizes sampling jitter for SNR. CLK1 iCE40 FPGA 40 MHz 6mA Normal Integer Stable timing for the SPI bridge. CLK2 LPC43xx MCU 40 MHz 4mA Normal Integer Standard reference for MCU PLL. CLK3 SMA Port P1 10 MHz 8mA Normal Integer Cleanest square wave for Ext Ref. CLK4 RFFC5072 (Mixer) 40 MHz 6mA Inverted Integer Crucial for PLL Lock stability. CLK5 MAX2831 (TRX) 40 MHz 4mA Inverted Integer Reduces phase noise in the 2.4GHz LO. CLK6 SMA Port P2 10 MHz 8mA Normal Integer Sync output for external gear. CLK7 Reserved Off N/A N/A N/A Disabled to save power/reduce EMI.

* Ran format-code.sh

* Moved fpga_brdige_init to portapack.cpp. This more closely resembles how hackrf_usb starts initializes the fpga, and allows time for the clocks to stabilize and facilitate locking to support low band tuning.

* Ran format-code.sh

* Added ProRadio Debug display to check for / debug locking.

* Moved fpga_bridge_init before radio_init in portapack.cpp

* Low band can now see signals. Updated clock_manager, rffc507 and portapack.cpp to ensure fpga intialized correctly. Ensures rffc507x.cpp has correct 40MHz reference frequency, prescaler, and synth configuration.

* Updated radio to add q-invert on, dc-block on, and deimation=3 (8x, for 20 -> 2.5 MHz decimation for testing cleaner low band signals.

* Ran format-code.sh
2026-02-24 03:36:55 -05:00
gullradriel bfbbacd43c Update hackrf submodule (#3034)
* fix warnings

* update hackrf submodule
2026-02-24 00:41:59 +01:00
Sandbox 065d01b591 Move POCSAG Tx to Ext. (#3033)
* Disable POCSAG TX in menu

Comment out POCSAG TX related code in ui_navigation.cpp

* Comment out ui_pocsag_tx.cpp in CMakeLists

Comment out the ui_pocsag_tx.cpp file in CMakeLists.

* Move POCSAG Tx to Ext.

* Update external.cmake

* Delete firmware/application/apps/ui_pocsag_tx.hpp

* Delete firmware/application/apps/ui_pocsag_tx.cpp

* Update main.cpp

* Update main.cpp

* Update external.ld

* fix namespace

* deleted commented out entry

* delete commented entries

* fix: correct baseband for pocsag tx

* run prepared

---------

Co-authored-by: gullradriel <gullradriel@users.noreply.github.com>
2026-02-23 21:37:03 +01:00
stafur b197a4b1de Update to CLK4 and CLK5 configuration for PRALINE. (#3031)
* Updated harckrf_gpio methods to more closely reflect hackrf_usb. Added some ui debug updates to RFFC5072 Status View.

* Updated tuning tables for tuning.cpp. Remnoved 15MHz lower limit in max2831.cpp since lower bandwidths don't seem to be causing lower band issues. Added more opportunities for clocks to stabalize at startup in board.cpp. Added/amended UI to help with addresssing low band tuning issues. Cleaned up stale comments in radio.cpp.

* Ran format-code.sh

* Updated to remove commented lines as part of clean up addressing review comments.

* Fixed clock_manager.cpp configruation for praline. Praline hackrf pro should have: CLK4: 6mA, Invert RFFC5072 40MHz ref and CLK5: 4mA, Invert MAX2831 40MHz ref. Improvements should be visible in the watefall at 2.4GHz, and between 2.311 and 2.599GHz.

* After reviewin clock config, updated values to reflect: CLK0 MAX5864 (ADC) 40 MHz 4mA Normal Integer Minimizes sampling jitter for SNR. CLK1 iCE40 FPGA 40 MHz 6mA Normal Integer Stable timing for the SPI bridge. CLK2 LPC43xx MCU 40 MHz 4mA Normal Integer Standard reference for MCU PLL. CLK3 SMA Port P1 10 MHz 8mA Normal Integer Cleanest square wave for Ext Ref. CLK4 RFFC5072 (Mixer) 40 MHz 6mA Inverted Integer Crucial for PLL Lock stability. CLK5 MAX2831 (TRX) 40 MHz 4mA Inverted Integer Reduces phase noise in the 2.4GHz LO. CLK6 SMA Port P2 10 MHz 8mA Normal Integer Sync output for external gear. CLK7 Reserved Off N/A N/A N/A Disabled to save power/reduce EMI.

* Ran format-code.sh
2026-02-22 21:31:46 -05:00
stafur 85eaa9d800 Updated praline low and high band tuning (#3030)
* Updated harckrf_gpio methods to more closely reflect hackrf_usb. Added some ui debug updates to RFFC5072 Status View.

* Updated tuning tables for tuning.cpp. Remnoved 15MHz lower limit in max2831.cpp since lower bandwidths don't seem to be causing lower band issues. Added more opportunities for clocks to stabalize at startup in board.cpp. Added/amended UI to help with addresssing low band tuning issues. Cleaned up stale comments in radio.cpp.

* Ran format-code.sh

* Updated to remove commented lines as part of clean up addressing review comments.
2026-02-23 13:40:49 +13:00
Sandbox 1ad092f341 ACARS Rx App using libacars (#3029)
* Using same decode as libacrars
* Enable ACARS RX
* indent + fix warning
* fixed CRC calculations, length validation, message print
Co-authored-by: gullradriel <gullradriel@users.noreply.github.com>
2026-02-22 21:29:20 +01:00
E.T. 0fe51fa7e3 Move flashsize.h to build directory to avoid conflicts when switching between different builds (#3021)
* Move flashsize.h to build directory to avoid conflicts when switching builds

plus small fix in praline image generation

* Update hackrf submodule to latest next

* fix fpga append comments

* Update firmware/CMakeLists.txt

Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>

* Update firmware/CMakeLists.txt

Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>

* remove ls dependency from build

---------

Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>
Co-authored-by: gullradriel <gullradriel@users.noreply.github.com>
2026-02-22 21:21:03 +01:00
Sandbox 4cc2ba690b Add 12k5 RXBW to NFM Mode (#3023)
* Add 12k5 option to NFM
* Updated freqman_db
* Add 12k5 RXBW to NFM
* Add 12k5 RXBW
* formating
2026-02-22 20:53:26 +01:00
gullradriel abee022000 update submodule, revert lz4 bufs M0/M4 allocation (#3022) 2026-02-21 19:54:48 +01:00
Totoo 430c8e5e79 Enhance ADSB details view with map trail functionality and update gro… (#3020)
* Enhance ADSB details view with map trail functionality and update ground speed calculation
2026-02-21 14:32:20 +01:00
stafur 7ea3eec016 Update to additional gpio definitions for praline (#3018)
* Initial commit and pr for HackRF Pro (praline) arch-port to mayhem-firmware. Please see https://github.com/portapack-mayhem/mayhem-firmware/issues/2957. Added flash specifics for -DBOARD=PRALINE. This firmware only builds with toolchain v9.2.1 if hackrf codebase has -B arm in firmware/hackrf_usb/CMakeLists.txt.

* Updated CMakeLists.txt per coordination with @HtoToo. For -DBOARD=PRALINE FLASH_MB_SIZE and FLASH_MB_LIMIT_SIZE are now 4. Removed praline specific variable for FLASH limits.

* Updated chibios-portapack's board.cpp to support initialization of the HachRF-Pro (praline) FPGA. Added append_fpga_bitstream.py tool to ensure that praline_fgpa.bin bitstream can be appended to -DBOARD=PRALINE produced firmware. In order to ensure successful execution of append_fpga_bitstream.py to append the fpga bitstream we should expect that the bistsream will be located at 0x180000 in flash. This requires that FLASH_MB_LIMIT_SIZE must be 1.5, and FLASH_BYTES_LIMIT_SIZE must be 1535 * 1024. If we want to allow more or less space for the base firmware image sans the fpga bitstream the location of the bistream must be moved to a location other than 0x180000.

* Updated location of praline_fpga.bin bitstream to 0x380000 to allow more room for firmware. Firmware now has 3.5MB, or 2MB more available than before as coordinated with @HTotoo.

* Expanded #ifndef PRALINE to include og and r9 gpio and pin setup as coordinated with @HTotoo.

* Added note for PRALINE FLASH_MB_LIMIT_SIZE and FLASH_BYTES_LIMIT_SIZE to explain why we are using the 3.5 and 3584 values respectively as coordinated with @HTotoo.

* Next round of modifications derived heavily, if not entirely  from work done by @banandana at https://github.com/Banandana/mayhem-firmware. This commit should power on the HackRF Pro (praline) display, power on the fpga, and enable gpio, and provide debug utilties. There is still a lot of work to be done to fully enable the new praline board with this build and firmware architectural porting effort. However, hackrf-one boards do not seem to be adversely impacted by the #ifdef PRALINE statements, and CMakeLists updates, as far as I have been able to test.

* Ran format-code.sh. Updates for this commit are only due to formatting. Tested builds and they seem to work as exptected.

* Addressed fixes in firmware/application and firmware/baseband. Stream now flows to capture and looking glass. Issues were related to thread management. Issues were originally addressed by @banandana.

* Ran format-code.sh to allow for consistency with autoamted clang checks.

* Update hackrf ref repo to mayhem-portapack-hackrf next from https://github.com/portapack-mayhem/hackrf

* Addressed format edits necessary to pass clang-format check.

* Starting addressing Si5351 Clocks for radio sampling. These updates correctly set the Si5351 clock at start up. There appears to be an issue during runtime when testing with RX Test Init, Capture and Looking glass.

* Updated clock_manager.cpp to restore correct function introduced by @banandana when testing with Rx Test Init.

* Switched to using decimation for setting the sample rate without changing the Si5351 clock. This assumes that for the praline board Si5351 CLK0 runs at fixed 8 MHz (constant) and the FPGA decimates to get the desired sample rate. For example, for a 1 MHz sample rate -> Si5351 outputs 8 MHz, FPGA decimates by 8. There is still more work needed here, and potential verification that this is the correct way to operate with this new archteitecture.

* After deliberating on hackrf_usb hackrf_core.c and radio.c, and reviewing firmware/application/hw/si5351.cpp the original approach of using the aproach detailed in hackrf_core.c sample_rate_frac_set() lines 580-582, via the implementation in firmware/application/hw/si5351.cpp seems like the best place to continue testing efforts.

* Tested at ~2.4GHz (2.3 - 2.5) with lookgin glass and was able to receive signals. Added a Signal Path debug app to test gains, and readio mode (receive/transmit).

* Added two debug apps for the RFFC507x. Status View and Tuning View. This helped debug some of the potential issues with tuning.

* update submodule

* format code

* Small touch up merging latest next and ensuring build for HackRF One.

* Fix ui addition of max2831 debug display.

* Reverted edits to re: firmware/baseband/sd_over_usb/scsi.c and firmware/application/portapack.cpp. Source now builds, had to pull latest hackrf submodule.

* Skipped detect hardware for praline board to avoid backscreen in HackRF Pro praline board.

* Added UI debug display for max2831 like the rffc507x. Added Filter Band display and Mixer status to Signal Path Status debug display.

* Added ability to set Q: INV, or Q:NOR in Signal Path Status Debug view for testing. Also added display entries for the FGPA Ctrl register fir debugging.

* Added System Diagnostics which allows testing sample rate, q-inv, and dc blk

* Corrected LP - GPIO4[8], and GPIO4[9] issue which was preventing RF Amp, and LPF from chaning state. HackRF Pro (praline) now correctly changes state of LPF and RF Amp as expected.

* Corrected LP - GPIO4[8], and GPIO4[9] issue which was preventing RF Amp, and LPF from chaning state. HackRF Pro (praline) now correctly changes state of LPF and RF Amp as expected.

* Added consistency for testing.

* Added ui to debug whether rffc5072 is locking correctly. Also addressed rf_amp fixed in on state, such that it may now be able to be toggled in HackRF Pro praline setups.

* Updated format to support automated tests.

* format code

* Updated rffc5072 status view in ui_debug to help with debugging. Made updated recommendtions for merge from PR comments. Made updates to ensure resetx isn't reconfigured for output in rffc507x.cpp.

* Ran ./format-code.sh

* Added reference comment that addresses debugging in PRALINE to detail that when the capture app was requesting 15 MHz, it matched 15100000 which resulted in the 8.5M setting. To get the actual 15M setting (22.6 MHz bandwidth), I had to force a request at least 22 MHz while debugging.

* Debugging tunning ENX and frequency locking in low band.

* Addressed pin differences between HackRF One and HackRF Pro (praline), resolved ENX configuration.

* Cirrected pins, and debugging tuning for low band. High band now goes past 2.7GHz into 3.3 GHz.

* Updated ui_debug to track ENX updates and support tracing which calls may be changing ENX.

* Removed clkin reference in ui_debug.cpp to allow space for more information about CLK0, CLK1, CLK4, and CLK5.

* Removed clkin reference in ui_debug.cpp to allow space for more information about CLK0, CLK1, CLK4, and CLK5.

* Ran format-code.sh

* Updated rffc507xx.cpp, and ensured hackrf submodule at f1dcd554.

---------

Co-authored-by: gullradriel <gullradriel@users.noreply.github.com>
2026-02-21 16:48:23 +13:00
Totoo eb524f7110 fix dino hiscore position (#3017) 2026-02-20 22:09:55 +01:00
Totoo 3413d71bb3 Refactor marker addition logic in ADSBRxView to eliminate shadow markers and optimize RAM usage (#3013) 2026-02-20 15:18:15 +01:00
E.T. c64dddf5cc Dockerize docu update (#3014) 2026-02-20 14:49:35 +01:00
Totoo 3d56bccd49 Fix sd_over_usb serial command (#3015) 2026-02-20 14:43:20 +01:00
gullradriel 705e4f125f Update submodule, fix warnings for PRALINE (#3012)
* update submodule
* remove pragma, remove unused variable
* fix bad external decl, signed vs unsigned comparison
* fix unused: display computed flags
* fix max2881 info mess
* code format
* fix gui positions
* use constexpr for min and max lo_frequencies
2026-02-20 11:08:41 +00:00
qwer123 363b27efe8 fix RX AUDIO baseband async error for PRALINE (#3010) 2026-02-20 10:35:19 +01:00
E.T. f8ed7489c9 update docker entrypoint to support setting build directory via -B or --workdir arguments (#3011) 2026-02-20 10:29:22 +01:00
80 changed files with 1941 additions and 658 deletions
-2
View File
@@ -83,5 +83,3 @@ venv/
# generated bitmap arr file
# TODO: generate bitmap during build, since we use python during build anyway, lemme know if this is a bad idea @zxkmm
/firmware/tools/bitmap.hpp
# flashsize is generated by cmake
/firmware/flashsize.h
-3
View File
@@ -58,9 +58,6 @@ else()
math(EXPR FLASH_BYTES_LIMIT_SIZE "${FLASH_MB_LIMIT_SIZE} * 1024 * 1024")
endif()
#generate h files
configure_file(flashsize.h.in ${CMAKE_CURRENT_SOURCE_DIR}/firmware/flashsize.h)
option(USE_CCACHE "Enable ccache, please keep an eye on this because sometimes it's not quite stable and generated unusable binary" OFF)
project(portapack-h1)
+5 -2
View File
@@ -15,8 +15,11 @@
# - Get a shell inside the build image to
# inspect problems: ./dockerize.sh shell
# - Give additional parameters to the container:
# ./dockerize.sh -j10
# ./dockerize.sh ninja -j10
# Additional parameters to make: ./dockerize.sh -j10
# Use ninja instead of make: ./dockerize.sh ninja -j10
# Addotopnal CMake parameters: ./dockerize.sh -DBOARD=PRALINE
# Change the default build directory: ./dockerize.sh -B build-alt
# (Alternatively --workdir works as well)
# - Use a different dockerfile:
# ./dockerize.sh build dockerfile-other
# - Use a different cpu architecture:
+33 -26
View File
@@ -48,43 +48,50 @@ if(NOT ${CMAKE_CXX_COMPILER_VERSION} VERSION_EQUAL ${EXPECTED_GCC_VERSION})
set(GCC_VERSION_MISMATCH 1)
endif()
#generate h files
configure_file(flashsize.h.in flashsize.h)
add_compile_options(-include ${CMAKE_CURRENT_BINARY_DIR}/flashsize.h)
add_subdirectory(application)
add_subdirectory(baseband)
add_subdirectory(standalone)
add_subdirectory(test)
# NOTE: Dependencies break if the .bin files aren't included in DEPENDS. WTF, CMake?
add_custom_command(
OUTPUT ${FIRMWARE_FILENAME}
COMMAND ${MAKE_SPI_IMAGE} ${application_BINARY_DIR}/application.bin ${baseband_BINARY_DIR}/baseband.img ${FIRMWARE_FILENAME} ${FLASH_BYTES_LIMIT_SIZE}
DEPENDS baseband application ${MAKE_SPI_IMAGE}
${baseband_BINARY_DIR}/baseband.img ${application_BINARY_DIR}/application.bin
VERBATIM
)
if(BOARD STREQUAL "PRALINE")
math(EXPR PRALINE_FINAL_SIZE "4 * 1024 * 1024")
set(PRALINE_FPGA_BIN ${CMAKE_CURRENT_SOURCE_DIR}/../hackrf/firmware/fpga/build/praline_fpga.bin)
set(APPEND_FPGA_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/tools/append_fpga_bitstream.py)
# NOTE: Dependencies break if the .bin files aren't included in DEPENDS. WTF, CMake?
add_custom_command(
OUTPUT ${FIRMWARE_FILENAME}
COMMAND ${MAKE_SPI_IMAGE} ${application_BINARY_DIR}/application.bin ${baseband_BINARY_DIR}/baseband.img ${FIRMWARE_FILENAME} ${FLASH_BYTES_LIMIT_SIZE}
# PRALINE: Append FPGA bitstream to firmware at offset 0x380000
# The base firmware is 3.5MB, FPGA bitstream gets appended at the end of it, final size is 4MB
COMMAND ${CMAKE_COMMAND} -E echo "Appending PRALINE FPGA bitstream to firmware..."
COMMAND python3 ${APPEND_FPGA_SCRIPT} ${FIRMWARE_FILENAME} ${PRALINE_FPGA_BIN} ${FIRMWARE_FILENAME}.tmp ${PRALINE_FINAL_SIZE}
COMMAND ${CMAKE_COMMAND} -E rename ${FIRMWARE_FILENAME}.tmp ${FIRMWARE_FILENAME}
DEPENDS baseband application ${MAKE_SPI_IMAGE}
${baseband_BINARY_DIR}/baseband.img ${application_BINARY_DIR}/application.bin
${PRALINE_FPGA_BIN} ${APPEND_FPGA_SCRIPT}
VERBATIM
)
else() # Sadly this part had to be duplicated (or at least I couldn't find a better way to do it)
# NOTE: Dependencies break if the .bin files aren't included in DEPENDS. WTF, CMake?
add_custom_command(
OUTPUT ${FIRMWARE_FILENAME}
COMMAND ${MAKE_SPI_IMAGE} ${application_BINARY_DIR}/application.bin ${baseband_BINARY_DIR}/baseband.img ${FIRMWARE_FILENAME} ${FLASH_BYTES_LIMIT_SIZE}
DEPENDS baseband application ${MAKE_SPI_IMAGE}
${baseband_BINARY_DIR}/baseband.img ${application_BINARY_DIR}/application.bin
VERBATIM
)
endif()
add_custom_target(
firmware
DEPENDS ${FIRMWARE_FILENAME} ${HACKRF_FIRMWARE_DFU_FILENAME} ${HACKRF_FIRMWARE_FILENAME}
)
# PRALINE: Append FPGA bitstream to firmware at offset 0x180000
# The base firmware is 1MB, FPGA goes at 1MB offset, final size is 2MB
if(BOARD STREQUAL "PRALINE")
math(EXPR PRALINE_FINAL_SIZE "4 * 1024 * 1024")
set(PRALINE_FPGA_BIN ${CMAKE_CURRENT_SOURCE_DIR}/../hackrf/firmware/fpga/build/praline_fpga.bin)
set(APPEND_FPGA_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/tools/append_fpga_bitstream.py)
add_custom_command(
TARGET firmware POST_BUILD
COMMAND ${CMAKE_COMMAND} -E echo "Appending PRALINE FPGA bitstream to firmware..."
COMMAND python3 ${APPEND_FPGA_SCRIPT} ${FIRMWARE_FILENAME} ${PRALINE_FPGA_BIN} ${FIRMWARE_FILENAME}.tmp ${PRALINE_FINAL_SIZE}
COMMAND ${CMAKE_COMMAND} -E rename ${FIRMWARE_FILENAME}.tmp ${FIRMWARE_FILENAME}
COMMAND ${CMAKE_COMMAND} -E echo "PRALINE firmware with FPGA bitstream created:"
COMMAND ls -la ${FIRMWARE_FILENAME}
COMMENT "Appending PRALINE FPGA bitstream"
VERBATIM
)
endif()
if(${GCC_VERSION_MISMATCH})
set(COMPILER_MISMATCH_MESSAGE "WARNING: Compiler version mismatch, please use the official compiler version ${EXPECTED_GCC_VERSION} when sharing builds! Current compiler version: ${CMAKE_CXX_COMPILER_VERSION}")
message(${COMPILER_MISMATCH_MESSAGE})
-1
View File
@@ -305,7 +305,6 @@ set(CPPSRC
apps/ui_mictx.cpp
apps/ui_modemsetup.cpp
apps/ui_playlist.cpp
apps/ui_pocsag_tx.cpp
apps/ui_rds.cpp
apps/ui_recon_settings.cpp
apps/ui_recon.cpp
+51 -1
View File
@@ -199,6 +199,33 @@ SPECOptionsView::SPECOptionsView(
view->set_spec_iq_phase_calibration_value(view->get_spec_iq_phase_calibration_value()); // initialize iq_phase_calibration in radio
}
/* PralineOptionsView *******************************************************/
#ifdef PRALINE
PralineOptionsView::PralineOptionsView(Rect parent_rect, const Style* style) {
set_parent_rect(parent_rect);
add_children({&label_sr, &options_sr, &label_dc, &options_dc,
&label_qi, &options_qi, &label_qs, &options_qs,
&label_dec, &options_dec});
options_sr.set_value(receiver_model.sampling_rate() / 1000);
options_dc.set_by_value(1);
options_qi.set_by_value(0);
options_qs.set_by_value(0);
options_dec.set_by_value(0);
options_sr.on_change = [this](int32_t v) { receiver_model.set_sampling_rate(static_cast<uint32_t>(v) * 1000); };
options_dc.on_change = [this](size_t, OptionsField::value_t v) { if (v) fpga_reg_1 |= 0x01; else fpga_reg_1 &= ~0x01; update_fpga_ctrl(); };
options_qi.on_change = [this](size_t, OptionsField::value_t v) { if (v) fpga_reg_1 |= 0x02; else fpga_reg_1 &= ~0x02; update_fpga_ctrl(); };
options_qs.on_change = [this](size_t, OptionsField::value_t v) { if (v) fpga_reg_1 |= 0x04; else fpga_reg_1 &= ~0x04; update_fpga_ctrl(); };
options_dec.on_change = [this](size_t, OptionsField::value_t v) { radio::debug::fpga::register_write(2, v); };
}
void PralineOptionsView::update_fpga_ctrl() {
radio::debug::fpga::register_write(1, fpga_reg_1);
}
#endif
/* AnalogAudioView *******************************************************/
AnalogAudioView::AnalogAudioView(
@@ -217,7 +244,14 @@ AnalogAudioView::AnalogAudioView(
&field_volume,
&text_ctcss,
&record_view,
&waterfall});
#ifdef PRALINE
&waterfall,
&button_pro
#else
&waterfall
#endif
});
// Filename Datetime and Frequency
record_view.set_filename_date_frequency(true);
@@ -256,6 +290,10 @@ AnalogAudioView::AnalogAudioView(
field_frequency.set_value(receiver_model.target_frequency() + offset);
};
#ifdef PRALINE
button_pro.on_select = [this](Button&) { this->on_show_options_praline(); };
#endif
audio::output::start();
// This call starts the correct baseband image to run
@@ -511,8 +549,13 @@ void AnalogAudioView::update_modulation(ReceiverModel::Mode modulation) {
const auto is_wideband_spectrum_mode = (modulation == ReceiverModel::Mode::SpectrumAnalysis);
receiver_model.set_modulation(modulation);
#ifdef PRALINE
receiver_model.set_sampling_rate(is_wideband_spectrum_mode ? spec_bw : 4000000);
receiver_model.set_baseband_bandwidth(is_wideband_spectrum_mode ? spec_bw / 2 : 2000000);
#else
receiver_model.set_sampling_rate(is_wideband_spectrum_mode ? spec_bw : 3072000);
receiver_model.set_baseband_bandwidth(is_wideband_spectrum_mode ? spec_bw / 2 : 1750000);
#endif
receiver_model.set_hidden_offset(modulation == ReceiverModel::Mode::AMAudioFMApt ? -2200 : 0); // wefax needs to be shifted, see wefax rx app.
@@ -553,4 +596,11 @@ void AnalogAudioView::handle_coded_squelch(uint32_t value) {
void AnalogAudioView::on_freqchg(int64_t freq) {
field_frequency.set_value(freq);
}
#ifdef PRALINE
void AnalogAudioView::on_show_options_praline() {
set_options_widget(std::make_unique<PralineOptionsView>(options_view_rect, Theme::getInstance()->option_active));
}
#endif
} /* namespace ui */
@@ -37,6 +37,41 @@ namespace ui {
class AnalogAudioView;
#ifdef PRALINE
class PralineOptionsView : public View {
public:
PralineOptionsView(Rect parent_rect, const Style* style);
private:
// Layout: SR (Sample Rate), DC (DC Block), QI (Q-Invert), QS (Quarter Shift), D (Decim)
Text label_sr{{UI_POS_X(0), UI_POS_Y(0), UI_POS_WIDTH(2), UI_POS_HEIGHT(1)}, "SR"};
// Parameters: Position, Length (in chars), Range, Step, and default value
NumberField options_sr{
{UI_POS_X(3), UI_POS_Y(0)},
5, // Number of digits to show
{0, 40000}, // Range: 0 to 40,000 kHz
1, // Step: 1 kHz
' ' // Fix: Single quotes for char
};
Text label_dc{{UI_POS_X(8), UI_POS_Y(0), UI_POS_WIDTH(2), UI_POS_HEIGHT(1)}, "DC"};
OptionsField options_dc{{UI_POS_X(11), UI_POS_Y(0)}, 2, {{"Of", 0}, {"On", 1}}};
Text label_qi{{UI_POS_X(14), UI_POS_Y(0), UI_POS_WIDTH(2), UI_POS_HEIGHT(1)}, "QI"};
OptionsField options_qi{{UI_POS_X(17), UI_POS_Y(0)}, 2, {{"Of", 0}, {"On", 1}}};
Text label_qs{{UI_POS_X(20), UI_POS_Y(0), UI_POS_WIDTH(2), UI_POS_HEIGHT(1)}, "QS"};
OptionsField options_qs{{UI_POS_X(23), UI_POS_Y(0)}, 2, {{"Of", 0}, {"On", 1}}};
Text label_dec{{UI_POS_X(26), UI_POS_Y(0), UI_POS_WIDTH(1), UI_POS_HEIGHT(1)}, "D"};
OptionsField options_dec{{UI_POS_X(28), UI_POS_Y(0)}, 2, {{" 1", 0}, {" 2", 1}, {" 4", 2}, {" 8", 3}, {"16", 4}}};
uint8_t fpga_reg_1{0x01}; // Tracks DC, QI, QS bits
void update_fpga_ctrl();
};
#endif
class AMOptionsView : public View {
public:
AMOptionsView(AnalogAudioView* view, Rect parent_rect, const Style* style);
@@ -222,6 +257,11 @@ class AnalogAudioView : public View {
uint8_t get_previous_zoom_option();
void set_previous_zoom_option(uint8_t zoom);
#ifdef PRALINE
Button button_pro{{UI_POS_X(12), UI_POS_Y(2), UI_POS_WIDTH(3), UI_POS_HEIGHT(1)}, "PRO"};
void on_show_options_praline();
#endif
private:
static constexpr ui::Dim header_height = 3 * 16;
+1
View File
@@ -199,6 +199,7 @@ void BLETxView::send_packet() {
generateRandomMacAddress(randomMac);
char advertisementData[63] = {0};
packets[current_packet].advertisementData[62] = '\0';
strcpy(advertisementData, packets[current_packet].advertisementData);
// TODO: Make this a checkbox.
+68 -9
View File
@@ -271,10 +271,17 @@ ADSBRxDetailsView::ADSBRxDetailsView(
&text_frame_pos_even,
&text_frame_pos_odd,
&button_aircraft_details,
&button_see_map});
&button_see_map,
&opt_map_list});
text_icao_address.set(entry_.icao_str);
opt_map_list.on_change = [this](size_t, uint32_t mf) {
map_filter = mf;
clear_map_markers(); // reset them
pos_history.clear(); // erase the trail
};
button_aircraft_details.on_select = [this, &nav](Button&) {
aircraft_details_view_ = nav.push<ADSBRxAircraftDetailsView>(entry_);
nav.set_on_pop([this]() {
@@ -288,7 +295,7 @@ ADSBRxDetailsView::ADSBRxDetailsView(
get_map_tag(entry_),
entry_.pos.altitude,
GeoPos::alt_unit::FEET,
GeoPos::spd_unit::HIDDEN,
GeoPos::spd_unit::KNOTS,
entry_.pos.latitude,
entry_.pos.longitude,
entry_.velo.heading);
@@ -312,8 +319,12 @@ void ADSBRxDetailsView::update(const AircraftRecentEntry& entry) {
// AC Details view is showing, nothing to update.
} else if (geomap_view_) {
// Map is showing, update the current item.
if (map_filter == 1) {
// add to map trail history
add_map_trail(entry);
}
geomap_view_->update_tag(get_map_tag(entry_));
geomap_view_->update_position(entry.pos.latitude, entry.pos.longitude, entry.velo.heading, entry.pos.altitude, entry.velo.speed);
geomap_view_->update_position(entry.pos.latitude, entry.pos.longitude, entry.velo.heading, entry.pos.altitude, entry.get_ground_speed());
} else {
// Details is showing, update details.
refresh_ui();
@@ -364,6 +375,51 @@ void ADSBRxDetailsView::get_altitude_color(int32_t alt_ft, uint8_t* r, uint8_t*
void ADSBRxDetailsView::clear_map_markers() {
if (geomap_view_)
geomap_view_->clear_markers();
if (map_filter == 1)
refresh_trail_markers(); // re add trail
}
void ADSBRxDetailsView::refresh_trail_markers() {
if (!geomap_view_)
return;
geomap_view_->clear_markers();
for (const auto& pos : pos_history) {
GeoMarker marker{};
marker.lon = pos.lon;
marker.lat = pos.lat;
marker.angle = pos.heading;
marker.tag = ""; // No tag for trail points
uint8_t r, g, b;
get_altitude_color(pos.altitude, &r, &g, &b);
marker.color = Color(r, g, b);
geomap_view_->store_marker(marker);
}
}
void ADSBRxDetailsView::add_map_trail(const AircraftRecentEntry& entry) {
if (!geomap_view_)
return;
if (entry.pos.pos_valid == false)
return;
if (!pos_history.empty()) {
const auto& last_pos = pos_history.back();
const float THRESH_DEG = 0.009f;
const float THRESH_SQ = THRESH_DEG * THRESH_DEG; // 0.00002025f
float d_lat = entry.pos.latitude - last_pos.lat;
float d_lon = entry.pos.longitude - last_pos.lon;
if ((d_lat * d_lat) + (d_lon * d_lon) < THRESH_SQ) {
return; // Moved less than ~1000m, skip (rough estimate, varies with latitude but good enough for our purposes). This prevents adding too many points when the plane is circling or taxiing.
}
}
// Only keep the last 30 positions in the trail.
if (pos_history.size() >= 30)
pos_history.erase(pos_history.begin());
pos_history.push_back({entry.pos.latitude, entry.pos.longitude, entry.velo.heading, entry.pos.altitude});
refresh_trail_markers();
}
bool ADSBRxDetailsView::add_map_marker(const AircraftRecentEntry& entry) {
@@ -371,6 +427,8 @@ bool ADSBRxDetailsView::add_map_marker(const AircraftRecentEntry& entry) {
if (!geomap_view_)
return false;
if (map_filter == 1) return false; // this is the 'only me' option, so skip all others
GeoMarker marker{};
marker.lon = entry.pos.longitude;
marker.lat = entry.pos.latitude;
@@ -695,14 +753,15 @@ void ADSBRxView::refresh_ui() {
// Process the entries list.
for (const auto& entry : recent) {
// Found the entry being shown in details view. Update it.
if (entry.key() == detail_key) {
if (entry.key() == detail_key) { // we don't add it to the markers, since this is the currently selected and shown in the middle one. This eliminates the "shadow" marker, and saves ram
details_view->update(entry);
current_updated = true;
}
// NB: current entry also gets a marker so it shows up if map is panned.
if (map_needs_update && entry.pos.pos_valid && entry.state <= ADSBAgeState::Recent) {
map_needs_update = details_view->add_map_marker(entry);
} else {
// Add others only
// NB: current entry also gets a marker so it shows up if map is panned.
if (map_needs_update && entry.pos.pos_valid && entry.state <= ADSBAgeState::Recent) {
map_needs_update = details_view->add_map_marker(entry);
}
}
// Any work left to do?
+69 -39
View File
@@ -64,9 +64,9 @@ namespace ui {
#define VEL_AIR_SUBSONIC 3
#define VEL_AIR_SUPERSONIC 4
#define O_E_FRAME_TIMEOUT 20 // timeout between odd and even frames
#define MARKER_UPDATE_SECONDS_OSM 10 // "other" map marker redraw interval for osm
#define MARKER_UPDATE_SECONDS_BIN 5 // "other" map marker redraw interval for bin map
#define O_E_FRAME_TIMEOUT 20 // timeout between odd and even frames
#define MARKER_UPDATE_SECONDS_OSM 8 // "other" map marker redraw interval for osm
#define MARKER_UPDATE_SECONDS_BIN 5 // "other" map marker redraw interval for bin map
/* Thresholds (in seconds) that define the transition between ages. */
struct ADSBAgeLimit {
@@ -150,6 +150,19 @@ struct AircraftRecentEntry {
age = 0;
}
int32_t get_ground_speed() const {
if (velo.valid == false) return 0;
if (velo.type == SPD_GND)
return velo.speed;
else if (velo.type == SPD_IAS) {
if (!pos.alt_valid) return velo.speed; // can't correct without altitude, so just return IAS
return (int32_t)(velo.speed * (1.0f + (0.02f * (pos.altitude / 1000.0f))));
} else if (velo.type == SPD_TAS)
return velo.speed; // We don't know the wind speed
else
return 0;
}
void inc_age(int delta) {
age += delta;
@@ -208,50 +221,50 @@ class ADSBRxAircraftDetailsView : public View {
private:
Labels labels{
{{UI_POS_X(0), 1 * 16}, "ICAO:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 2 * 16}, "Registration:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 3 * 16}, "Manufacturer:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 5 * 16}, "Model:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 7 * 16}, "Type:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 8 * 16}, "Number of engines:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 9 * 16}, "Engine type:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 11 * 16}, "Owner:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 13 * 16}, "Operator:", Theme::getInstance()->fg_light->foreground}};
{{UI_POS_X(0), UI_POS_Y(1)}, "ICAO:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(2)}, "Registration:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(3)}, "Manufacturer:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(5)}, "Model:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(7)}, "Type:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(8)}, "Number of engines:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(9)}, "Engine type:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(11)}, "Owner:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(13)}, "Operator:", Theme::getInstance()->fg_light->foreground}};
Text text_icao_address{
{5 * 8, 1 * 16, 6 * 8, UI_POS_HEIGHT(1)},
{UI_POS_X(5), UI_POS_Y(1), 6 * 8, UI_POS_HEIGHT(1)},
"-"};
Text text_registration{
{13 * 8, 2 * 16, 8 * 8, UI_POS_HEIGHT(1)},
{UI_POS_X(13), UI_POS_Y(2), 8 * 8, UI_POS_HEIGHT(1)},
"-"};
Text text_manufacturer{
{UI_POS_X(0), 4 * 16, 19 * 8, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(4), 19 * 8, UI_POS_HEIGHT(1)},
"-"};
Text text_model{
{UI_POS_X(0), 6 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(6), screen_width, UI_POS_HEIGHT(1)},
"-"};
Text text_type{
{5 * 8, 7 * 16, 22 * 8, UI_POS_HEIGHT(1)},
{UI_POS_X(5), UI_POS_Y(7), 22 * 8, UI_POS_HEIGHT(1)},
"-"};
Text text_number_of_engines{
{18 * 8, 8 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(18), UI_POS_Y(8), screen_width, UI_POS_HEIGHT(1)},
"-"};
Text text_engine_type{
{UI_POS_X(0), 10 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(10), screen_width, UI_POS_HEIGHT(1)},
"-"};
Text text_owner{
{UI_POS_X(0), 12 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(12), screen_width, UI_POS_HEIGHT(1)},
"-"};
Text text_operator{
{UI_POS_X(0), 14 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(14), screen_width, UI_POS_HEIGHT(1)},
"-"};
Button button_close{
@@ -276,6 +289,8 @@ class ADSBRxDetailsView : public View {
void clear_map_markers();
/* Adds a marker for the entry to the map. Returns true on success. */
bool add_map_marker(const AircraftRecentEntry& entry);
void add_map_trail(const AircraftRecentEntry& entry);
void refresh_trail_markers();
std::string title() const override { return "Details"; }
@@ -298,57 +313,72 @@ class ADSBRxDetailsView : public View {
// if removed from the recent entries list.
AircraftRecentEntry entry_{AircraftRecentEntry::invalid_key};
bool airline_checked{false};
uint8_t map_filter{0}; // 0: all, 1: only this, set by opt_map_list.
struct PosHistory {
float lat;
float lon;
uint16_t heading;
int32_t altitude;
};
std::vector<PosHistory> pos_history{};
Labels labels{
{{UI_POS_X(0), 1 * 16}, "ICAO:", Theme::getInstance()->fg_light->foreground},
{{13 * 8, 1 * 16}, "Callsign:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 2 * 16}, "Last seen:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 3 * 16}, "Airline:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 5 * 16}, "Country:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 13 * 16}, "Even position frame:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), 15 * 16}, "Odd position frame:", Theme::getInstance()->fg_light->foreground}};
{{UI_POS_X(0), UI_POS_Y(0)}, "ICAO:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(13), UI_POS_Y(0)}, "Callsign:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(1)}, "Last seen:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(2)}, "Airline:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(4)}, "Country:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(7)}, "Map filter:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(13)}, "Even position frame:", Theme::getInstance()->fg_light->foreground},
{{UI_POS_X(0), UI_POS_Y(15)}, "Odd position frame:", Theme::getInstance()->fg_light->foreground}};
Text text_icao_address{
{5 * 8, 1 * 16, 6 * 8, UI_POS_HEIGHT(1)},
{UI_POS_X(5), UI_POS_Y(0), 6 * 8, UI_POS_HEIGHT(1)},
"-"};
Text text_callsign{
{22 * 8, 1 * 16, 8 * 8, UI_POS_HEIGHT(1)},
{UI_POS_X(22), UI_POS_Y(0), 8 * 8, UI_POS_HEIGHT(1)},
"-"};
Text text_last_seen{
{11 * 8, 2 * 16, 19 * 8, UI_POS_HEIGHT(1)},
{UI_POS_X(11), UI_POS_Y(1), 19 * 8, UI_POS_HEIGHT(1)},
"-"};
Text text_airline{
{UI_POS_X(0), 4 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(3), screen_width, UI_POS_HEIGHT(1)},
"-"};
Text text_country{
{8 * 8, 5 * 16, 22 * 8, UI_POS_HEIGHT(1)},
{UI_POS_X(8), UI_POS_Y(4), 22 * 8, UI_POS_HEIGHT(1)},
"-"};
Text text_infos{
{UI_POS_X(0), 6 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(5), screen_width, UI_POS_HEIGHT(1)},
"-"};
Text text_info2{
{UI_POS_X(0), 7 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(6), screen_width, UI_POS_HEIGHT(1)},
"-"};
Text text_frame_pos_even{
{UI_POS_X(0), 14 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(14), screen_width, UI_POS_HEIGHT(1)},
"-"};
Text text_frame_pos_odd{
{UI_POS_X(0), 16 * 16, screen_width, UI_POS_HEIGHT(1)},
{UI_POS_X(0), UI_POS_Y(16), screen_width, UI_POS_HEIGHT(1)},
"-"};
Button button_aircraft_details{
{UI_POS_X_CENTER(12) - UI_POS_X(8), UI_POS_Y(9), UI_POS_WIDTH(12), UI_POS_HEIGHT(3)},
{UI_POS_X_CENTER(12) - UI_POS_X(8), UI_POS_Y(8), UI_POS_WIDTH(12), UI_POS_HEIGHT(3)},
"A/C details"};
OptionsField opt_map_list{
{UI_POS_X_CENTER(12) + UI_POS_X(8), UI_POS_Y(7)},
12,
{{"All", 0},
{"Only this", 1}}};
Button button_see_map{
{UI_POS_X_CENTER(12) + UI_POS_X(8), UI_POS_Y(9), UI_POS_WIDTH(12), UI_POS_HEIGHT(3)},
{UI_POS_X_CENTER(12) + UI_POS_X(8), UI_POS_Y(8), UI_POS_WIDTH(12), UI_POS_HEIGHT(3)},
"See on map"};
MessageHandlerRegistration message_handler_gps{
+561 -87
View File
@@ -46,6 +46,11 @@ using namespace portapack;
#include "irq_controls.hpp"
#ifdef PRALINE
#include "max2831.hpp"
using namespace max2831;
#endif
namespace ui {
/* DebugMemoryView *******************************************************/
@@ -510,6 +515,262 @@ void RadioDiagnosticsView::update_status() {
}
}
#ifdef PRALINE
PralineRadioDebugView::PralineRadioDebugView(NavigationView& nav) {
add_children({&text_title, &text_lbl_lock, &text_lock_status,
&text_lbl_clk5, &text_clk5_status,
&text_lbl_spi, &text_spi_status, &text_lbl_fpga_ctrl, &text_fpga_ctrl,
&text_lbl_vaa, &text_vaa_status, &text_status_msg,
&button_refresh, &button_toggle_clk5, &button_done});
button_refresh.on_select = [this](Button&) { this->refresh(); };
button_toggle_clk5.on_select = [this](Button&) { this->toggle_clk5(); };
button_done.on_select = [&nav](Button&) { nav.pop(); };
refresh();
}
void PralineRadioDebugView::focus() {
button_refresh.focus();
}
void PralineRadioDebugView::toggle_clk5() {
// Si5351 Register 3 is the Output Enable mask. Bit 5 = CLK5.
// 0 = Enabled, 1 = Disabled.
uint8_t reg3 = portapack::clock_manager.si5351_read_register(3);
reg3 ^= 0x20; // Toggle Bit 5 (CLK5)
portapack::clock_manager.si5351_write_register(3, reg3);
refresh();
}
void PralineRadioDebugView::refresh() {
// 1. Check Mixer Lock Detect (GPIO6[25] / PD_11) [cite: 16, 17]
uint32_t gpio6_state = LPC_GPIO->PIN[6];
bool locked = (gpio6_state >> 25) & 1;
text_lock_status.set(locked ? "LOCKED (OK)" : "UNLOCKED!");
text_lock_status.set_style(locked ? Theme::getInstance()->fg_green : Theme::getInstance()->fg_red);
// 2. Check Si5351 CLK5 Status (Reg 3, Bit 5) - 0 = ON, 1 = OFF
uint8_t si_reg3 = portapack::clock_manager.si5351_read_register(3);
bool clk5_on = !(si_reg3 & 0x20);
text_clk5_status.set(clk5_on ? "ON (40MHz)" : "OFF");
text_clk5_status.set_style(clk5_on ? Theme::getInstance()->fg_green : Theme::getInstance()->fg_red);
// 3. Check SPI Bit Mode (SSP1 CR0)
// DSS (Data Size Select) is Bit 3:0. 0x8 = 9-bit (MAX2831), 0xF = 16-bit (Classic)
uint32_t cr0 = LPC_SSP1->CR0;
uint8_t dss = cr0 & 0x0F;
if (dss == 0x08)
text_spi_status.set("9-Bit (Pro)");
else
text_spi_status.set("Other (Err)");
text_spi_status.set_style((dss == 0x08) ? Theme::getInstance()->fg_green : Theme::getInstance()->fg_red);
// 4. Check FPGA Register 1 (DC Block status) [cite: 12, 13]
uint8_t fpga_r1 = radio::debug::fpga::register_read(1);
text_fpga_ctrl.set(to_string_hex(fpga_r1, 2));
// 5. Check VAA RF Power (GPIO4[1] / P8_1) - Active LOW [cite: 16, 17]
uint32_t gpio4_state = LPC_GPIO->PIN[4];
bool vaa_on = !((gpio4_state >> 1) & 1);
text_vaa_status.set(vaa_on ? "ON" : "OFF");
text_vaa_status.set_style(vaa_on ? Theme::getInstance()->fg_green : Theme::getInstance()->fg_red);
// Diagnostic Summary
if (!locked && clk5_on && vaa_on) {
text_status_msg.set("Clock/Pwr OK. PLL not locked. Check tuning registers.");
text_status_msg.set_style(Theme::getInstance()->fg_red);
} else if (!clk5_on) {
text_status_msg.set("Mixer Clock is OFF. PLL cannot lock.");
text_status_msg.set_style(Theme::getInstance()->fg_red);
} else {
text_status_msg.set("Hardware Link Active.");
text_status_msg.set_style(Theme::getInstance()->fg_green);
}
}
#endif
#ifdef PRALINE
/* WFMAudioDebugView *************************************************/
WFMAudioDebugView::WFMAudioDebugView(NavigationView& nav)
: nav_(nav) {
add_children({
&text_title,
&text_lbl_clk0,
&text_clk0,
&text_lbl_fpga_dec,
&text_fpga_dec,
&text_lbl_post_fpga,
&text_post_fpga,
&text_section1,
&text_lbl_reg8,
&text_reg8,
&text_lbl_lpf_bw,
&text_lpf_bw,
&text_section2,
&text_lbl_fpga_r1,
&text_fpga_r1,
&text_lbl_dc_q,
&text_dc_q,
&text_section3,
&text_lbl_expected,
&text_expected,
&text_lbl_deemph,
&text_deemph,
&text_status,
&text_status2,
&button_refresh,
&button_toggle_q,
&button_done,
});
text_title.set_style(Theme::getInstance()->fg_yellow);
text_section1.set_style(Theme::getInstance()->fg_yellow);
text_section2.set_style(Theme::getInstance()->fg_yellow);
text_section3.set_style(Theme::getInstance()->fg_yellow);
button_refresh.on_select = [this](Button&) {
refresh();
};
button_toggle_q.on_select = [this](Button&) {
uint32_t current = radio::debug::fpga::register_read(1);
uint8_t new_val = current ^ 0x02; // Toggle Q_INVERT bit
radio::debug::fpga::register_write(1, new_val);
radio::invalidate_spi_config();
refresh();
};
button_done.on_select = [&nav](Button&) {
nav.pop();
};
refresh();
}
void WFMAudioDebugView::focus() {
button_refresh.focus();
}
void WFMAudioDebugView::refresh() {
// === Si5351 CLK0 Sample Rate ===
// Read MS0 parameters to calculate frequency
uint8_t reg44 = portapack::clock_manager.si5351_read_register(44);
uint8_t reg45 = portapack::clock_manager.si5351_read_register(45);
uint8_t reg46 = portapack::clock_manager.si5351_read_register(46);
uint8_t r_div_encoded = (reg44 >> 4) & 0x07;
uint32_t r_div = 1 << r_div_encoded;
uint32_t p1 = ((uint32_t)(reg44 & 0x03) << 16) | ((uint32_t)reg45 << 8) | reg46;
uint32_t ms_div = (p1 + 512) / 128;
// PLL A is 800 MHz
uint32_t clk0_khz = 800000 / ms_div / r_div;
uint32_t clk0_mhz_int = clk0_khz / 1000;
uint32_t clk0_khz_frac = clk0_khz % 1000;
text_clk0.set(to_string_dec_uint(clk0_mhz_int) + "." +
to_string_dec_uint(clk0_khz_frac / 100) +
to_string_dec_uint((clk0_khz_frac / 10) % 10) +
to_string_dec_uint(clk0_khz_frac % 10) + " MHz");
if (clk0_khz >= 3000 && clk0_khz <= 3200) {
text_clk0.set_style(Theme::getInstance()->fg_green);
} else {
text_clk0.set_style(Theme::getInstance()->fg_red);
}
// === FPGA Decimation ===
uint8_t fpga_decim = radio::debug::fpga::register_read(2);
uint32_t fpga_div = 1 << fpga_decim;
text_fpga_dec.set("/" + to_string_dec_uint(fpga_div) + " (n=" + to_string_dec_uint(fpga_decim) + ")");
// === Post-FPGA Rate ===
uint32_t post_fpga_khz = clk0_khz / fpga_div;
text_post_fpga.set(to_string_dec_uint(post_fpga_khz) + " kHz");
// For WFM, post-FPGA should be >= 384 kHz for proper audio decimation
if (post_fpga_khz >= 384) {
text_post_fpga.set_style(Theme::getInstance()->fg_green);
} else {
text_post_fpga.set_style(Theme::getInstance()->fg_orange);
}
// === MAX2831 LPF ===
uint32_t reg8 = radio::debug::second_if::register_read(8);
text_reg8.set("0x" + to_string_hex(reg8, 4));
uint8_t lpf_coarse = reg8 & 0x03;
const char* lpf_names[] = {"7.5 MHz", "8.5 MHz", "15 MHz", "18 MHz"};
text_lpf_bw.set(lpf_names[lpf_coarse]);
// 7.5 MHz is minimum, OK for mono WFM but tight for stereo
if (lpf_coarse >= 1) {
text_lpf_bw.set_style(Theme::getInstance()->fg_green);
} else {
text_lpf_bw.set_style(Theme::getInstance()->fg_orange);
}
// === FPGA Control Register ===
uint32_t fpga_ctrl = radio::debug::fpga::register_read(1);
text_fpga_r1.set("0x" + to_string_hex(fpga_ctrl, 2));
bool dc_block = fpga_ctrl & 0x01;
bool q_invert = fpga_ctrl & 0x02;
uint8_t quarter_shift = (fpga_ctrl >> 2) & 0x03;
text_dc_q.set(std::string(dc_block ? "DC:ON" : "DC:OFF") +
" Q:" + std::string(q_invert ? "INV" : "NOR") +
" QS:" + to_string_dec_uint(quarter_shift));
if (dc_block) {
text_dc_q.set_style(Theme::getInstance()->fg_green);
} else {
text_dc_q.set_style(Theme::getInstance()->fg_orange);
}
// === Expected Audio Rate ===
// WFM typically: 3072 kHz / 64 = 48 kHz audio
// Or: 3072 kHz → /8 (channel) → 384 kHz → /8 (audio) → 48 kHz
uint32_t expected_audio = post_fpga_khz / 64; // Simplified assumption
text_expected.set(to_string_dec_uint(expected_audio) + " kHz (est)");
if (expected_audio >= 44 && expected_audio <= 50) {
text_expected.set_style(Theme::getInstance()->fg_green);
} else {
text_expected.set_style(Theme::getInstance()->fg_red);
}
// === De-emphasis Status ===
// We can't directly read the M4 de-emphasis config, but we can indicate what SHOULD be set
// 75µs for USA, 50µs for Europe
text_deemph.set("Check M4 config");
text_deemph.set_style(Theme::getInstance()->fg_orange);
// === Status Summary ===
bool sample_rate_ok = (clk0_khz >= 3000 && clk0_khz <= 3200);
bool lpf_ok = (lpf_coarse >= 0); // 7.5 MHz minimum is technically OK
bool dc_ok = dc_block;
if (sample_rate_ok && lpf_ok && dc_ok) {
text_status.set("Hardware config looks OK.");
text_status.set_style(Theme::getInstance()->fg_green);
text_status2.set("If ringy: Check de-emphasis in M4!");
text_status2.set_style(Theme::getInstance()->fg_orange);
} else {
std::string issues = "Issues: ";
if (!sample_rate_ok) issues += "SampleRate ";
if (!lpf_ok) issues += "LPF ";
if (!dc_ok) issues += "DC_Block ";
text_status.set(issues);
text_status.set_style(Theme::getInstance()->fg_red);
text_status2.set("Fix above before checking audio.");
text_status2.set_style(Theme::getInstance()->fg_red);
}
}
#endif
/* BasebandStatusView ******************************************************/
BasebandStatusView::BasebandStatusView(NavigationView& nav)
@@ -1339,12 +1600,14 @@ Si5351DebugView::Si5351DebugView(NavigationView& nav)
&text_xtal_cap_value,
&text_clk0_label,
&text_clk0_status,
&text_clk0_freq_label,
&text_clk0_freq_value,
&text_clk0_div_label,
&text_clk0_div_value,
&text_clk1_label,
&text_clk1_status,
&text_clk4_label,
&text_clk4_status,
&text_clk5_label,
&text_clk5_status,
&button_refresh,
&button_reset_pll,
&button_done});
@@ -1380,7 +1643,7 @@ void Si5351DebugView::refresh_status() {
bool pll_a_locked = !(status & 0x20); // Bit 5: LOL_A (Loss of Lock A)
bool pll_b_locked = !(status & 0x40); // Bit 6: LOL_B (Loss of Lock B)
bool sys_init = (status & 0x80); // Bit 7: SYS_INIT
bool los_clkin = (status & 0x10); // Bit 4: LOS (Loss of Signal)
// bool los_clkin = (status & 0x10); // Bit 4: LOS (Loss of Signal) (quoted as it's computed but unused)
// PLL A status
if (pll_a_locked) {
@@ -1453,8 +1716,8 @@ void Si5351DebugView::refresh_status() {
uint32_t freq_khz = 800000 / ms_div / r_div; // Result in kHz
// Show P1 value and R45 for debugging
text_clk0_freq_value.set(to_string_dec_uint(freq_khz) + " kHz (P1:" + to_string_hex(p1, 4) + ")");
text_clk0_div_value.set("MS=" + to_string_dec_uint(ms_div) +
text_clk0_freq_value.set("F:" + to_string_dec_uint(freq_khz / 1000) + "MHz (P1:" + to_string_hex(p1, 4) + ")");
text_clk0_div_value.set("DIV: MS=" + to_string_dec_uint(ms_div) +
" R=" + to_string_dec_uint(r_div));
// Color code based on expected 8 MHz
@@ -1472,6 +1735,20 @@ void Si5351DebugView::refresh_status() {
text_clk1_status.set(clk1_enabled ? "ON" : "OFF");
text_clk1_status.set_style(clk1_enabled ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
// CLK4 (MAX2831 reference - bit 4 of reg 3, reg 20 for control)
uint8_t clk4_ctrl = portapack::clock_manager.si5351_read_register(20);
bool clk4_enabled = !(output_enable_mask & 0x10) && !(clk4_ctrl & 0x80);
text_clk4_status.set(clk4_enabled ? "ON (40MHz)" : "OFF");
text_clk4_status.set_style(clk4_enabled ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
// CLK5 (RFFC5072 reference - bit 5 of reg 3, reg 21 for control)
uint8_t clk5_ctrl = portapack::clock_manager.si5351_read_register(21);
bool clk5_enabled = !(output_enable_mask & 0x20) && !(clk5_ctrl & 0x80);
text_clk5_status.set(clk5_enabled ? "ON (40MHz)" : "OFF");
text_clk5_status.set_style(clk5_enabled ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
}
void Si5351DebugView::reset_pll() {
@@ -1815,11 +2092,6 @@ void SystemDiagnosticsView::read_gpio_states() {
uint32_t gpio3_state = LPC_GPIO->PIN[3]; // GPIO3 for mixer
uint32_t gpio4_state = LPC_GPIO->PIN[4]; // GPIO4 for LPF and amp
// Extract specific pins based on hackrf_gpio.hpp definitions:
// gpio_mix_enable_n = GPIO3_2 (P6_3) - bit 2 of port 3, INVERTED
// gpio_lpf_enable = GPIO4_8 (PA_1) - bit 8 of port 4
// gpio_rf_amp_enable = GPIO4_9 (PA_2) - bit 9 of port 4
bool mix_n_actual = (gpio3_state >> 2) & 1; // GPIO3[2]
bool lpf_actual = (gpio4_state >> 8) & 1; // GPIO4[8]
bool amp_actual = (gpio4_state >> 9) & 1; // GPIO4[9]
@@ -1915,8 +2187,8 @@ void SystemDiagnosticsView::refresh() {
GPIODebugView::GPIODebugView(NavigationView& nav) {
add_children({
&text_lbl_gpio4,
&text_lbl_dir4,
&text_dir4,
&text_lbl_mixr1,
&text_mixr1,
&text_lbl_pin4,
&text_pin4,
&text_lbl_set4,
@@ -2019,7 +2291,7 @@ void GPIODebugView::refresh() {
uint32_t gpio4_set = LPC_GPIO->SET[4]; // What we're trying to output
// Display full registers
text_dir4.set("0x" + to_string_hex(gpio4_dir, 8));
// text_dir4.set("0x" + to_string_hex(gpio4_dir, 8));
text_pin4.set("0x" + to_string_hex(gpio4_pin, 8));
text_set4.set("0x" + to_string_hex(gpio4_set, 8));
@@ -2063,6 +2335,22 @@ void GPIODebugView::refresh() {
text_mix_dir.set_style(mix_dir ? Theme::getInstance()->fg_green : Theme::getInstance()->fg_red);
text_mix_pin.set_style(mix_pin ? Theme::getInstance()->fg_green : Theme::getInstance()->fg_red);
// Read GPIO5 (Mixer R1) - bit 2
uint32_t gpio3_state = LPC_GPIO->PIN[3]; // GPIO3 for mixer
bool mix_n_actual = (gpio3_state >> 2) & 1; // GPIO3[2]
uint32_t gpio5_state = LPC_GPIO->PIN[5];
bool mix_r10_pin = (gpio5_state >> 6) & 1; // GPIO5[6] = P2_6
// Mixer is active LOW, so invert for display
bool mixer_enabled = !mix_n_actual;
// Append to existing mixer display:
text_mixr1.set(
std::string(mixer_enabled ? "ENABLED" : "BYPASSED") +
" P6_3=" + to_string_dec_uint(mix_n_actual ? 1 : 0) +
" P2_6=" + to_string_dec_uint(mix_r10_pin ? 1 : 0));
text_mixr1.set_style(mixer_enabled ? Theme::getInstance()->fg_green : Theme::getInstance()->fg_red);
}
#endif
@@ -2072,10 +2360,7 @@ void GPIODebugView::refresh() {
RFFC5072StatusView::RFFC5072StatusView(NavigationView& nav)
: nav_(nav) {
add_children({
&text_title,
&text_lbl_lock,
&text_lock,
&text_lbl_ctrl,
&text_gpio4,
&text_ctrl,
&text_lbl_enabled,
&text_enabled,
@@ -2098,18 +2383,135 @@ RFFC5072StatusView::RFFC5072StatusView(NavigationView& nav)
&text_lbl_calc,
&text_calc,
&text_status,
&text_lbl_regs_status,
&text_status2,
&text_status3,
&text_regs_status,
&button_refresh,
&button_force,
&button_done,
});
text_title.set_style(Theme::getInstance()->fg_yellow);
button_refresh.on_select = [this](Button&) {
refresh_status();
};
button_force.on_select = [this](Button&) {
// Force ENX to OUTPUT and drive LOW
// LPC_GPIO->DIR[2] |= (1 << 13); // Set as OUTPUT
// LPC_GPIO->CLR[2] = (1 << 13); // Drive LOW (enabled)
// refresh_status();
// Disable RFFC5072
// uint32_t r0 = radio::debug::first_if::register_read(0);
// radio::debug::first_if::register_write(0, r0 & ~0x0010); // Clear ENBL
// Wait 1ms
// chThdSleepMilliseconds(1);
// Re-enable - this triggers new calibration
// radio::debug::first_if::register_write(0, r0 | 0x0010); // Set ENBL
// Wait for calibration
// chThdSleepMilliseconds(10);
// refresh_status();
// Force lodiv=4 (log2=2) instead of lodiv=2 (log2=1)
// This gives VCO = LO × 4 = 2595 × 4 = 10380 MHz - TOO HIGH!
// Actually, we need lodiv=1 which gives VCO = 2595 MHz - TOO LOW (below 2700)
// Let's try a different approach: manually write registers for VCO ~ 3500 MHz
// LO = 3500/2 = 1750 MHz (not useful for FM, but tests if VCO can lock)
// VCO = 3500 MHz, lodiv=2, presc=2, f_ref=40
// N = (VCO × presc) / f_ref = (3500 × 2) / 40 = 175
// Write P2_FREQ1: N=175, lodiv=1 (log2), presc=1 (log2)
// uint16_t p2_freq1 = (175 << 7) | (1 << 4) | (1 << 2);
// radio::debug::first_if::register_write(15, p2_freq1);
// Clear fractional part
// radio::debug::first_if::register_write(16, 0);
// radio::debug::first_if::register_write(17, 0);
// Trigger recalibration by toggling ENBL
// uint32_t r0 = radio::debug::first_if::register_read(0);
// radio::debug::first_if::register_write(0, r0 & ~0x0010);
// chThdSleepMilliseconds(1);
// radio::debug::first_if::register_write(0, r0 | 0x0010);
// chThdSleepMilliseconds(20);
// refresh_status();
// Test SPI SDATA direction switching
// PRALINE: SDATA = P9_2 = GPIO4[14]
// Check current direction
uint32_t dir_before = LPC_GPIO->DIR[4];
bool sdata_output_before = (dir_before >> 14) & 1;
// Try a register read
uint32_t dummy = radio::debug::first_if::register_read(0);
(void)dummy;
// Check direction after read
uint32_t dir_after = LPC_GPIO->DIR[4];
bool sdata_output_after = (dir_after >> 14) & 1;
// Read the actual SDATA pin state
uint32_t pin_state = LPC_GPIO->PIN[4];
bool sdata_pin = (pin_state >> 14) & 1;
text_status.set("SDATA: dir_b=" + to_string_dec_uint(sdata_output_before) +
" dir_a=" + to_string_dec_uint(sdata_output_after) +
" pin=" + to_string_dec_uint(sdata_pin) + " ");
// If both are 1 (OUTPUT), the read direction switch isn't happening
// if (sdata_output_before && sdata_output_after) {
// text_status2.set("ERROR: SDATA stuck as OUTPUT! ");
// text_status2.set_style(Theme::getInstance()->fg_red);
//} else {
// text_status2.set("SDATA direction OK ");
// text_status2.set_style(Theme::getInstance()->fg_green);
//}
// Test: Write a known pattern to register 0, then read back
// Register 0 (DEV_CTRL) default = 0xBEFA
// Step 1: Read current value
uint32_t before = radio::debug::first_if::register_read(0);
// Step 2: Write a different value (change ENBL bit to toggle)
uint32_t test_val = before ^ 0x0010; // Toggle ENBL bit
radio::debug::first_if::register_write(0, test_val);
// Step 3: Read back
uint32_t after = radio::debug::first_if::register_read(0);
// Step 4: Restore original
radio::debug::first_if::register_write(0, before);
// Display results
text_status.set("WR TEST: " + to_string_hex(before, 4) +
"->" + to_string_hex(test_val, 4) +
" rb:" + to_string_hex(after, 4));
// If after == before (not test_val), reads are broken
// If after == test_val, reads work
if (after == test_val) {
text_status2.set("READ-AFTER-WRITE: PASS! ");
text_status2.set_style(Theme::getInstance()->fg_green);
} else if (after == before) {
text_status2.set("READ-AFTER-WRITE: FAIL (no change) ");
text_status2.set_style(Theme::getInstance()->fg_red);
} else {
text_status2.set("READ-AFTER-WRITE: CORRUPT " + to_string_hex(after, 4) + " ");
text_status2.set_style(Theme::getInstance()->fg_red);
}
};
button_done.on_select = [&nav](Button&) {
nav.pop();
};
@@ -2123,11 +2525,14 @@ void RFFC5072StatusView::focus() {
}
void RFFC5072StatusView::refresh_status() {
// === READ RAW GPIO STATES FOR DEBUGGING ===
// === DIAGNOSTIC: Capture initial GPIO state ===
uint32_t gpio2_initial = LPC_GPIO->PIN[2];
uint32_t dir2_initial = LPC_GPIO->DIR[2];
bool enx_initial = (gpio2_initial >> 13) & 1;
// === READ RAW GPIO STATES FOR DISPLAY ===
uint32_t gpio2_dir = LPC_GPIO->DIR[2];
uint32_t gpio2_pin = LPC_GPIO->PIN[2];
// Check if the pins are even configured as outputs
bool enx_is_output = (gpio2_dir >> 13) & 1;
bool resetx_is_output = (gpio2_dir >> 14) & 1;
@@ -2135,110 +2540,177 @@ void RFFC5072StatusView::refresh_status() {
uint32_t gpio6_pin = LPC_GPIO->PIN[6];
bool rffc_locked = (gpio6_pin >> 25) & 1;
text_lock.set(rffc_locked ? "LOCKED" : "UNLOCKED");
text_lock.set_style(rffc_locked ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
uint8_t fpga_reg1 = radio::debug::fpga::register_read(1); // CTRL register
uint8_t fpga_reg2 = radio::debug::fpga::register_read(2); // RX_DECIM
text_regs_status.set(
"FPGA R1:" + to_string_hex(fpga_reg1, 2) +
" R2:" + to_string_hex(fpga_reg2, 2));
// === FPGA REGISTERS (non-SPI) ===
uint8_t fpga_reg1 = radio::debug::fpga::register_read(1);
uint8_t fpga_reg2 = radio::debug::fpga::register_read(2);
uint8_t fpga_reg3 = radio::debug::fpga::register_read(3);
text_regs_status.set("FPGA R1:" + to_string_hex(fpga_reg1, 2) +
" R2:" + to_string_hex(fpga_reg2, 2) +
" R3:" + to_string_hex(fpga_reg3, 2));
// === CONTROL PINS ===
// ENX = GPIO2[13] (P5_4) - active LOW (0 = enabled)
// RESETX = GPIO2[14] (P5_5) - active LOW (0 = reset)
bool enx = (gpio2_pin >> 13) & 1;
bool resetx = (gpio2_pin >> 14) & 1;
text_ctrl.set(std::string(enx ? "DIS" : "EN") + " " +
std::string(resetx ? "RUN" : "RST") + " " +
"O:" + std::string(resetx_is_output ? "Y" : "N"));
text_ctrl.set("ENX: " + std::string(enx ? "DIS" : "EN") +
" O:" + std::string(enx_is_output ? "Y" : "N") +
" | RSTX: " + std::string(resetx ? "H" : "L") +
" O:" + std::string(resetx_is_output ? "Y" : "N"));
text_ctrl.set_style((enx == 0 && resetx == 1) ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
// === REGISTERS ===
// Read CORRECT registers for Path 2 (active path!)
uint32_t r0 = radio::debug::first_if::register_read(0); // Control
uint32_t r15 = radio::debug::first_if::register_read(15); // P2_FREQ1
uint32_t r16 = radio::debug::first_if::register_read(16); // P2_FREQ2
// === DIAGNOSTIC: Check BEFORE first RFFC5072 SPI read ===
uint32_t gpio2_before_spi = LPC_GPIO->PIN[2];
bool enx_before_spi = (gpio2_before_spi >> 13) & 1;
// Display
// === RFFC5072 REGISTERS (SPI reads - this is where corruption happens) ===
uint32_t r0 = radio::debug::first_if::register_read(0);
// === DIAGNOSTIC: Check AFTER first read ===
uint32_t gpio2_after_r0 = LPC_GPIO->PIN[2];
bool enx_after_r0 = (gpio2_after_r0 >> 13) & 1;
uint32_t r15 = radio::debug::first_if::register_read(15);
// === DIAGNOSTIC: Check AFTER second read ===
uint32_t gpio2_after_r15 = LPC_GPIO->PIN[2];
bool enx_after_r15 = (gpio2_after_r15 >> 13) & 1;
uint32_t r16 = radio::debug::first_if::register_read(16);
// === DIAGNOSTIC: Check AFTER third read ===
uint32_t gpio2_final = LPC_GPIO->PIN[2];
uint32_t dir2_final = LPC_GPIO->DIR[2];
bool enx_final = (gpio2_final >> 13) & 1;
// === Display register values ===
text_r0.set(to_string_hex(r0, 4));
text_r1.set(to_string_hex(r15, 4) + " (R15)");
text_r2.set(to_string_hex(r16, 4) + " (R16)");
// Check enabled (R0 bit 4)
bool enabled = (r0 & 0x0010) != 0;
text_enabled.set(enabled ? "ENABLED" : "DISABLED");
text_enabled.set_style(enabled ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
// Decode from P2_FREQ1 (R15)
uint16_t n_int = (r15 >> 7) & 0x1FF; // 9 bits
uint8_t lodiv_sel = (r15 >> 4) & 0x07; // 3 bits
uint8_t presc_sel = (r15 >> 2) & 0x03; // 2 bits
// === Decode frequency info (keeping existing code) ===
uint16_t n_int = (r15 >> 7) & 0x1FF;
uint8_t lodiv_sel = (r15 >> 4) & 0x07;
uint8_t presc_sel = (r15 >> 2) & 0x03;
text_n.set(to_string_dec_uint(n_int));
// LO divider: 0=÷2, 1=÷4, 2=÷8, 3=÷16, 4=÷32, 5=÷64
uint16_t lodiv_val = 1u << lodiv_sel;
uint16_t presc_val = 1u << presc_sel;
text_lodiv.set("/" + to_string_dec_uint(lodiv_val) +
" (P:/" + to_string_dec_uint(presc_val) + ")");
// Calculate frequencies
const uint32_t f_ref_mhz = 40;
uint32_t f_vco_mhz = (f_ref_mhz * n_int) / presc_val;
uint32_t f_lo_mhz = f_vco_mhz / lodiv_val;
text_calc.set(to_string_dec_uint(f_lo_mhz) + " MHz");
text_freq.set(to_string_dec_uint(f_vco_mhz) + " MHz VCO");
// Check ranges
bool vco_ok = (f_vco_mhz >= 2700) && (f_vco_mhz <= 5400);
bool lo_ok = (f_lo_mhz >= 2300) && (f_lo_mhz <= 2700);
bool lo_ok = (f_lo_mhz >= 85) && (f_lo_mhz <= 4200);
bool in_bypass_range = (f_lo_mhz >= 2320) && (f_lo_mhz <= 2740);
text_calc.set_style(lo_ok ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
if (in_bypass_range) {
text_calc.set(to_string_dec_uint(f_lo_mhz) + " MHz (MID)");
text_calc.set_style(Theme::getInstance()->fg_orange);
} else {
text_calc.set(to_string_dec_uint(f_lo_mhz) + " MHz");
text_calc.set_style(lo_ok ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
}
text_freq.set(to_string_dec_uint(f_vco_mhz) + " MHz VCO");
text_freq.set_style(vco_ok ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_red);
// Check mixer mode
bool path2_active = (r0 & 0x0020) != 0;
text_path.set(path2_active ? "PATH2" : "PATH1");
text_mixer.set(path2_active ? "ACTIVE" : "INACTIVE");
text_mixer.set_style(path2_active ? Theme::getInstance()->fg_green
: Theme::getInstance()->fg_orange);
// === SUMMARY STATUS ===
if (!rffc_locked) {
text_status.set("PLL UNLOCKED!");
text_status.set_style(Theme::getInstance()->fg_red);
} else if (enx == 1) {
text_status.set("DISABLED (ENX=1)!");
text_status.set_style(Theme::getInstance()->fg_red);
} else if (resetx == 0) {
text_status.set("IN RESET (RESETX=0)!");
text_status.set_style(Theme::getInstance()->fg_red);
} else if (!enabled) {
text_status.set("R0 bit 4 = 0 (disabled)");
text_status.set_style(Theme::getInstance()->fg_red);
} else if (!path2_active) {
text_status.set("Path 2 not selected!");
text_status.set_style(Theme::getInstance()->fg_red);
} else if (!vco_ok) {
text_status.set("VCO out of range!");
text_status.set_style(Theme::getInstance()->fg_red);
} else if (!lo_ok) {
text_status.set("LO out of range!");
// === DIAGNOSTIC STATUS (replaces normal status) ===
// Read register 31 with readsel=0 (device ID)
radio::debug::first_if::register_write(0, (r0 & 0xFFF0) | 0x0000); // readsel=0
uint32_t device_id = radio::debug::first_if::register_read(31);
// Read calibration status (readback register 1)
// First, set DEV_CTRL.readsel = 1, then read READBACK register
uint32_t dev_ctrl_orig = radio::debug::first_if::register_read(0); // Save original
// Write DEV_CTRL with readsel=1 (bits 3:0)
radio::debug::first_if::register_write(0, (dev_ctrl_orig & 0xFFF0) | 0x0001);
// Now read the READBACK register (register address for readback)
uint32_t cal_status = radio::debug::first_if::register_read(31); // READBACK is at reg 31
// Decode calibration status:
// Bit 15: lock (should be 1)
// Bits 14:8: ct_cal (coarse tune calibration value, 0-127)
// Bits 7:1: cp_cal (charge pump calibration value)
// Bit 0: ctfail (1 = calibration FAILED)
bool lock_bit = (cal_status >> 15) & 1;
uint8_t ct_cal = (cal_status >> 8) & 0x7F;
uint8_t cp_cal = (cal_status >> 1) & 0x7F;
bool ct_fail = cal_status & 1;
// Add to refresh_status():
uint32_t r6 = radio::debug::first_if::register_read(6);
uint32_t r5 = radio::debug::first_if::register_read(5);
uint32_t r3 = radio::debug::first_if::register_read(3); // VCO_CTRL
// Check SDATA (GPIO4[14]) direction
uint32_t gpio4_dir = LPC_GPIO->DIR[4];
bool sdata_is_output = (gpio4_dir >> 14) & 1;
text_gpio4.set("GPIO4 DIR: " + to_string_hex(gpio4_dir, 8) +
" SDATA=" + std::string(sdata_is_output ? "OUT" : "IN"));
// Display these values
text_status2.set("CAL ct=" + to_string_dec_uint(ct_cal) +
" cp=" + to_string_dec_uint(cp_cal) +
(ct_fail ? " FAIL!" : " OK") +
" lck_b=" + to_string_dec_uint(lock_bit));
text_status3.set("R3:" + to_string_hex(r3, 4) +
" R5:" + to_string_hex(r5, 4) +
" R6:" + to_string_hex(r6, 4));
if (enx_initial != enx_final || dir2_initial != dir2_final) {
// ENX or DIR changed - report which operation caused it
std::string diag = "CHG: ";
if (enx_initial != enx_before_spi) diag += "pre ";
if (enx_before_spi != enx_after_r0) diag += "R0 ";
if (enx_after_r0 != enx_after_r15) diag += "R15 ";
if (enx_after_r15 != enx_final) diag += "R16 ";
diag += std::to_string(enx_initial) + "->" + std::to_string(enx_final);
if (dir2_initial != dir2_final) {
diag += " DIR!";
}
text_status.set(diag);
text_status.set_style(Theme::getInstance()->fg_red);
// Blink LED
/*for (int i = 0; i < 3; i++) {
hackrf::one::led_rx.on();
chThdSleepMilliseconds(100);
hackrf::one::led_rx.off();
chThdSleepMilliseconds(100);
}*/
} else {
text_status.set("All checks passed!");
text_status.set_style(Theme::getInstance()->fg_green);
// No change - normal status
if (!rffc_locked) {
text_status.set("ID 0x" + to_string_hex(device_id, 4) + " PLL UNLOCKED!");
text_status.set_style(Theme::getInstance()->fg_red);
} else if (enx == 1) {
text_status.set("ID 0x" + to_string_hex(device_id, 4) + " DSBLD,ENX=1!");
text_status.set_style(Theme::getInstance()->fg_red);
} else {
text_status.set("ID 0x" + to_string_hex(device_id, 4) + " Passed!");
text_status.set_style(Theme::getInstance()->fg_green);
}
}
}
@@ -2396,7 +2868,7 @@ void MAX2831DebugView::focus() {
}
void MAX2831DebugView::refresh() {
auto info = radio::debug::second_if::get_max2831_info();
auto info = get_max2831_info();
// Show if set_frequency was called
if (info.set_frequency_called) {
@@ -2532,6 +3004,8 @@ void DebugMenuView::on_populate() {
#ifdef PRALINE
{"System Diag", ui::Theme::getInstance()->fg_yellow->foreground, &bitmap_icon_peripherals, [this]() { nav_.push<SystemDiagnosticsView>(); }},
{"Radio Diag", ui::Theme::getInstance()->fg_yellow->foreground, &bitmap_icon_peripherals, [this]() { nav_.push<RadioDiagnosticsView>(); }},
{"WFM Audio", ui::Theme::getInstance()->fg_yellow->foreground, &bitmap_icon_peripherals, [this]() { nav_.push<WFMAudioDebugView>(); }},
{"ProRadio Debug", ui::Theme::getInstance()->fg_yellow->foreground, &bitmap_icon_peripherals, [this]() { nav_.push<PralineRadioDebugView>(); }},
{"Signal Path", ui::Theme::getInstance()->fg_yellow->foreground, &bitmap_icon_peripherals, [this]() { nav_.push<SignalPathStatusView>(); }},
{"GPIO Debug", ui::Theme::getInstance()->fg_yellow->foreground, &bitmap_icon_peripherals, [this]() { nav_.push<GPIODebugView>(); }},
{"RFFC Status", ui::Theme::getInstance()->fg_yellow->foreground, &bitmap_icon_peripherals, [this]() { nav_.push<RFFC5072StatusView>(); }},
+139 -31
View File
@@ -438,6 +438,113 @@ class RadioDiagnosticsView : public View {
"Done"};
};
#ifdef PRALINE
/* Praline-Specific Radio Debug View
* Monitors Mixer Lock, SPI Bit Depth, and toggles Si5351 CLK5
*/
class PralineRadioDebugView : public View {
public:
PralineRadioDebugView(NavigationView& nav);
void focus() override;
std::string title() const override { return "Pro Radio Debug"; };
private:
void refresh();
void toggle_clk5();
Text text_title{{0, 0, 240, 16}, "=== Pro Radio Debug ==="};
// Mixer Lock (PD_11 / GPIO6[25])
Text text_lbl_lock{{0, 24, 124, 16}, "Mix Lock (LD):"};
Text text_lock_status{{126, 24, 114, 16}, "---"};
// Si5351 CLK5 (Mixer Reference)
Text text_lbl_clk5{{0, 40, 124, 16}, "Si5351 CLK5(Mix):"};
Text text_clk5_status{{126, 40, 114, 16}, "---"};
// SPI Bus configuration check
Text text_lbl_spi{{0, 56, 124, 16}, "SPI Bit Mode:"};
Text text_spi_status{{126, 56, 118, 16}, "---"};
// FPGA DC Block (Reg 1)
Text text_lbl_fpga_ctrl{{0, 72, 124, 16}, "FPGA Reg 1:"};
Text text_fpga_ctrl{{126, 72, 118, 16}, "---"};
// VAA Power Rail (P8_1 / GPIO4[1])
Text text_lbl_vaa{{0, 88, 124, 16}, "VAA RF Power:"};
Text text_vaa_status{{126, 88, 118, 16}, "---"};
Text text_status_msg{{0, 110, 240, 48}, ""};
Button button_refresh{{8, 240, 72, 24}, "Refresh"};
Button button_toggle_clk5{{88, 240, 72, 24}, "CLK5_T"};
Button button_done{{168, 240, 64, 24}, "Done"};
};
#endif
/* WFMAudioDebugView ***************************************************/
#ifdef PRALINE
class WFMAudioDebugView : public View {
public:
WFMAudioDebugView(NavigationView& nav);
void focus() override;
std::string title() const override { return "WFM Audio Debug"; }
private:
void refresh();
NavigationView& nav_;
Text text_title{{0, 0, 240, 16}, "=== WFM Audio Debug ==="};
// Sample rates section
Text text_lbl_clk0{{0, 20, 140, 16}, "Si5351 CLK0 Rate:"};
Text text_clk0{{150, 20, 90, 16}, "---"};
Text text_lbl_fpga_dec{{0, 36, 140, 16}, "FPGA Decimation:"};
Text text_fpga_dec{{150, 36, 90, 16}, "---"};
Text text_lbl_post_fpga{{0, 52, 140, 16}, "Post-FPGA Rate:"};
Text text_post_fpga{{150, 52, 90, 16}, "---"};
// MAX2831 section
Text text_section1{{0, 72, 240, 16}, "--- MAX2831 LPF ---"};
Text text_lbl_reg8{{0, 88, 140, 16}, "Reg8 (LPF RX):"};
Text text_reg8{{150, 88, 90, 16}, "---"};
Text text_lbl_lpf_bw{{0, 104, 140, 16}, "LPF Bandwidth:"};
Text text_lpf_bw{{150, 104, 90, 16}, "---"};
// FPGA section
Text text_section2{{0, 124, 240, 16}, "--- FPGA Control ---"};
Text text_lbl_fpga_r1{{0, 140, 140, 16}, "Reg1 (Ctrl):"};
Text text_fpga_r1{{150, 140, 90, 16}, "---"};
Text text_lbl_dc_q{{0, 156, 140, 16}, "DC/Q/QS:"};
Text text_dc_q{{150, 156, 90, 16}, "---"};
// Audio section
Text text_section3{{0, 176, 240, 16}, "--- Audio Path ---"};
Text text_lbl_expected{{0, 192, 140, 16}, "Expected Audio:"};
Text text_expected{{150, 192, 90, 16}, "---"};
Text text_lbl_deemph{{0, 208, 140, 16}, "De-emph Config:"};
Text text_deemph{{150, 208, 90, 16}, "---"};
// Status
Text text_status{{0, 228, 240, 16}, "---"};
Text text_status2{{0, 244, 240, 16}, "---"};
Button button_refresh{{10, 268, 70, 24}, "Refresh"};
Button button_toggle_q{{90, 268, 70, 24}, "Toggle Q"};
Button button_done{{170, 268, 60, 24}, "Done"};
};
#endif
/* BasebandStatusView ***************************************************/
class BasebandStatusView : public View {
@@ -643,34 +750,36 @@ class Si5351DebugView : public View {
private:
NavigationView& nav_;
Text text_title{{8, 16, 200, 16}, "Si5351 Clock Generator"};
Text text_title{{0, 0, 200, 16}, "Si5351 Clock Generator"};
Text text_status_label{{8, 40, 80, 16}, "Status Reg:"};
Text text_status_value{{96, 40, 144, 16}, ""};
Text text_status_label{{0, 16, 80, 16}, "Status Reg:"};
Text text_status_value{{96, 16, 144, 16}, ""};
Text text_pll_a_label{{8, 60, 80, 16}, "PLL A:"};
Text text_pll_a_status{{96, 60, 144, 16}, ""};
Text text_pll_a_label{{0, 32, 80, 16}, "PLL A:"};
Text text_pll_a_status{{96, 32, 144, 16}, ""};
Text text_pll_b_label{{8, 80, 80, 16}, "PLL B:"};
Text text_pll_b_status{{96, 80, 144, 16}, ""};
Text text_pll_b_label{{0, 48, 80, 16}, "PLL B:"};
Text text_pll_b_status{{96, 48, 144, 16}, ""};
Text text_sys_init_label{{8, 100, 80, 16}, "SYS_INIT:"};
Text text_sys_init_status{{96, 100, 144, 16}, ""};
Text text_sys_init_label{{0, 64, 80, 16}, "SYS_INIT:"};
Text text_sys_init_status{{96, 64, 144, 16}, ""};
Text text_xtal_cap_label{{8, 120, 80, 16}, "XTAL Cap:"};
Text text_xtal_cap_value{{96, 120, 144, 16}, ""};
Text text_xtal_cap_label{{0, 80, 80, 16}, "XTAL Cap:"};
Text text_xtal_cap_value{{96, 80, 144, 16}, ""};
Text text_clk0_label{{8, 150, 72, 16}, "CLK0:"};
Text text_clk0_status{{88, 150, 152, 16}, ""};
Text text_clk0_label{{0, 96, 48, 16}, "CLK0:"};
Text text_clk0_status{{50, 96, 28, 16}, ""};
Text text_clk0_freq_value{{80, 96, 160, 16}, ""};
Text text_clk0_div_value{{50, 112, 190, 16}, ""};
Text text_clk0_freq_label{{8, 170, 72, 16}, " Freq:"};
Text text_clk0_freq_value{{88, 170, 152, 16}, ""};
Text text_clk1_label{{0, 128, 96, 16}, "CLK1 (SCT):"};
Text text_clk1_status{{112, 128, 128, 16}, ""};
Text text_clk0_div_label{{8, 190, 72, 16}, " Div:"};
Text text_clk0_div_value{{88, 190, 152, 16}, ""};
Text text_clk4_label{{0, 144, 96, 16}, "CLK4 (MAX):"};
Text text_clk4_status{{112, 144, 128, 16}, ""};
Text text_clk1_label{{8, 210, 96, 16}, "CLK1 (SCT):"};
Text text_clk1_status{{112, 210, 128, 16}, ""};
Text text_clk5_label{{0, 160, 96, 16}, "CLK5 (RFFC):"};
Text text_clk5_status{{112, 160, 128, 16}, ""};
Button button_refresh{{8, 240, 72, 24}, "Refresh"};
Button button_reset_pll{{88, 240, 72, 24}, "Reset PLL"};
@@ -694,7 +803,7 @@ class SignalPathStatusView : public View {
Text text_title{{0, 0, 240, 16}, "=== Signal Path Status ==="};
Text text_lbl_max_enable{{0, 20, 1114, 16}, "MAX2831:"};
Text text_lbl_max_enable{{0, 20, 114, 16}, "MAX2831:"};
Text text_max_enable{{116, 20, 124, 16}, "---"};
Text text_lbl_max_mode{{0, 36, 114, 16}, "RX Mode:"};
@@ -748,8 +857,8 @@ class GPIODebugView : public View {
// GPIO4 (LPF and RF Amp)
Text text_lbl_gpio4{{0, 0, 240, 16}, "Pin Diag: GPIO4 (LPF|Amp|Mix)"};
Text text_lbl_dir4{{0, 18, 114, 16}, "DIR[4]:"};
Text text_dir4{{116, 18, 124, 16}, "---"};
Text text_lbl_mixr1{{0, 18, 56, 16}, "MixR1:"};
Text text_mixr1{{58, 18, 180, 16}, "---"};
Text text_lbl_pin4{{0, 36, 114, 16}, "PIN[4] (read):"};
Text text_pin4{{116, 36, 124, 16}, "---"};
@@ -802,13 +911,11 @@ class RFFC5072StatusView : public View {
NavigationView& nav_;
void refresh_status();
Text text_title{{0, 0, 240, 16}, "=== RFFC5072 (1st IF) ==="};
Text text_status{{0, 0, 240, 16}, "---"};
Text text_lbl_lock{{0, 16, 114, 16}, "Lock Detect:"};
Text text_lock{{116, 16, 124, 16}, "---"};
Text text_gpio4{{0, 16, 240, 16}, "---"};
Text text_lbl_ctrl{{0, 32, 114, 16}, "Control:"};
Text text_ctrl{{116, 32, 124, 16}, "---"};
Text text_ctrl{{0, 32, 240, 16}, "---"};
Text text_lbl_enabled{{0, 48, 114, 16}, "Status:"};
Text text_enabled{{116, 48, 124, 16}, "---"};
@@ -840,12 +947,13 @@ class RFFC5072StatusView : public View {
Text text_lbl_calc{{0, 192, 114, 16}, "Calc freq:"};
Text text_calc{{116, 192, 124, 16}, "---"};
Text text_status{{0, 208, 240, 16}, ""};
Text text_regs_status{{0, 208, 240, 16}, "---"};
Text text_lbl_regs_status{{0, 224, 48, 16}, "Regs:"};
Text text_regs_status{{50, 224, 190, 16}, "---"};
Text text_status2{{0, 224, 240, 16}, ""};
Text text_status3{{0, 240, 240, 16}, ""};
Button button_refresh{{2, 280, 56, 24}, "Rfrsh"};
Button button_refresh{{2, 280, 72, 24}, "Refresh"};
Button button_force{{98, 280, 60, 24}, "SPI"};
Button button_done{{182, 280, 56, 24}, "Done"};
};
@@ -32,8 +32,6 @@
#include "untar.hpp"
#include <cstdint>
#include "../../flashsize.h"
#define FLASH_ROM_SIZE (FLASH_SIZE_MB * 1024 * 1024)
#define FLASH_STARTING_ADDRESS 0x00000000
#define FLASH_EXPECTED_CHECKSUM 0x00000000
+2 -1
View File
@@ -304,7 +304,8 @@ class MicTXView : public View {
{
{" 8k5 ", 0}, // Initial dynamic values when we start Mic App.
{" 11k ", 1},
{" 16k ", 2},
{" 12k5 ", 2},
{" 16k ", 3},
}};
NumberField field_squelch{
+1
View File
@@ -1261,6 +1261,7 @@ size_t ReconView::change_mode(freqman_index_t new_mod) {
else
v = SPEC_MODULATION;
field_mode.set_selected_index(v);
return; // Important ! Guru will occur if you don't return when modifying field from within on_change !
}
last_mode = v;
change_mode(v);
@@ -34,7 +34,7 @@
namespace ui {
void create_thread(int32_t (*fn)(void*), void* arg, size_t stack_size, int priority) {
// TODO: collect memory on terminate, once this is used
// TODO: collect memory on terminate, once this is used. This is a HUGE TODO! need to call chThdWait on all of them!
chThdCreateFromHeap(NULL, stack_size, priority, fn, arg);
}
+6 -1
View File
@@ -473,7 +473,12 @@ void shutdown() {
send_message(&message);
shared_memory.application_queue.reset();
// Allow time for the shutdown message to be processed and for the baseband
// core to stop before starting another image. Otherwise, the M4 may still be
// running and cause a crash when the next image is started.
#ifdef PRALINE
chThdSleepMilliseconds(20);
#endif
baseband_image_running = false;
}
+72 -21
View File
@@ -237,19 +237,40 @@ constexpr ClockControls si5351c_clock_control_common{{
}};
constexpr ClockControls si5351a_clock_control_common{{
#ifndef PRALINE
#ifdef PRALINE
// CLK0: MAX5864 (ADC)
{ClockControl::ClockCurrentDrive::_4mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK1: SCT_CLK - iCE40 FPGA timing clock
{ClockControl::ClockCurrentDrive::_6mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK2: LPC43xx MCU
{ClockControl::ClockCurrentDrive::_4mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK3: CLKOUT (optional) SMA Port P1
{ClockControl::ClockCurrentDrive::_8mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK4: PRALINE MAX2831 reference (40 MHz) - INVERTED per hackrf_usb, 4mA, Integer mode
{ClockControl::ClockCurrentDrive::_4mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Invert, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK5: PRALINE RFFC5072 reference (40 MHz) - INVERTED, 6mA, Integer mode
// This matches HackRF One OG configuration for RFFC5072
{ClockControl::ClockCurrentDrive::_6mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Invert, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK6: SMA Port P2
{ClockControl::ClockCurrentDrive::_8mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
#else
{ClockControl::ClockCurrentDrive::_6mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Fractional, ClockControl::ClockPowerDown::Power_Off}, // CLK0: MUST be Fractional for 8 MHz!
#endif
{ClockControl::ClockCurrentDrive::_6mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
{ClockControl::ClockCurrentDrive::_4mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Fractional, ClockControl::ClockPowerDown::Power_Off},
{ClockControl::ClockCurrentDrive::_8mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
{ClockControl::ClockCurrentDrive::_2mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK4: HackRF r9 - not inverted
{ClockControl::ClockCurrentDrive::_2mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK5: HackRF r9 - not used
{ClockControl::ClockCurrentDrive::_2mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
// CLK6: Not used
{ClockControl::ClockCurrentDrive::_2mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
#endif
// CLK7: Not used
{ClockControl::ClockCurrentDrive::_2mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, ClockControl::MultiSynthSource::PLLA, ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off},
}};
ClockManager::Reference ClockManager::get_reference() const {
return reference;
}
@@ -380,8 +401,8 @@ void ClockManager::init_clock_generator() {
/* PRALINE uses Si5351A with:
* CLK0 = AFE_CLK (codec/FPGA sample clock)
* CLK1 = SCT_CLK (FPGA timing clock at 2x sample rate)
* CLK4 = first IF (RFFC5072)
* CLK5 = second IF (MAX2831)
* CLK4 = second IF (MAX2831)
* CLK5 = first IF (RFFC5072)
* Uses PLLA on XTAL only (no CLKIN support).
*/
@@ -468,6 +489,21 @@ void ClockManager::init_clock_generator() {
// CRITICAL: Add delay to ensure Si5351 writes complete before I2C bus stops
chThdSleepMilliseconds(100);
// ===== ADD THIS SAFETY BLOCK =====
// Pre-configure CLK4/CLK5 with correct settings including inversion.
// This ensures the registers have correct values even if enable_if_clocks()
// is not called or fails. The clocks will still be powered off until
// enable_if_clocks() enables the outputs.
// CLK5: OFF (for now), Integer, PLLA, INVERTED, MS_Self, 6mA = 0xDE
// (Same as 0x5E but with bit 7 set for power off)
clock_generator.write_register(21, 0xDE);
// CLK4: OFF (for now), Integer, PLLA, INVERTED, MS_Self, 4mA = 0xDD
clock_generator.write_register(20, 0xDD);
// ===== END SAFETY BLOCK =====
#else
// Wait for PLL(s) to lock - with timeout to prevent hang
uint8_t device_status_mask = hackrf_r9
@@ -475,14 +511,8 @@ void ClockManager::init_clock_generator() {
: (ref_pll == ClockControl::MultiSynthSource::PLLB)
? 0x40
: 0x20;
#ifndef PRALINE
while ((clock_generator.device_status() & device_status_mask) != 0);
#else
uint32_t pll_timeout = 100000;
while ((clock_generator.device_status() & device_status_mask) != 0 && pll_timeout > 0) {
pll_timeout--;
}
#endif
clock_generator.set_clock_control(
clock_generator_output_mcu_clkin,
@@ -558,11 +588,11 @@ void ClockManager::enable_codec_clocks() {
#ifdef PRALINE
/* PRALINE: CLK0 (AFE_CLK) for codec/FPGA, CLK1 (SCT_CLK) for FPGA timing.
* Reference hackrf_core.c shows PRALINE needs both CLK0 and CLK1. */
clock_generator.enable_clock(clock_generator_output_og_codec); /* CLK0 */
clock_generator.enable_clock(clock_generator_output_og_cpld); /* CLK1 */
clock_generator.enable_clock(clock_generator_output_og_codec); /* CLK0 MAX5864*/
clock_generator.enable_clock(clock_generator_output_og_cpld); /* CLK1 iCE40 FPGA*/
clock_generator.enable_clock(clock_generator_output_og_sgpio); /* CLK2 LPC43xx*/
clock_generator.enable_output_mask(
(1U << clock_generator_output_og_codec) |
(1U << clock_generator_output_og_cpld));
(1U << clock_generator_output_og_codec) | (1U << clock_generator_output_og_cpld) | (1U << clock_generator_output_og_sgpio));
#else
if (hackrf_r9) {
clock_generator.enable_clock(clock_generator_output_r9_sgpio);
@@ -590,12 +620,12 @@ void ClockManager::disable_codec_clocks() {
* CLKx_DISABLE_STATE.
*/
#ifdef PRALINE
/* PRALINE: CLK0 (AFE_CLK) and CLK1 (SCT_CLK) used for codec/FPGA */
/* PRALINE: CLK0 (AFE_CLK), CLK1 (SCT_CLK), and CLK2 MCU used for codec/FPGA */
clock_generator.disable_output_mask(
(1U << clock_generator_output_og_codec) |
(1U << clock_generator_output_og_cpld));
(1U << clock_generator_output_og_codec) | (1U << clock_generator_output_og_cpld) | (1U << clock_generator_output_og_sgpio));
clock_generator.disable_clock(clock_generator_output_og_codec);
clock_generator.disable_clock(clock_generator_output_og_cpld);
clock_generator.disable_clock(clock_generator_output_og_sgpio);
#else
if (hackrf_r9) {
clock_generator.disable_output_mask(1U << clock_generator_output_r9_sgpio);
@@ -612,7 +642,28 @@ void ClockManager::disable_codec_clocks() {
void ClockManager::enable_if_clocks() {
#ifdef PRALINE
/* PRALINE uses CLK4 (first IF) and CLK5 (second IF) like original HackRF One */
/* PRALINE: CLK4=MAX2831, CLK5=RFFC5072
*
* Force-write complete configuration to guarantee correct setup.
* Added force-write to verify correct registers are applying necessary register clock settings.
*/
// Configure and enable CLK4 (MAX2831)
// Register 20: ON, Integer, PLLA, INVERTED, MS_Self, 4mA = 0x5D
clock_generator.write_register(20, 0x5D);
// Configure and enable CLK5 (RFFC5072) - CRITICAL!
// Register 21: ON, Integer, PLLA, INVERTED, MS_Self, 6mA = 0x5E
clock_generator.write_register(21, 0x5E);
// Enable outputs (register 3, bits 4 and 5 = 0)
uint8_t reg3 = clock_generator.read_register(3);
reg3 &= ~0x30;
clock_generator.write_register(3, reg3);
chThdSleepMilliseconds(10);
/* PRALINE uses CLK5 (first IF) and CLK4 (second IF) */
clock_generator.enable_clock(clock_generator_output_og_first_if);
clock_generator.enable_output_mask(1U << clock_generator_output_og_first_if);
clock_generator.enable_clock(clock_generator_output_og_second_if);
@@ -662,7 +713,7 @@ void ClockManager::set_sampling_frequency(const uint32_t frequency) {
_base_band_frequency = frequency;
// Set FPGA decimation to 0 (no decimation) for direct passthrough
fpga_debug_register_write(2, 0);
fpga_debug_register_write(2, 0x00);
radio::invalidate_spi_config();
// The following was originally from @kitty. Adopting for testing radio.
+73 -4
View File
@@ -33,6 +33,76 @@ using namespace portapack;
namespace ui::external_app::acars_rx {
// ACARS frame field layout (0-based byte offsets):
// [0] SOH framing byte (skipped)
// [1..7] Aircraft registration (7 chars)
// [8] STX framing byte (skipped)
// [9..10] Label (2 chars)
// [11] Block ID (1 char)
// [12..14] Message number (3 chars)
// [15..20] Flight ID (6 chars)
// [21..N-3] Free-text payload (variable)
// [N-2..N-1] CRC-16/CCITT (2 bytes, MSB first, NOT part of payload)
//
// Minimum valid frame: 21-byte fixed header + 2 CRC bytes = 23 bytes.
// (A zero-length payload is legal per spec; we require at least 23 bytes.)
static constexpr std::string::size_type kAcarsCrcLen = 2;
static constexpr std::string::size_type kAcarsHeaderLen = 21;
static constexpr std::string::size_type kAcarsMinLen = kAcarsHeaderLen + kAcarsCrcLen;
// CRC-16/CCITT: poly 0x1021, init 0x0000, no reflection, no final XOR.
// This is the variant used by ACARS (same as XMODEM CRC).
static uint16_t acars_crc16(const std::string& data, std::string::size_type len) {
uint16_t crc = 0x0000;
for (std::string::size_type i = 0; i < len; ++i) {
crc ^= static_cast<uint16_t>(static_cast<uint8_t>(data[i])) << 8;
for (int bit = 0; bit < 8; ++bit) {
if (crc & 0x8000)
crc = static_cast<uint16_t>((crc << 1) ^ 0x1021);
else
crc = static_cast<uint16_t>(crc << 1);
}
}
return crc;
}
AcarsDecoded acars_decode(const std::string& raw) {
AcarsDecoded result;
if (raw.size() < kAcarsMinLen) {
result.txt = "ACARS message too short (" + std::to_string(raw.size()) +
" bytes, need " + std::to_string(kAcarsMinLen) + ")";
return result;
}
// Verify CRC: computed over everything except the last 2 bytes,
// then compared against those 2 bytes (MSB first).
const std::string::size_type payload_len = raw.size() - kAcarsCrcLen;
const uint16_t computed = acars_crc16(raw, payload_len);
const uint16_t received = (static_cast<uint16_t>(static_cast<uint8_t>(raw[raw.size() - 2])) << 8) |
static_cast<uint16_t>(static_cast<uint8_t>(raw[raw.size() - 1]));
result.crc_ok = (computed == received);
result.reg = raw.substr(1, 7);
result.label = raw.substr(9, 2);
result.block_id = raw[11];
result.msg_num = raw.substr(12, 3);
result.flight_id = raw.substr(15, 6);
// Payload sits between end of fixed header and the 2 trailing CRC bytes.
if (payload_len > kAcarsHeaderLen)
result.txt = raw.substr(kAcarsHeaderLen, payload_len - kAcarsHeaderLen);
return result;
}
std::string acars_format(const AcarsDecoded& msg) {
return std::string("ACARS Decoded Result\nCRC: ") + (msg.crc_ok ? "OK" : "FAIL") +
"\nRegistration: " + msg.reg +
"\nLabel: " + msg.label +
"\nBlockID: " + msg.block_id +
"\nMsgNum: " + msg.msg_num +
"\nFlightID: " + msg.flight_id +
"\nMessage: " + msg.txt;
}
void ACARSLogger::log_str(std::string msg) {
log_file.write_entry(msg);
}
@@ -77,17 +147,16 @@ void ACARSAppView::focus() {
void ACARSAppView::on_packet(const ACARSPacketMessage* packet) {
std::string console_info;
if (packet->state == 255) {
// got a packet, parse it, and display
rtc::RTC datetime;
rtc_time::now(datetime);
// todo parity error recovery
console_info = to_string_datetime(datetime, HMS);
console_info += ": ";
console_info += packet->message;
std::string message{packet->message, packet->message + packet->msg_len};
AcarsDecoded decoded = acars_decode(message);
console_info += acars_format(decoded);
console.writeln(console_info);
// Log raw data whatever it contains
if (logger && logging)
logger->log_str(console_info);
} else {
+21 -1
View File
@@ -33,6 +33,26 @@
namespace ui::external_app::acars_rx {
// Decoded ACARS message fields extracted from a raw frame.
// CRC-16/CCITT (poly 0x1021, init 0x0000) is verified against the two
// trailing bytes of the raw frame; crc_ok reflects that result.
struct AcarsDecoded {
bool crc_ok{false};
std::string reg{};
std::string label{};
std::string flight_id{};
std::string msg_num{};
char block_id{'\0'};
std::string txt{};
};
// Decode a raw ACARS frame: verify CRC-16/CCITT and extract fixed-offset fields.
// Returns a partially-filled AcarsDecoded (txt error only) if the frame is too short.
AcarsDecoded acars_decode(const std::string& raw);
// Format a decoded ACARS message for display or logging.
std::string acars_format(const AcarsDecoded& msg);
class ACARSLogger {
public:
Optional<File::Error> append(const std::filesystem::path& filename) {
@@ -106,4 +126,4 @@ class ACARSAppView : public View {
} // namespace ui::external_app::acars_rx
#endif /*__ACARS_APP_H__*/
#endif /*__ACARS_APP_H__*/
+83 -83
View File
@@ -1,83 +1,83 @@
/*
* Copyright (C) 2023 Bernd Herzog
*
* This file is part of PortaPack.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
#include "ui.hpp"
#include "acars_app.hpp"
#include "ui_navigation.hpp"
#include "external_app.hpp"
namespace ui::external_app::acars_rx {
void initialize_app(ui::NavigationView& nav) {
nav.push<ACARSAppView>();
}
} // namespace ui::external_app::acars_rx
extern "C" {
__attribute__((section(".external_app.app_acars_rx.application_information"), used)) application_information_t _application_information_acars_rx = {
/*.memory_location = */ (uint8_t*)0x00000000,
/*.externalAppEntry = */ ui::external_app::acars_rx::initialize_app,
/*.header_version = */ CURRENT_HEADER_VERSION,
/*.app_version = */ VERSION_MD5,
/*.app_name = */ "ACARS",
/*.bitmap_data = */ {
0x80,
0x01,
0xC0,
0x03,
0xC0,
0x03,
0xC0,
0x03,
0xC0,
0x03,
0xE0,
0x07,
0xF8,
0x1F,
0xFE,
0x7F,
0xFF,
0xFF,
0xFF,
0xFF,
0xC0,
0x03,
0xC0,
0x03,
0xC0,
0x03,
0xE0,
0x07,
0xF0,
0x0F,
0xF8,
0x1F,
},
/*.icon_color = */ ui::Color::orange().v,
/*.menu_location = */ app_location_t::RX,
/*.desired_menu_position = */ -1,
/*.m4_app_tag = portapack::spi_flash::image_tag_acars */ {'P', 'A', 'C', 'A'},
/*.m4_app_offset = */ 0x00000000, // will be filled at compile time
};
}
/*
* Copyright (C) 2023 Bernd Herzog
*
* This file is part of PortaPack.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
#include "ui.hpp"
#include "acars_app.hpp"
#include "ui_navigation.hpp"
#include "external_app.hpp"
namespace ui::external_app::acars_rx {
void initialize_app(ui::NavigationView& nav) {
nav.push<ACARSAppView>();
}
} // namespace ui::external_app::acars_rx
extern "C" {
__attribute__((section(".external_app.app_acars_rx.application_information"), used)) application_information_t _application_information_acars_rx = {
/*.memory_location = */ (uint8_t*)0x00000000,
/*.externalAppEntry = */ ui::external_app::acars_rx::initialize_app,
/*.header_version = */ CURRENT_HEADER_VERSION,
/*.app_version = */ VERSION_MD5,
/*.app_name = */ "ACARS",
/*.bitmap_data = */ {
0x80,
0x01,
0xC0,
0x03,
0xC0,
0x03,
0xC0,
0x03,
0xC0,
0x03,
0xE0,
0x07,
0xF8,
0x1F,
0xFE,
0x7F,
0xFF,
0xFF,
0xFF,
0xFF,
0xC0,
0x03,
0xC0,
0x03,
0xC0,
0x03,
0xE0,
0x07,
0xF0,
0x0F,
0xF8,
0x1F,
},
/*.icon_color = */ ui::Color::orange().v,
/*.menu_location = */ app_location_t::RX,
/*.desired_menu_position = */ -1,
/*.m4_app_tag = portapack::spi_flash::image_tag_acars */ {'P', 'A', 'C', 'A'},
/*.m4_app_offset = */ 0x00000000, // will be filled at compile time
};
}
+2 -2
View File
@@ -789,8 +789,8 @@ void DinoGameView::draw_current_score() {
void DinoGameView::draw_high_score() {
auto style = *ui::Theme::getInstance()->fg_light;
painter.fill_rectangle({UI_POS_X_RIGHT(90), 28, 90, 18}, Color::black());
painter.draw_string({UI_POS_X_RIGHT(90), 30}, style, "HI " + score_to_string(highScore));
painter.fill_rectangle({UI_POS_X_RIGHT(10), 28, 90, 18}, Color::black());
painter.draw_string({UI_POS_X_RIGHT(10), 30}, style, "HI " + score_to_string(highScore));
}
void DinoGameView::jump() {
+2 -2
View File
@@ -1081,7 +1081,7 @@ void DoomView::paint(Painter& painter) {
int hud_y = RENDER_HEIGHT + 5;
painter.draw_string({5, hud_y}, style_yellow, "Health: " + std::to_string(player.health));
painter.draw_string({UI_POS_X_CENTER(15), hud_y}, style_red, "Kills: " + std::to_string(kills));
painter.draw_string({UI_POS_X_RIGHT(80), hud_y}, style_blue, "Ammo: " + std::to_string(player.ammo));
painter.draw_string({UI_POS_X_RIGHT(10), hud_y}, style_blue, "Ammo: " + std::to_string(player.ammo));
prev_velocity_moving = (player.velocity != 0);
needs_redraw = false;
@@ -1113,7 +1113,7 @@ void DoomView::paint(Painter& painter) {
int hud_y = RENDER_HEIGHT + 5;
painter.draw_string({5, hud_y}, style_yellow, "Health: " + std::to_string(player.health));
painter.draw_string({UI_POS_X_CENTER(15), hud_y}, style_red, "Kills: " + std::to_string(kills));
painter.draw_string({UI_POS_X_RIGHT(80), hud_y}, style_blue, "Ammo: " + std::to_string(player.ammo));
painter.draw_string({UI_POS_X_RIGHT(10), hud_y}, style_blue, "Ammo: " + std::to_string(player.ammo));
needs_gun_redraw = false;
}
+8 -3
View File
@@ -113,8 +113,8 @@ set(EXTCPPSRC
external/random_password/sha512.cpp
#acars
#external/acars_rx/main.cpp
#external/acars_rx/acars_app.cpp
external/acars_rx/main.cpp
external/acars_rx/acars_app.cpp
#wefax_rx 192 bytes
external/wefax_rx/main.cpp
@@ -308,6 +308,10 @@ set(EXTCPPSRC
external/rtty_tx/main.cpp
external/rtty_tx/ui_rtty_tx.cpp
external/rtty_tx/baudot.cpp
#pocsag_tx
external/pocsag_tx/main.cpp
external/pocsag_tx/ui_pocsag_tx.cpp
)
set(EXTAPPLIST
@@ -337,7 +341,7 @@ set(EXTAPPLIST
sstvtx
sstvrx
random_password
# acars_rx --not working
acars_rx
wefax_rx
noaaapt_rx
shoppingcart_lock
@@ -385,6 +389,7 @@ set(EXTAPPLIST
keeloqtx
rtty_rx
rtty_tx
pocsag_tx
)
# sdusb has type conflicts with PRALINE (HackRF Pro) - add only for non-PRALINE builds
+7
View File
@@ -98,6 +98,7 @@ MEMORY
ram_external_app_rtty_rx (rwx) : org = 0xADF90000, len = 32k
ram_external_app_rtty_tx (rwx) : org = 0xADFA0000, len = 32k
ram_external_app_tpmstx (rwx) : org = 0xADFB0000, len = 32k
ram_external_app_pocsag_tx (rwx) : org = 0xADFC0000, len = 32k
}
SECTIONS
@@ -552,5 +553,11 @@ SECTIONS
KEEP(*(.external_app.app_rtty_tx.application_information));
*(*ui*external_app*rtty_tx*);
} > ram_external_app_rtty_tx
.external_app_pocsag_tx : ALIGN(4) SUBALIGN(4)
{
KEEP(*(.external_app.app_pocsag_tx.application_information));
*(*ui*external_app*pocsag_tx*);
} > ram_external_app_pocsag_tx
}
+1
View File
@@ -137,6 +137,7 @@ LevelView::LevelView(NavigationView& nav)
else
v = SPEC_MODULATION;
field_mode.set_selected_index(v);
return; // Important ! Guru will occur if you don't return when modifying field from within on_change !
}
last_mode = v;
change_mode(v);
+83
View File
@@ -0,0 +1,83 @@
/*
* Copyright (C) 2023 Bernd Herzog
*
* This file is part of PortaPack.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
#include "ui.hpp"
#include "ui_pocsag_tx.hpp"
#include "ui_navigation.hpp"
#include "external_app.hpp"
namespace ui::external_app::pocsag_tx {
void initialize_app(ui::NavigationView& nav) {
nav.push<POCSAGTXView>();
}
} // namespace ui::external_app::pocsag_tx
extern "C" {
__attribute__((section(".external_app.app_pocsag_tx.application_information"), used)) application_information_t _application_information_pocsag_tx = {
/*.memory_location = */ (uint8_t*)0x00000000,
/*.externalAppEntry = */ ui::external_app::pocsag_tx::initialize_app,
/*.header_version = */ CURRENT_HEADER_VERSION,
/*.app_version = */ VERSION_MD5,
/*.app_name = */ "POCSG TX",
/*.bitmap_data = */ {
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0xFC,
0x3F,
0xFE,
0x7F,
0x02,
0x40,
0xBA,
0x45,
0x02,
0x40,
0xFE,
0x7F,
0xFE,
0x7F,
0x92,
0x7C,
0x92,
0x7C,
0xFC,
0x3F,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
},
/*.icon_color = */ ui::Color::green().v,
/*.menu_location = */ app_location_t::TX,
/*.desired_menu_position = */ -1,
/*.m4_app_tag = portapack::spi_flash::image_tag_fsktx */ {'P', 'F', 'S', 'K'},
/*.m4_app_offset = */ 0x00000000, // will be filled at compile time
};
}
@@ -31,7 +31,7 @@
using namespace portapack;
using namespace pocsag;
namespace ui {
namespace ui::external_app::pocsag_tx {
#define MAX_POCSAG_LENGTH 80
@@ -159,7 +159,7 @@ void POCSAGTXView::on_set_text(NavigationView& nav) {
POCSAGTXView::POCSAGTXView(
NavigationView& nav)
: nav_(nav) {
baseband::run_image(portapack::spi_flash::image_tag_fsktx);
baseband::run_prepared_image(portapack::memory::map::m4_code.base());
add_children({&labels,
&options_bitrate,
@@ -205,4 +205,4 @@ POCSAGTXView::POCSAGTXView(
};
}
} /* namespace ui */
} /* namespace ui::external_app::pocsag_tx */
@@ -37,7 +37,7 @@
using namespace pocsag;
namespace ui {
namespace ui::external_app::pocsag_tx {
class POCSAGTXView : public View {
public:
@@ -155,6 +155,6 @@ class POCSAGTXView : public View {
}};
};
} /* namespace ui */
} /* namespace ui::external_app::pocsag_tx */
#endif /*__POCSAG_TX_H__*/
+1
View File
@@ -461,6 +461,7 @@ ScannerView::ScannerView(
else
v = WFM_MODULATION;
field_mode.set_selected_index(v);
return; // Important ! Guru will occur if you don't return when modifying field from within on_change !
}
last_mode = v;
receiver_model.disable();
+4 -1
View File
@@ -36,8 +36,11 @@ WipeSDView::WipeSDView(NavigationView& nav)
}
WipeSDView::~WipeSDView() {
if (thread)
if (thread) {
chThdTerminate(thread);
chThdWait(thread);
thread = nullptr;
}
}
void WipeSDView::focus() {
+3 -2
View File
@@ -161,7 +161,7 @@ Optional<File::Error> File::sync() {
File::Result<std::string> File::read_file(const std::filesystem::path& filename) {
constexpr size_t buffer_size = 0x80;
char* buffer[buffer_size];
char buffer[buffer_size];
File f;
auto error = f.open(filename);
@@ -205,6 +205,7 @@ static std::filesystem::path find_last_ordinal_match(
const std::filesystem::path& pattern,
pattern_range range) {
auto last_match = std::filesystem::path();
if (range.start == std::string::npos || range.end == std::string::npos || range.start > range.end) return last_match;
auto can_increment = [range](const auto& path) {
for (auto i = range.start; i <= range.end; ++i)
if (!isdigit(path.native()[i]))
@@ -230,7 +231,7 @@ static std::filesystem::path increment_filename_ordinal(
const std::filesystem::path& path,
pattern_range range) {
auto name = path.filename().native();
if (range.start == std::string::npos || range.end == std::string::npos || range.start > range.end) return {name};
for (auto i = range.end; i >= range.start; --i) {
auto& c = name[i];
+1 -1
View File
@@ -117,7 +117,7 @@ class BufferLineReader {
std::strncpy(&it.line_data_[offset], buf, len);
offset += len;
if (len < buf_size)
if (len < buf_size || buf[len - 1] == '\n')
break;
}
+2 -1
View File
@@ -66,7 +66,8 @@ options_t freqman_bandwidths[6] = {
// NFM
{"8k5", 0},
{"11k", 1},
{"16k", 2},
{"12k5", 2},
{"16k", 3},
},
{
// WFM
+1 -2
View File
@@ -84,8 +84,7 @@ void Gradient::step(int16_t index, int16_t r, int16_t g, int16_t b) {
int16_t new_r = prev_r * y + r * x;
int16_t new_g = prev_g * y + g * x;
int16_t new_b = prev_b * y + b * x;
lut[i] = ui::Color(new_r, new_g, new_b);
if (i <= 255) lut[i] = ui::Color(new_r, new_g, new_b);
}
prev_index = index;
+20 -22
View File
@@ -38,20 +38,21 @@ using namespace hackrf::one;
#include <algorithm>
#include <cstring>
// Global debug tracking for MAX2831
struct max2831_debug_t {
uint32_t requested_freq_mhz;
uint32_t calculated_n;
uint32_t calculated_frac;
bool set_frequency_called;
bool frequency_valid;
};
extern "C" max2831_debug_t max2831_debug_info = {0, 0, 0, false, false};
namespace max2831 {
using namespace max283x;
static MAX2831Info max2831_info = {0, 0, 0, false, false};
MAX2831Info get_max2831_info() {
return {
max2831_info.requested_freq_mhz,
max2831_info.calculated_n,
max2831_info.calculated_frac,
max2831_info.set_frequency_called,
max2831_info.frequency_valid};
}
/*
* MAX2831 uses 9-bit SPI transfers.
* An 18-bit word is sent as two 9-bit transfers:
@@ -342,9 +343,6 @@ void MAX2831::set_lpf_rf_bandwidth_rx(const uint32_t bandwidth_minimum) {
_desired_lpf_bw = bandwidth_minimum;
#ifdef PRALINE
uint32_t actual_bw = bandwidth_minimum;
if (actual_bw < 22000000) {
actual_bw = 22000000; // Never go below 15 MHz, set by choosing 22.6 MHz bandwidth
}
_desired_lpf_bw = actual_bw;
if (_mode == Mode::Receive || _mode == Mode::Rx_Calibration) {
@@ -378,20 +376,20 @@ bool MAX2831::set_frequency(const rf::Frequency lo_frequency) {
*/
/* MAX2831 supports 2.3-2.6 GHz */
// if (lo_frequency < 2300000000ULL || lo_frequency > 2600000000ULL) {
// if (lo_frequency < MAX2831_MIN_LO_FREQUENCY_HZ || lo_frequency > MAX2831_MAX_LO_FREQUENCY_HZ) {
// return false;
// }
bool valid = (lo_frequency >= 2300000000ULL && lo_frequency <= 2600000000ULL);
bool valid = (lo_frequency >= MAX2831_MIN_LO_FREQUENCY_HZ && lo_frequency <= MAX2831_MAX_LO_FREQUENCY_HZ);
// TRACK REQUEST IMMEDIATELY
max2831_debug_info.requested_freq_mhz = lo_frequency / 1000000;
max2831_debug_info.set_frequency_called = true;
max2831_debug_info.frequency_valid = valid;
max2831_info.requested_freq_mhz = lo_frequency / 1000000;
max2831_info.set_frequency_called = true;
max2831_info.frequency_valid = valid;
if (!valid) {
max2831_debug_info.calculated_n = 0;
max2831_debug_info.calculated_frac = 0;
max2831_info.calculated_n = 0;
max2831_info.calculated_frac = 0;
return false;
}
@@ -414,8 +412,8 @@ bool MAX2831::set_frequency(const rf::Frequency lo_frequency) {
}
// TRACK CALCULATED VALUES
max2831_debug_info.calculated_n = div_int;
max2831_debug_info.calculated_frac = div_frac;
max2831_info.calculated_n = div_int;
max2831_info.calculated_frac = div_frac;
/* Write order matters - matches GSG reference */
/* REG 3: SYN_INT (bits 7:0) and SYN_FRAC_LO (bits 13:8) */
+15
View File
@@ -38,6 +38,21 @@ namespace max2831 {
using namespace max283x;
// Global debug tracking for MAX2831
struct MAX2831Info {
uint32_t requested_freq_mhz;
uint32_t calculated_n;
uint32_t calculated_frac;
bool set_frequency_called;
bool frequency_valid;
};
MAX2831Info get_max2831_info();
/* minumum and maximum lo_frequencies supported by max2831 */
constexpr rf::Frequency MAX2831_MIN_LO_FREQUENCY_HZ = 2300000000LL;
constexpr rf::Frequency MAX2831_MAX_LO_FREQUENCY_HZ = 2600000000LL;
/* MAX2831 has 16 registers, each containing 14 bits of data */
constexpr size_t reg_count = 16;
+5 -30
View File
@@ -65,7 +65,11 @@ constexpr halrtcnt_t ticks_during_reset = (base_m4_clk_f * seconds_during_reset
constexpr float seconds_after_reset = 5.0e-6;
constexpr halrtcnt_t ticks_after_reset = (base_m4_clk_f * seconds_after_reset + 1);
#ifdef PRALINE
constexpr rf::Frequency reference_frequency = 40000000ULL;
#else
constexpr auto reference_frequency = rffc5072_reference_f;
#endif
namespace vco {
@@ -114,31 +118,9 @@ constexpr size_t divider_min = 1U << divider_log2_min;
constexpr size_t divider_max = 1U << divider_log2_max;
constexpr size_t divider_log2(const rf::Frequency vco_frequency) {
#ifdef PRALINE
// PRALINE FIX: Avoid N register overflow (9-bit max = 511)
// With 40 MHz reference:
// - For VCO=5400 MHz, presc=÷2: N = (5400×2)/40 = 270 ✓
// - For VCO=5400 MHz, presc=÷4: N = (5400×4)/40 = 540 ✗ OVERFLOW!
//
// Maximum safe VCO for ÷4 prescaler:
// N_max = 511, so VCO_max = (511 × 40) / 4 = 5110 MHz
//
// Use ÷4 only if VCO < 5110 MHz AND VCO > 3200 MHz
// Use ÷2 for VCO >= 5110 MHz to avoid overflow
constexpr rf::Frequency overflow_threshold = 5110000000ULL; // Max VCO for ÷4
constexpr rf::Frequency min_presc4_freq = 3200000000ULL; // Min VCO for ÷4
if ((vco_frequency > min_presc4_freq) && (vco_frequency < overflow_threshold)) {
return divider_log2_max; // ÷4 prescaler
} else {
return divider_log2_min; // ÷2 prescaler
}
#else
return (vco_frequency > (prescaler::divider_min * prescaler::max_frequency))
? prescaler::divider_log2_max
: prescaler::divider_log2_min;
#endif
}
} /* namespace prescaler */
@@ -161,11 +143,7 @@ struct SynthConfig {
const size_t prescaler_divider_log2 = prescaler::divider_log2(vco_frequency);
#ifndef PRALINE
const uint64_t prescaled_lo_q24 = vco_frequency << (24 - prescaler_divider_log2);
#else
const uint64_t prescaled_lo_q24 = vco_frequency << (24 + prescaler_divider_log2);
#endif
const uint64_t n_divider_q24 = prescaled_lo_q24 / reference_frequency;
#ifdef PRALINE
@@ -197,11 +175,9 @@ struct SynthConfig {
*/
void RFFC507x::init() {
#ifndef PRALINE
gpio_rffc5072_resetx.set();
gpio_rffc5072_resetx.output();
reset();
#endif
_bus.init();
@@ -213,12 +189,10 @@ void RFFC507x::reset() {
/* TODO: Is RESETB pin ignored if sdi_ctrl.sipin=1? Programming guide
* description of sdi_ctrl.sipin suggests the pin is not ignored.
*/
#ifndef PRALINE
gpio_rffc5072_resetx.clear();
halPolledDelay(ticks_during_reset);
gpio_rffc5072_resetx.set();
halPolledDelay(ticks_after_reset);
#endif
}
void RFFC507x::flush() {
@@ -291,6 +265,7 @@ void RFFC507x::set_frequency(const rf::Frequency lo_frequency) {
const SynthConfig synth_config = SynthConfig::calculate(lo_frequency);
#ifdef PRALINE
// Calculate VCO frequency from LO frequency and divider
const size_t lo_divider = 1U << synth_config.lo_divider_log2; // 2^lodiv_log2
const rf::Frequency vco_freq = lo_frequency * lo_divider;
+2 -1
View File
@@ -81,7 +81,8 @@ struct header_t {
struct tags_t {
constexpr tags_t(
const std::string& title_str) {
strcpy(title, title_str.c_str());
strncpy(title, title_str.c_str(), sizeof(title) - 1);
title[sizeof(title) - 1] = '\0';
cksize = sizeof(tags_t) - 8;
}
Executable → Regular
+3 -1
View File
@@ -91,7 +91,7 @@ Continuous (Fox-oring)
// TODO: ADS-B draw trajectory + GPS coordinates + scale, and playback
// TODO: RDS multiple groups (sequence)
// TODO: Use ModalMessageView confirmation for TX ?
// TODO: Use msgpack for settings, lists... on sd card
// TODO: Use msgpack for settings, lists... on sd card. and make it safe, since now it has a lot of oob potentials
// Multimon-style stuff:
// TODO: DMR detector
@@ -181,7 +181,9 @@ static void event_loop() {
}
int main(void) {
#ifndef PRALINE // Do not perform quick set up of GP01_RFF507X = 1 for PRALINE
first_if.init(); /* To avoid initial short Ant_DC_Bias pulse ,we need quick set up GP01_RFF507X =1 */
#endif
if (config_mode_should_enter()) {
config_mode_clear();
+50 -3
View File
@@ -58,6 +58,10 @@ using asahi_kasei::ak4951::AK4951;
extern "C" {
#include "platform_detect.h"
#ifdef PRALINE
#include "fpga_bridge.h"
#endif
}
namespace portapack {
@@ -547,6 +551,12 @@ static void initialize_boot_splash_screen() {
*/
init_status_t init() {
#ifdef PRALINE
/* 1. HOLD FPGA IN RESET (Active Low) */
// P5_2 is GPIO2[11] (FPGA CRESET)
palClearPad(GPIO2, 11);
#endif
set_idivc_base_clocks(cgu::CLK_SEL::IDIVC);
i2c0.start(i2c_config_boot_clock);
@@ -579,6 +589,25 @@ init_status_t init() {
clock_manager.init_clock_generator();
#ifdef PRALINE
// Force CLK4/CLK5 configuration BEFORE I2C bus stops
// This ensures the inversion bits are written while I2C is still active
// CLK4 (MAX2831): ON, Integer, PLLA, INVERTED, MS_Self, 4mA = 0x5D
clock_manager.si5351_write_register(20, 0x5D);
// CLK5 (RFFC5072): ON, Integer, PLLA, INVERTED, MS_Self, 6mA = 0x5E
clock_manager.si5351_write_register(21, 0x5E);
// Enable CLK4 and CLK5 outputs NOW (before I2C stops)
uint8_t reg3 = clock_manager.si5351_read_register(3);
reg3 &= ~0x30; // Clear bits 4 and 5 to enable
clock_manager.si5351_write_register(3, reg3);
// Wait for clocks to stabilize
chThdSleepMilliseconds(10);
#endif
i2c0.stop();
chThdSleepMilliseconds(10);
@@ -618,6 +647,27 @@ init_status_t init() {
clock_manager.enable_if_clocks();
clock_manager.enable_codec_clocks();
#ifdef PRALINE
chThdSleepMilliseconds(20);
// This function returns LD_SUCCESS (0) if the FPGA confirms the bitstream
// Call fpga_bridge_init and continue boot regardless of result
// (Watchdog was resetting device when we halted with while(1))
int load_result = fpga_bridge_init();
(void)load_result; // Ignore result for now, just let boot continue
/* RELEASE FPGA RESET */
// FPGA wakes up and latches the stable 40MHz CLK1
// P5_2 is GPIO2[11] (FPGA CRESET)
palSetPad(GPIO2, 11);
// Allow FPGA and related logic a brief stabilization period without busy-waiting
chThdSleepMilliseconds(10);
// Keep LEDs off after FPGA load
LPC_GPIO->SET[2] = (1 << 1) | (1 << 2) | (1 << 8);
#endif
radio::init();
sdcStart(&SDCD1, nullptr);
@@ -637,9 +687,6 @@ init_status_t init() {
return_code = init_status_t::INIT_HACKRF_CPLD_FAILED;
}
#else
// HackRF Pro (PRALINE) uses FPGA - already loaded in board.cpp __early_init()
// via fpga_bridge_init(), so nothing to do here
#endif
if (lcd_fast_setup)
+54 -63
View File
@@ -32,10 +32,11 @@
extern "C" {
#include "fpga_bridge.h"
}
#else
#include "baseband_cpld.hpp"
#endif
#include "max5864.hpp"
#include "baseband_cpld.hpp"
#include "tuning.hpp"
@@ -116,9 +117,10 @@ max2837::MAX2837 second_if_max2837{ssp1_target_max283x};
max2839::MAX2839 second_if_max2839{ssp1_target_max283x};
#ifdef PRALINE
max2831::MAX2831 second_if_max2831{ssp1_target_max283x};
#else
static baseband::CPLD baseband_cpld;
#endif
static max5864::MAX5864 baseband_codec{ssp1_target_max5864};
static baseband::CPLD baseband_cpld;
// load_sram() is called at boot in portapack.cpp, including verify CPLD part, so default direction is Receive
static rf::Direction direction{rf::Direction::Receive};
@@ -145,25 +147,43 @@ void init() {
? (max283x::MAX283x*)&second_if_max2839
: (max283x::MAX283x*)&second_if_max2837;
#endif
rf_path.init();
first_if.init();
second_if->init();
baseband_codec.init();
#ifndef PRALINE
/* HackRF One uses CPLD for Q inversion control.
* PRALINE uses FPGA and the pin (P2_3) is used for LCD_TE on H4M. */
baseband_cpld.init();
#else
#ifdef PRALINE
/* Praline-Specific Bus and Gateware Configuration */
// SYNC SGPIO TO FPGA CLOCK:
// Configure all 16 SGPIO slices to use the external clock (SGPIO8)
// provided by the FPGA. This allows the MCU to stay at 40MHz
// while the data bus scales to the RF sample rate.
// Bit 2:1 of SGPIO_MUX_CFG = 01 (External clock from SGPIO8)
// SYNC SGPIO TO FPGA CLOCK WITH FALLING EDGE LATCH
for (int i = 0; i < 16; i++) {
// (1 << 1) = External clock from SGPIO8
// (1 << 3) = Sample on the FALLING edge of the clock
LPC_SGPIO->SGPIO_MUX_CFG[i] = (1 << 1) | (1 << 3);
}
/* Initialize FPGA registers - DC_BLOCK must be enabled for RX */
// debug::fpga::init();
// These FPGA registers control DC_BLOCK, Q-Inv, QUARTER SHIFT, and Decimation.
fpga_debug_register_write(1, 0x01); // DC_BLOCK=1, QUARTER_SHIFT=0, Q_INVERT=0
fpga_debug_register_write(2, 0x00); // RX_DECIM=0 (no decimation for testing)
fpga_debug_register_write(2, 0x00); // RX_DECIM=No Decim
fpga_debug_register_write(3, 0x00); // TX_CTRL=0
fpga_debug_register_write(4, 0x00); // TX_INTRP=0
fpga_debug_register_write(5, 0x00); // TX_PSTEP=0
ssp1_arbiter.invalidate();
chThdSleepMilliseconds(10); // Let FPGA registers settle
#else
/* HackRF One uses CPLD for Q inversion control.
* PRALINE uses FPGA and the pin (P2_3) is used for LCD_TE on H4M. */
baseband_cpld.init();
#endif
}
@@ -202,19 +222,20 @@ void set_direction(const rf::Direction new_direction) {
*/
baseband_invert = false;
}
#ifndef PRALINE
baseband_cpld.set_invert(mixer_invert ^ baseband_invert);
#else
// TEST: Force baseband invert for Praline (like r9)
// baseband_invert = (direction == rf::Direction::Receive);
// Praline: Control Q inversion via FPGA register
uint8_t ctrl_reg = 0x01; // DC_BLOCK enabled
if (mixer_invert ^ baseband_invert) {
ctrl_reg |= 0x02; // Set Q_INVERT bit
#ifdef PRALINE
// Q inversion controlled by GPIO0[13] (SGPIO12), not FPGA register
bool q_invert = mixer_invert ^ baseband_invert;
if (q_invert) {
LPC_GPIO->SET[0] = (1 << 13); // SGPIO12 = 1 (Q inverted)
} else {
LPC_GPIO->CLR[0] = (1 << 13); // SGPIO12 = 0 (Q normal)
}
fpga_debug_register_write(1, ctrl_reg);
ssp1_arbiter.invalidate();
#else
baseband_cpld.set_invert(mixer_invert ^ baseband_invert);
#endif
second_if->set_mode((direction == rf::Direction::Transmit) ? max283x::Mode::Transmit : max283x::Mode::Receive);
@@ -261,6 +282,10 @@ bool set_tuning_frequency(const rf::Frequency frequency) {
if (tuning_config.first_lo_frequency) {
first_if.set_frequency(tuning_config.first_lo_frequency);
first_if.enable();
#ifdef PRALINE
first_if.flush(); // Force register write with reference clock present
chThdSleepMilliseconds(10); // Allow PLL to settle
#endif
}
// Program second local oscillator frequency into MAX283x
@@ -268,19 +293,20 @@ bool set_tuning_frequency(const rf::Frequency frequency) {
rf_path.set_band(tuning_config.rf_path_band);
mixer_invert = tuning_config.mixer_invert;
#ifndef PRALINE
baseband_cpld.set_invert(mixer_invert ^ baseband_invert);
#else
// TEST: Force baseband invert for Praline (like r9)
// baseband_invert = (direction == rf::Direction::Receive);
// PRALINE: Update FPGA Q inversion when tuning changes
uint8_t ctrl_reg = 0x01; // DC_BLOCK enabled
if (mixer_invert ^ baseband_invert) {
ctrl_reg |= 0x02; // Set Q_INVERT bit
#ifdef PRALINE
// Q inversion controlled by GPIO0[13] (SGPIO12), not FPGA register
bool q_invert = mixer_invert ^ baseband_invert;
if (q_invert) {
LPC_GPIO->SET[0] = (1 << 13); // SGPIO12 = 1 (Q inverted)
} else {
LPC_GPIO->CLR[0] = (1 << 13); // SGPIO12 = 0 (Q normal)
}
fpga_debug_register_write(1, ctrl_reg);
ssp1_arbiter.invalidate();
#else
baseband_cpld.set_invert(mixer_invert ^ baseband_invert);
#endif
return result_second_if;
@@ -350,20 +376,6 @@ void set_rx_max283x_iq_phase_calibration(const size_t v) {
second_if->set_rx_LO_iq_phase_calibration(v);
}
/*void enable(Configuration configuration) {
configure(configuration);
}
void configure(Configuration configuration) {
set_tuning_frequency(configuration.tuning_frequency);
set_rf_amp(configuration.rf_amp);
set_lna_gain(configuration.lna_gain);
set_vga_gain(configuration.vga_gain);
set_baseband_rate(configuration.baseband_rate);
set_baseband_filter_bandwidth(configuration.baseband_filter_bandwidth);
set_direction(configuration.direction);
}*/
void disable() {
set_antenna_bias(false);
baseband_codec.set_mode(max5864::Mode::Shutdown);
@@ -457,27 +469,6 @@ TuningInfo get_tuning_info() {
namespace second_if {
#ifdef PRALINE
extern "C" {
extern struct max2831_debug_t {
uint32_t requested_freq_mhz;
uint32_t calculated_n;
uint32_t calculated_frac;
bool set_frequency_called;
bool frequency_valid;
} max2831_debug_info;
}
MAX2831Info get_max2831_info() {
return {
max2831_debug_info.requested_freq_mhz,
max2831_debug_info.calculated_n,
max2831_debug_info.calculated_frac,
max2831_debug_info.set_frequency_called,
max2831_debug_info.frequency_valid};
}
#endif
uint32_t register_read(const size_t register_number) {
return radio::second_if->read(register_number);
}
-11
View File
@@ -95,17 +95,6 @@ TuningInfo get_tuning_info();
namespace second_if {
#ifdef PRALINE
struct MAX2831Info {
uint32_t requested_freq_mhz;
uint32_t calculated_n;
uint32_t calculated_frac;
bool set_frequency_called;
bool frequency_valid;
};
MAX2831Info get_max2831_info();
#endif
uint32_t register_read(const size_t register_number);
void register_write(const size_t register_number, uint32_t value);
+2 -1
View File
@@ -63,9 +63,10 @@ static constexpr std::array<baseband::AMConfig, 12> am_configs{{
{taps_6k0_narrow_decim_1, taps_6k0_decim_2, taps_2k6_usb_wefax_channel, AMConfigureMessage::Modulation::SSB_FM, apt_audio_12k_lpf_1500hz_config, (int)AMConfigureMessage::Zoom_waterfall::ZOOM_x_2}, // SSB USB+FM to demod. Subcarrier FM Audio Tones to get APT Weather Fax with waterfall zoom x 2 (we need taps_6k0_narrow_decim_1 to minimize aliasing)
}};
static constexpr std::array<baseband::NBFMConfig, 3> nbfm_configs{{
static constexpr std::array<baseband::NBFMConfig, 4> nbfm_configs{{
{taps_4k25_decim_0, taps_4k25_decim_1, taps_4k25_channel, 2500},
{taps_11k0_decim_0, taps_11k0_decim_1, taps_11k0_channel, 2500},
{taps_12k5_decim_0, taps_12k5_decim_1, taps_12k5_channel, 2500},
{taps_16k0_decim_0, taps_16k0_decim_1, taps_16k0_channel, 5000},
}};
+4
View File
@@ -48,7 +48,11 @@ class ReceiverModel {
struct settings_t {
uint32_t baseband_bandwidth = max283x::filter::bandwidth_minimum;
#ifdef PRALINE
uint32_t sampling_rate = 4'000'000;
#else
uint32_t sampling_rate = 3'072'000;
#endif
rf::Frequency frequency_step = 25'000;
rf::Frequency frequency_app_override = 0;
uint8_t lna_gain_db = 32;
+3 -2
View File
@@ -108,9 +108,10 @@ void resetFilteredEntries(ContainerType& entries, KeySelector keySelector) {
auto it = entries.begin();
while (it != entries.end()) {
if (keySelector(*it)) {
entries.erase(it); // Add a new entry to filteredEntries
it = entries.erase(it); // Add a new entry to filteredEntries
} else {
++it; // Move to the next element, outside of the if block
}
++it; // Move to the next element, outside of the if block
}
}
+7 -7
View File
@@ -41,14 +41,14 @@ namespace {
*/
struct PralineConfig {
bool tx_en;
bool mix_en_n; // Inverted: 0 = mixer enabled
bool mix_bypass; // RF path mixer bypass (GPIO3[2])
bool lpf_en;
bool rf_amp_en;
bool ant_bias_en_n; // Inverted: 0 = bias enabled
static void gpio_init() {
gpio_tx_enable.output();
gpio_mix_enable_n.output();
gpio_mix_bypass.output();
gpio_lpf_enable.output();
gpio_rf_amp_enable.output();
gpio_ant_bias_disable.output();
@@ -56,7 +56,7 @@ struct PralineConfig {
void apply() const {
gpio_tx_enable.write(tx_en);
gpio_mix_enable_n.write(mix_en_n);
gpio_mix_bypass.write(mix_bypass); // Control RF path mixer
gpio_lpf_enable.write(lpf_en);
gpio_rf_amp_enable.write(rf_amp_en);
gpio_ant_bias_disable.write(ant_bias_en_n);
@@ -239,7 +239,7 @@ void Path::init() {
/* Set safe initial state: RX mode, mixer enabled, LPF on, amp off, no bias */
PralineConfig config = {
.tx_en = false,
.mix_en_n = false, // Mixer enabled (inverted)
.mix_bypass = false, // RF path mixer bypass (GPIO3[2])
.lpf_en = true, // LPF on for low band
.rf_amp_en = false, // Amp off
.ant_bias_en_n = true // Bias off (inverted)
@@ -276,7 +276,7 @@ void Path::update() {
#ifdef PRALINE
/* PRALINE RF path control:
* - tx_en: 1 for TX, 0 for RX
* - mix_en_n: 0 to enable mixer (inverted), 1 to bypass
* - mix_bypass: 0 to enable RF path mixer bypass (GPIO3[2])
* - lpf_en: 1 for low band (< 2.4 GHz), 0 for high band
* - rf_amp_en: 1 to enable RF amplifier
* - ant_bias_en_n: 0 to enable antenna bias (inverted)
@@ -294,8 +294,8 @@ void Path::update() {
config.tx_en = (direction == Direction::Transmit);
/* Mixer bypass for mid band (2.3-2.7 GHz direct to MAX2831) */
config.mix_en_n = (band == Band::Mid); // 1 = bypass (disabled)
// RF path mixer bypass: 0=enabled, 1=bypassed
config.mix_bypass = (band == Band::Mid);
/* Move to the final state by turning on required signals. */
/* LPF for low band */
+8
View File
@@ -39,9 +39,17 @@ enum class Direction {
namespace path {
#ifdef PRALINE
/* PRALINE: MAX2831 direct path is 2320-2740 MHz */
constexpr FrequencyRange band_low{0, 2320'000'000};
constexpr FrequencyRange band_high{2740'000'000, 7250'000'000};
constexpr FrequencyRange band_mid{band_low.maximum, band_high.minimum};
#else
/* HackRF One: Original band boundaries */
constexpr FrequencyRange band_low{0, 2170'000'000};
constexpr FrequencyRange band_high{2740'000'000, 7250'000'000};
constexpr FrequencyRange band_mid{band_low.maximum, band_high.minimum};
#endif
enum class Band {
/* Zero-based, used as index into frequency_bands table */
-1
View File
@@ -31,7 +31,6 @@
#include "shell.hpp"
#include "chprintf.h"
#include "portapack.hpp"
#include "../flashsize.h"
extern "C" {
#include "platform_detect.h"
+2 -1
View File
@@ -100,7 +100,8 @@ std::string to_string_dec_uint(uint64_t n) {
std::string to_string_bin(
const uint32_t n,
const uint8_t l) {
uint8_t l) {
if (l >= 33) l = 32;
char p[33];
for (uint8_t c = 0; c < l; c++) {
if (n & (1 << (l - 1 - c)))
+1 -1
View File
@@ -50,7 +50,7 @@ char* to_string_dec_uint(uint64_t n, StringFormatBuffer& buffer, size_t& length)
std::string to_string_dec_int(int64_t n);
std::string to_string_dec_uint(uint64_t n);
std::string to_string_bin(const uint32_t n, const uint8_t l = 0);
std::string to_string_bin(const uint32_t n, uint8_t l = 0);
std::string to_string_dec_uint(const uint32_t n, const int32_t l, const char fill = ' ');
std::string to_string_dec_int(const int32_t n, const int32_t l, const char fill = 0);
std::string to_string_decimal(float decimal, int8_t precision);
+27 -27
View File
@@ -32,40 +32,40 @@ namespace ui {
class ThemeTemplate {
public:
~ThemeTemplate();
Style* bg_lightest;
Style* bg_lightest_small;
Style* bg_light;
Style* bg_medium;
Style* bg_dark;
Style* bg_darker;
virtual ~ThemeTemplate();
Style* bg_lightest = nullptr;
Style* bg_lightest_small = nullptr;
Style* bg_light = nullptr;
Style* bg_medium = nullptr;
Style* bg_dark = nullptr;
Style* bg_darker = nullptr;
Style* bg_darkest;
Style* bg_darkest_small;
Style* bg_darkest = nullptr;
Style* bg_darkest_small = nullptr;
Style* bg_important_small;
Style* bg_important_small = nullptr;
Style* error_dark;
Style* warning_dark;
Style* ok_dark;
Style* error_dark = nullptr;
Style* warning_dark = nullptr;
Style* ok_dark = nullptr;
Style* fg_dark;
Style* fg_medium;
Style* fg_light;
Style* fg_dark = nullptr;
Style* fg_medium = nullptr;
Style* fg_light = nullptr;
Style* fg_red;
Style* fg_green;
Style* fg_yellow;
Style* fg_orange;
Style* fg_blue;
Style* fg_cyan;
Style* fg_darkcyan;
Style* fg_magenta;
Style* fg_red = nullptr;
Style* fg_green = nullptr;
Style* fg_yellow = nullptr;
Style* fg_orange = nullptr;
Style* fg_blue = nullptr;
Style* fg_cyan = nullptr;
Style* fg_darkcyan = nullptr;
Style* fg_magenta = nullptr;
Style* option_active;
Style* option_active = nullptr;
Color* status_active; // green, the status bar icons when active
Color* bg_table_header;
Color* status_active = nullptr; // green, the status bar icons when active
Color* bg_table_header = nullptr;
};
class ThemeDefault : public ThemeTemplate {
+104 -13
View File
@@ -31,18 +31,86 @@ Config low_band(const rf::Frequency target_frequency);
Config mid_band(const rf::Frequency target_frequency);
Config high_band(const rf::Frequency target_frequency);
// Low band <2170 Mhz:
#ifdef PRALINE
/*
* PRALINE Tuning Configuration
* ============================
*
* Reference: hackrf_usb/common/tune_config.h praline_tune_config_rx[]
*
* The hackrf_usb firmware uses a table-driven approach where each entry
* specifies:
* - rf_range_end_mhz: Upper frequency limit for this config
* - if_mhz: IF frequency (what MAX2831 tunes to)
* - high_lo: true = high-side injection, false = low-side
* - shift: FPGA quarter-shift mode (not implemented in Mayhem yet)
*
* Key insight: The IF frequency varies to keep the RFFC5072 VCO in a
* safe operating range (ideally 3500-5000 MHz, avoiding extremes).
*
* RFFC5072 VCO calculation:
* High-side injection: LO = IF + RF, VCO = LO × lodiv
* Low-side injection: LO = IF - RF, VCO = LO × lodiv
* Where lodiv = 2 for frequencies where VCO > 2700 MHz
*
* From hackrf_usb tune_config_rx (simplified):
* 0-2100 MHz: IF=2375, high_lo=true VCO = (2375+RF)×2
* 2105-2115: IF=2375, high_lo=false VCO = (2375-RF)×2
* 2115-2130: IF=2425, high_lo=false VCO = (2425-RF)×2
* ... (more entries for fine-grained control)
* 2320-2580: IF=0 (bypass mode, no mixer)
* 2580+: High-pass mode
*/
// Simplified tune_config lookup for Mayhem
// Returns the IF frequency in Hz for a given target frequency
constexpr rf::Frequency praline_get_if_frequency(const rf::Frequency target_frequency) {
const uint32_t freq_mhz = target_frequency / 1'000'000;
// Based on hackrf_usb tune_config_rx table
if (freq_mhz < 2100) {
// Most low-band frequencies: use 2375 MHz IF
// This keeps VCO around 4750-4950 MHz for FM band
return 2375'000'000;
} else if (freq_mhz < 2320) {
// Transition zone: use varying IF to avoid VCO edges
// These frequencies are tricky - near MAX2831 minimum
// Use 2425 MHz to give some margin
return 2425'000'000;
} else {
// Bypass mode or high-band - IF not used for mixer
return 0;
}
}
// Returns true for high-side injection, false for low-side
constexpr bool praline_use_high_side_injection(const rf::Frequency target_frequency) {
const uint32_t freq_mhz = target_frequency / 1'000'000;
// Based on hackrf_usb tune_config_rx table
if (freq_mhz < 2100) {
// Standard low-band: high-side injection
// LO = IF + RF, mixer inverts spectrum
return true;
} else if (freq_mhz < 2105) {
// Narrow transition: still high-side
return true;
} else if (freq_mhz < 2320) {
// Near MAX2831 minimum: use low-side injection
// LO = IF - RF, no spectrum inversion
return false;
} else {
// Bypass/high-band - doesn't matter, mixer bypassed
return false;
}
}
#endif // PRALINE
// Low band <2170 Mhz (HackRF One) or <2320 MHz (PRALINE):
constexpr rf::Frequency low_band_second_lo_frequency(const rf::Frequency target_frequency) {
#ifdef PRALINE
// Praline-specific formula for MAX2831 (2.3-2.6 GHz range)
// Use a fixed second_lo that:
// 1. Falls in MAX2831's sweet spot (2.3-2.6 GHz)
// 2. Gives RFFC5072 a VCO frequency in its range (2700-5400 MHz)
// For most low-band frequencies, use 2500 MHz as second_lo
// This gives RFFC5072 plenty of headroom
(void)target_frequency; // Unused in fixed formula
return 2500'000'000;
// Use the tune_config lookup for PRALINE
return praline_get_if_frequency(target_frequency);
#else
return 2650'000'000 - (target_frequency / 7);
#endif
@@ -50,18 +118,36 @@ constexpr rf::Frequency low_band_second_lo_frequency(const rf::Frequency target_
Config low_band(const rf::Frequency target_frequency) {
const rf::Frequency second_lo_frequency = low_band_second_lo_frequency(target_frequency);
#ifdef PRALINE
rf::Frequency first_lo_frequency;
bool mixer_invert;
if (praline_use_high_side_injection(target_frequency)) {
// High-side injection: LO = IF + RF
first_lo_frequency = second_lo_frequency + target_frequency;
mixer_invert = true;
} else {
// Low-side injection: LO = IF - RF
first_lo_frequency = second_lo_frequency - target_frequency;
mixer_invert = false;
}
return {first_lo_frequency, second_lo_frequency, rf::path::Band::Low, mixer_invert};
#else
const rf::Frequency first_lo_frequency = target_frequency + second_lo_frequency;
const bool mixer_invert = true;
return {first_lo_frequency, second_lo_frequency, rf::path::Band::Low, mixer_invert};
#endif
}
// Mid band 2170-2740 Mhz:
// Mid band 2170-2740 Mhz (HackRF One) or 2320-2580 MHz (PRALINE):
Config mid_band(const rf::Frequency target_frequency) {
#ifdef PRALINE
// For Praline with MAX2831 (2.3-2.6 GHz range)
// Frequencies 2170-2300 MHz need upconversion since they're below MAX2831 minimum
if (target_frequency < 2300'000'000) {
// Treat as low band
// Treat as low band - need mixer
return low_band(target_frequency);
}
// Frequencies 2300-2600 MHz can go direct (no RFFC5072)
@@ -84,11 +170,16 @@ Config mid_band(const rf::Frequency target_frequency) {
#endif
}
// High band >2740 Mhz:
// High band >2740 Mhz (HackRF One) or >2580 MHz (PRALINE):
constexpr rf::Frequency high_band_second_lo_frequency(const rf::Frequency target_frequency) {
#ifdef PRALINE
// Praline formula tuned for MAX2831 (2.3-2.6 GHz range)
// Keep second_lo in MAX2831's range while allowing RFFC5072 to work
//
// For high-band, we use LOW-side injection: LO = RF - IF
// So IF should be chosen to keep LO (and thus VCO) in a good range
//
// Based on hackrf_usb tune_config_tx patterns:
if (target_frequency < 3600'000'000)
return 2400'000'000 + ((target_frequency - 2740'000'000) / 4);
else if (target_frequency < 5100'000'000)
+2 -2
View File
@@ -92,7 +92,7 @@ void BMPViewer::get_line(ui::Color* line, uint32_t bx, uint32_t by, uint32_t cnt
for (uint32_t x = 0; x < cnt; x++) {
uint32_t targetx = (zoom < 0) ? bx + x * -1 * zoom : bx + x / zoom; // on zoom out could probably avg the pixels, or apply some smoothing, but this is way faster.
if (last_targetx == targetx) {
line[x] = line[x - 1];
if (x > 0) line[x] = line[x - 1];
continue;
}
last_targetx = targetx;
@@ -123,7 +123,7 @@ void BMPViewer::paint(Painter& painter) {
last_by = by;
portapack::display.draw_pixels({rect.left(), rect.top() + y, d_width, 1}, line, d_width);
}
delete line;
delete[] line;
}
int8_t BMPViewer::get_zoom() {
+4 -2
View File
@@ -876,8 +876,10 @@ void GeoMapView::update_position(float lat, float lon, uint16_t angle, int32_t a
geopos.set_report_change(true);
geomap.set_angle(angle);
if (is_changed) geomap.move(lon_, lat_);
geomap.set_dirty();
if (is_changed) {
geomap.move(lon_, lat_);
geomap.set_dirty();
}
}
void GeoMapView::update_tag(const std::string tag) {
@@ -132,8 +132,8 @@ namespace ui {
gridItem.on_select = [&nav, appInfo, i]() {
auto dev2 = (i2cdev::I2cDev_PPmod*)i2cdev::I2CDevManager::get_dev_by_model(I2C_DEVMDL::I2CDECMDL_PPMOD);
dev2->lockDevice();
if (dev2) {
dev2->lockDevice();
// auto app_image = reinterpret_cast<uint8_t*>(portapack::memory::map::m4_code.end() - appInfo->binary_size);
auto app_image = reinterpret_cast<uint8_t*>(portapack::memory::map::local_sram_0.base());
uint8_t errorcnt = 0;
-6
View File
@@ -45,11 +45,8 @@
#include "ui_mictx.hpp"
#include "ui_playlist.hpp"
#include "ui_pocsag_tx.hpp"
#include "ui_rds.hpp"
#include "ui_recon.hpp"
// #include "ui_scanner.hpp"
// #include "ui_sd_over_usb.hpp"
#include "ui_search.hpp"
#include "ui_settings.hpp"
#include "ui_sonde.hpp"
@@ -64,7 +61,6 @@
#include "ais_app.hpp"
#include "analog_audio_app.hpp"
// #include "ble_comm_app.hpp"
#include "ble_rx_app.hpp"
#include "ble_tx_app.hpp"
#include "capture_app.hpp"
@@ -136,7 +132,6 @@ const NavigationView::AppList NavigationView::appList = {
{"aprstx", "APRS TX", TX, ui::Color::green(), &bitmap_icon_aprs, new ViewFactory<APRSTXView>()},
{"bletx", "BLE Tx", TX, ui::Color::green(), &bitmap_icon_btle, new ViewFactory<BLETxView>()},
{"ooktx", "OOK", TX, ui::Color::yellow(), &bitmap_icon_remote, new ViewFactory<EncodersView>()},
{"pocsagtx", "POCSAG TX", TX, ui::Color::green(), &bitmap_icon_pocsag, new ViewFactory<POCSAGTXView>()},
{"rdstx", "RDS", TX, ui::Color::green(), &bitmap_icon_rds, new ViewFactory<RDSView>()},
{"touchtune", "TouchTune", TX, ui::Color::green(), &bitmap_icon_touchtunes, new ViewFactory<TouchTunesView>()},
/* TRX ********************************************************************/
@@ -146,7 +141,6 @@ const NavigationView::AppList NavigationView::appList = {
{"freqman", "Freq. Manager", UTILITIES, Color::green(), &bitmap_icon_freqman, new ViewFactory<FrequencyManagerView>()},
{"iqtrim", "IQ Trim", UTILITIES, Color::orange(), &bitmap_icon_trim, new ViewFactory<IQTrimView>()},
{"notepad", "Notepad", UTILITIES, Color::dark_cyan(), &bitmap_icon_notepad, new ViewFactory<TextEditorView>()},
//{nullptr, "SD Over USB", UTILITIES, Color::yellow(), &bitmap_icon_hackrf, new ViewFactory<SdOverUsbView>()},
{nullptr, "Debug", UTILITIES, Color::light_grey(), &bitmap_icon_debug, new ViewFactory<DebugMenuView>()},
//{"testapp", "Test App", UTILITIES, Color::dark_grey(), nullptr, new ViewFactory<TestView>()},
// Dangerous apps.
+18 -21
View File
@@ -105,26 +105,23 @@ static void cmd_sd_over_usb(BaseSequentialStream* chp, int argc, char* argv[]) {
(void)chp;
(void)argc;
(void)argv;
ui::Painter painter;
painter.fill_rectangle(
{0, 0, portapack::display.width(), portapack::display.height()},
Theme::getInstance()->fg_yellow->background);
painter.draw_bitmap(
{portapack::display.width() / 2 - 8, portapack::display.height() / 2 - 8},
ui::bitmap_icon_hackrf,
Theme::getInstance()->fg_yellow->foreground,
Theme::getInstance()->fg_yellow->background);
sdcDisconnect(&SDCD1);
sdcStop(&SDCD1);
m4_request_shutdown();
chThdSleepMilliseconds(50);
portapack::shutdown(true);
m4_init(portapack::spi_flash::image_tag_usb_sd, portapack::memory::map::m4_code, false);
m0_halt();
auto evtd = getEventDispatcherInstance();
if (!evtd) return;
auto top_widget = evtd->getTopWidget();
if (!top_widget) return;
auto nav = static_cast<ui::SystemView*>(top_widget)->get_navigation_view();
if (!nav) return;
nav->home(false);
std::string appwithpath = "/" + apps_dir.string() + "/";
appwithpath += "sdusb.ppma";
bool ret = ui::ExternalItemsMenuLoader::run_external_app(*nav, path_from_string8((char*)appwithpath.c_str()));
if (ret) {
chprintf(chp, "ok\r\n");
} else {
chprintf(chp, "Failed to start SD over USB\r\n");
}
evtd->wait_finish_frame();
evtd->emulateKeyboard('\n');
}
bool strEndsWith(const std::u16string& str, const std::u16string& suffix) {
@@ -1144,7 +1141,7 @@ static void cmd_gotenv(BaseSequentialStream* chp, int argc, char* argv[]) {
uint16_t light = 0;
if (argc > 1) humi = atof(argv[1]);
if (argc > 2) pressure = atof(argv[2]);
if (argc > 3) light = strtol(argv[0], NULL, 10);
if (argc > 3) light = strtol(argv[3], NULL, 10);
EnvironmentDataMessage msg{temp, humi, pressure};
EventDispatcher::send_message(msg);
// compatibility:
@@ -148,7 +148,11 @@ void cmd_sd_open(BaseSequentialStream* chp, int argc, char* argv[]) {
auto path = path_from_string8((char*)full_fn_from_args(argc, argv).c_str());
shell_file = new File();
auto error = shell_file->open(path, false, true);
if (report_on_error(chp, error)) return;
if (report_on_error(chp, error)) {
delete shell_file;
shell_file = nullptr;
return;
}
chprintf(chp, "ok\r\n");
}
+2 -2
View File
@@ -28,8 +28,8 @@ So include here the .hpp, and add a new element to the protos vector in the cons
class SubCarProtos : public FProtoListGeneral {
public:
SubCarProtos(const SubCarProtos&) { SubCarProtos(); }; // won't use, but makes compiler happy
SubCarProtos& operator=(const SubCarProtos&) { return *this; } // won't use, but makes compiler happy
SubCarProtos(const SubCarProtos&) = delete;
SubCarProtos& operator=(const SubCarProtos&) = delete;
SubCarProtos() {
// add protos
protos[FPC_SUZUKI] = new FProtoSubCarSuzuki();
+2 -2
View File
@@ -62,8 +62,8 @@ So include here the .hpp, and add a new element to the protos vector in the cons
class SubGhzDProtos : public FProtoListGeneral {
public:
SubGhzDProtos(const SubGhzDProtos&) { SubGhzDProtos(); }; // won't use, but makes compiler happy
SubGhzDProtos& operator=(const SubGhzDProtos&) { return *this; } // won't use, but makes compiler happy
SubGhzDProtos(const SubGhzDProtos&) = delete;
SubGhzDProtos& operator=(const SubGhzDProtos&) = delete;
SubGhzDProtos() {
// add protos
protos[FPS_PRINCETON] = new FProtoSubGhzDPrinceton();
+2 -2
View File
@@ -41,8 +41,8 @@ So include here the .hpp, and add a new element to the protos vector in the cons
class WeatherProtos : public FProtoListGeneral {
public:
WeatherProtos(const WeatherProtos&) { WeatherProtos(); }; // won't use, but makes compiler happy
WeatherProtos& operator=(const WeatherProtos&) { return *this; } // won't use, but makes compiler happy
WeatherProtos(const WeatherProtos&) = delete;
WeatherProtos& operator=(const WeatherProtos&) = delete;
WeatherProtos() {
// add protos
protos[FPW_NexusTH] = new FProtoWeatherNexusTH();
+1 -1
View File
@@ -195,7 +195,7 @@ void BTLETxProcessor::scramble(char* bit_in, int num_bit, int channel_number, ch
void BTLETxProcessor::disp_bit_in_hex(char* bit, int num_bit) {
int i, a;
for (i = 0; i < num_bit; i = i + 8) {
for (i = 0; i + 7 < num_bit; i = i + 8) {
a = bit[i] + bit[i + 1] * 2 + bit[i + 2] * 4 + bit[i + 3] * 8 + bit[i + 4] * 16 + bit[i + 5] * 32 + bit[i + 6] * 64 + bit[i + 7] * 128;
data_message.is_data = true;
-2
View File
@@ -28,8 +28,6 @@
#include "debug.hpp"
#include "portapack_shared_memory.hpp"
#include "../flashsize.h"
#define PAGE_LEN 256U
#define NUM_PAGES (4096U * FLASH_SIZE_MB)
+4
View File
@@ -101,6 +101,10 @@ void MicTXProcessor::on_message(const Message* const msg) {
switch (msg->id) {
case Message::ID::AudioTXConfig:
if (modulator) {
delete modulator;
modulator = NULL;
}
if (fm_enabled) {
dsp::modulate::FM* fm = new dsp::modulate::FM();
+4
View File
@@ -81,7 +81,11 @@ class WidebandFMAudio : public BasebandProcessor {
void on_message(const Message* const message) override;
private:
#ifdef PRALINE
static constexpr size_t baseband_fs = 2000000;
#else
static constexpr size_t baseband_fs = 3072000;
#endif
static constexpr auto spectrum_rate_hz = 50.0f;
std::array<complex16_t, 512> dst{};
@@ -24,13 +24,6 @@
// Declare wrapper function. board.cpp to avoid conflicting gpio_t definitions.
bool hackrf_r9;
// Declare the bridge function (no need to include HackRF headers here)
#ifdef PRALINE
extern "C" {
int fpga_bridge_init(void);
}
#endif
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
@@ -61,7 +54,11 @@ const PALConfig pal_default_config = {
.P = {
{ // GPIO0
.data
#ifdef PRALINE
= (0 << 15) // P1_20: CLKIN_CTRL - start low
#else
= (1 << 15) // P1_20: CS_XCVR
#endif
| (1 << 14) // P2_10: AMP_BYPASS
| (0 << 13) // P1_18: SGPIO12, HOST_Q_INVERT
| (0 << 12) // P1_17: SGPIO11, HOST_DIRECTION
@@ -79,8 +76,12 @@ const PALConfig pal_default_config = {
| (1 << 0) // P0_0: SGPIO0, HOST_DATA0
,
.dir
#ifdef PRALINE
= (1 << 15) // P1_20: CLKIN_CTRL - output
#else
= (1 << 15) // P1_20: CS_XCVR
| (1 << 14) // P2_10: AMP_BYPASS
#endif
| (1 << 14) // P2_10: AMP_BYPASS
| (1 << 13) // P1_18: SGPIO12, HOST_Q_INVERT
| (0 << 12) // P1_17: SGPIO11, HOST_DIRECTION
| (0 << 11) // P1_4: SSP1_MOSI
@@ -137,7 +138,11 @@ const PALConfig pal_default_config = {
.data
= (0 << 15) // P5_6: TX_AMP
| (1 << 14) // P5_5: MIXER_RESETX, 10K PU
#ifdef PRALINE
| (0 << 13) // P5_4: MIXER_ENX, 10K PU
#else
| (1 << 13) // P5_4: MIXER_ENX, 10K PU
#endif
| (1 << 12) // P5_3: RX_MIX_BP
| (0 << 11) // P5_2: TX_MIX_BP
| (0 << 10) // P5_1: LP
@@ -154,11 +159,19 @@ const PALConfig pal_default_config = {
,
.dir
= (1 << 15) // P5_6: TX_AMP
| (1 << 14) // P5_5: MIXER_RESETX, 10K PU
| (1 << 13) // P5_4: MIXER_ENX, 10K PU
#ifdef PRALINE
| (0 << 14) // P5_5: MIXER_RESETX, 10K PU
| (1 << 13) // P5_4: MIXER_ENX - OUTPUT (MCU controlled)
| (0 << 12) // P5_3: RX_MIX_BP - unused on PRALINE
| (0 << 11) // P5_2: FPGA_CRESET - INPUT initially
| (0 << 10) // P5_1: FPGA_SPI_CS - INPUT initially
#else
| (1 << 14) // P5_5: MIXER_RESETX, 10K PU
| (1 << 13) // P5_4: MIXER_ENX, 10K PU
| (1 << 12) // P5_3: RX_MIX_BP
| (1 << 11) // P5_2: TX_MIX_BP
| (1 << 10) // P5_1: LP
#endif
| (0 << 9) // P5_0: Varies by revision, float until detection
| (1 << 8) // P6_12: LED3 (TX)
| (1 << 7) // P5_7: CS_AD
@@ -306,7 +319,13 @@ const PALConfig pal_default_config = {
{ 1, 7, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* !MIX_BYPASS/P35: U1.VCTL1(I), U11.VCTL2(I), U9.V2(I) */
{ 1, 19, scu_config_normal_drive_t { .mode=1, .epd=0, .epun=0, .ehs=0, .ezi=0, .zif=0 } }, /* SSP1_SCK/P39: MAX2837.SCLK(I), MAX5864.SCLK(I) */
{ 1, 20, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* CS_XCVR/P53: MAX2837.CS(I) */
#ifdef PRALINE
{ 2, 6, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=1, .ezi=0, .zif=1 } }, /* TRIGGER_OUT / MIX_EN_N_R1_0: GPIO5[6] - PRALINE */
#else
/* HackRF One RFFC5072 SPI pins */
{ 2, 6, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* MIXER_SCLK/P31: 33pF, RFFC5072.SCLK(I) */
#endif
{ 2, 10, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* AMP_BYPASS/P50: U14.V2(I), U12.V2(I) */
{ 2, 11, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* RX_AMP/P49: U12.V1(I), U14.V3(I) */
{ 2, 12, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* !RX_AMP_PWR/P52: 10K PU, Q1.G(I), power to U13 (RX amp) */
@@ -319,8 +338,16 @@ const PALConfig pal_default_config = {
{ 5, 4, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* MIXER_ENX/P32: 10K PU, 33pF, RFFC5072.ENX(I) */
{ 5, 5, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* MIXER_RESETX/P33: 10K PU, 33pF, RFFC5072.RESETX(I) */
{ 5, 6, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* TX_AMP/P48: U12.V3(I), U14.V1(I) */
#ifdef PRALINE
/* PRALINE RFFC5072 SPI pins - different from HackRF One */
{ 5, 7, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* P5_7: GPIO2[7], RFFC5072 CS */
{ 9, 5, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=0, .ehs=1, .ezi=0, .zif=0 } }, /* P9_5: GPIO5[18], RFFC5072 SCLK */
{ 9, 2, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=0, .ehs=1, .ezi=1, .zif=0 } }, /* P9_2: GPIO4[14], RFFC5072 SDATA (bidirectional) */
#else
/* HackRF One RFFC5072 SPI pins - NOT used on PRALINE */
{ 5, 7, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* CS_AD/P54: MAX5864.CS(I) */
{ 6, 4, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=0 } }, /* MIXER_SDATA/P27: 33pF, RFFC5072.SDATA(IO) */
#endif
{ 6, 8, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* MIX_BYPASS/P34: U1.VCTL2(I), U11.VCTL1(I) */
{ 6, 9, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* !TX_AMP_PWR/P51: 10K PU, Q2.G(I), power to U25 (TX amp) */
@@ -346,7 +373,9 @@ const PALConfig pal_default_config = {
{ 6, 1, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* CPLD_TCK: PortaPack CPLD.TCK(I) */
{ 6, 2, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* CPLD_TDI: PortaPack CPLD.TDI(I), I2S0_RX_SDA(O) */
{ 6, 5, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* CPLD_TMS: HackRF CPLD.TMS(I) */
#ifndef PRALINE
{ 9, 5, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=0 } }, /* CPLD_TDO: HackRF CPLD.TDO(O) */
#endif
/* PortaPack CPLD */
{ 1, 5, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=0 } }, /* SD_POW: PortaPack CPLD.TDO(O) */
@@ -870,40 +899,55 @@ extern "C" void boardInit(void) {
LPC_SCU->SFSP[6][7] = 0xF4; /* SCU_GPIO_FAST | FUNCTION4 */
LPC_GPIO->DIR[5] |= (1 << 15);
LPC_GPIO->CLR[5] = (1 << 15); /* Clear = enable 3.3V aux */
{ volatile uint32_t delay = 100000; while(delay--); }
{ volatile uint32_t delay = 200000; while(delay--); }
/* Enable 1.2V for FPGA - P8_7 = GPIO4[7], active high */
LPC_SCU->SFSP[8][7] = 0x10;
LPC_GPIO->DIR[4] |= (1 << 7);
LPC_GPIO->SET[4] = (1 << 7);
{ volatile uint32_t delay = 100000; while(delay--); }
{ volatile uint32_t delay = 200000; while(delay--); }
/* Enable VAA for RF - P8_1 = GPIO4[1], active low */
LPC_SCU->SFSP[8][1] = 0x10;
LPC_GPIO->DIR[4] |= (1 << 1);
LPC_GPIO->CLR[4] = (1 << 1);
{ volatile uint32_t delay = 100000; while(delay--); }
{ volatile uint32_t delay = 200000; while(delay--); }
/* Configure RFFC5072 pins for PRALINE */
/* P9_2 = GPIO4[14] RFFC5072 data (SCU_GPIO_FAST | FUNCTION0 = 0xF0) */
LPC_SCU->SFSP[9][2] = 0xF0;
/* P9_5 = GPIO5[18] RFFC5072 clock (SCU_GPIO_FAST | FUNCTION4 = 0xF4) */
LPC_SCU->SFSP[9][5] = 0xF4;
LPC_GPIO->DIR[5] |= (1 << 18); /* Clock as output */
/* Set GPIO directions for RFFC5072 SPI pins */
/* P5_7 = GPIO2[7] RFFC5072 CS */
LPC_GPIO->SET[2] = (1 << 7); /* CS high (deselected) */
LPC_GPIO->DIR[2] |= (1 << 7); /* CS as output */
/* P9_5 = GPIO5[18] RFFC5072 SCLK */
LPC_GPIO->CLR[5] = (1 << 18); /* CLK low */
LPC_GPIO->DIR[5] |= (1 << 18); /* CLK as output */
/* P9_2 = GPIO4[14] RFFC5072 DATA (bidirectional) */
LPC_GPIO->DIR[4] |= (1 << 14); /* DATA as output initially */
/* P2_6 = GPIO5[6] TRIGGER_OUT / MIX_EN_N_R1_0 (PRALINE R1.0 mixer bypass) */
/* SCU configured in PAL array above with mode=4 */
LPC_GPIO->CLR[5] = (1 << 6); /* Default low (mixer enabled) */
LPC_GPIO->DIR[5] |= (1 << 6); /* Output */
{ volatile uint32_t delay = 200000; while(delay--); }
/* Configure Port D pins for PRALINE (use SFSPD registers) */
/* PD_14 = GPIO6[28] MAX2831 chip select */
LPC_SCU->SFSPD[14] = 0xF4; /* SCU_GPIO_FAST | FUNCTION4 */
LPC_GPIO->SET[6] = (1 << 28); /* CS high (inactive) */
LPC_GPIO->DIR[6] |= (1 << 28); /* Output */
/* PD_15 = GPIO6[29] MAX2831 RXHP control */
LPC_SCU->SFSPD[15] = 0xF4; /* SCU_GPIO_FAST | FUNCTION4 */
LPC_GPIO->CLR[6] = (1 << 29); /* RXHP low = 100 Hz HPF */
LPC_GPIO->DIR[6] |= (1 << 29); /* Output */
/* PD_16 = GPIO6[30] MAX5864 chip select */
LPC_SCU->SFSPD[16] = 0xF4; /* SCU_GPIO_FAST | FUNCTION4 */
LPC_GPIO->SET[6] |= (1 << 30); /* CS high (inactive) */
LPC_GPIO->DIR[6] |= (1 << 30); /* Output */
{ volatile uint32_t delay = 200000; while(delay--); }
/* Configure Port E pins for MAX2831 control (use SFSPE registers) */
/* PE_1 = GPIO7[1] MAX2831 ENABLE */
@@ -914,6 +958,7 @@ extern "C" void boardInit(void) {
LPC_SCU->SFSPE[2] = 0xF4; /* SCU_GPIO_FAST | FUNCTION4 */
LPC_GPIO->CLR[7] = (1 << 2); /* Start in shutdown mode */
LPC_GPIO->DIR[7] |= (1 << 2); /* Output */
{ volatile uint32_t delay = 200000; while(delay--); }
/* Configure Port 6 pins for RF path control */
/* P6_3 = GPIO3[2] Mixer enable (inverted: 0 = mixer ON) */
@@ -924,6 +969,7 @@ extern "C" void boardInit(void) {
LPC_SCU->SFSP[6][5] = 0xF0; /* SCU_GPIO_FAST | FUNCTION0 */
LPC_GPIO->CLR[3] = (1 << 4); /* TX off by default (RX mode) */
LPC_GPIO->DIR[3] |= (1 << 4); /* Output */
{ volatile uint32_t delay = 200000; while(delay--); }
/* Configure Port A pins for RF path control */
/* PA_1 = GPIO4[8] LPF enable */
@@ -934,21 +980,30 @@ extern "C" void boardInit(void) {
LPC_SCU->SFSP[0xA][2] = 0xF0; /* SCU_GPIO_FAST | FUNCTION0 */
LPC_GPIO->CLR[4] = (1 << 9); /* RF amp off by default */
LPC_GPIO->DIR[4] |= (1 << 9); /* Output */
{ volatile uint32_t delay = 200000; while(delay--); }
/* Configure RFFC5072 control pins for PRALINE */
/* P5_4 = GPIO2[13] RFFC5072 ENX (active low: 0=enabled) */
LPC_SCU->SFSP[5][4] = 0xF0; /* FUNCTION0 (GPIO), no pulls */
LPC_GPIO->DIR[2] &= ~(1 << 13); /* ENX: INPUT (let FPGA control) */
/* P5_5 = GPIO2[14] RFFC5072 RESETX - FPGA controlled, MCU should not touch */
LPC_SCU->SFSP[5][5] = 0xF0; /* FUNCTION0 (GPIO), no pulls */
LPC_GPIO->DIR[2] &= ~(1 << 14); /* RESETX: INPUT (let FPGA control) */
/* P5_4 = GPIO2[13] RFFC5072 ENX - SPI chip select (managed by SPI driver) */
LPC_SCU->SFSP[5][4] = 0x10; /* FUNCTION0 (GPIO), pull-up, slow mode (matches HackRF USB) */
LPC_GPIO->DIR[2] |= (1 << 13); /* ENX: OUTPUT */
LPC_GPIO->SET[2] = (1 << 13); /* ENX = 1 (deselected initially) */
{ volatile uint32_t delay = 200000; while(delay--); }
/* P5_5 = GPIO2[14] RFFC5072 RESETX (active high: 1=running) */
LPC_SCU->SFSP[5][5] = 0x10; /* FUNCTION0 (GPIO), pull-up, slow mode (matches HackRF USB) */
LPC_GPIO->DIR[2] |= (1 << 14); /* RESETX: OUTPUT */
LPC_GPIO->SET[2] = (1 << 14); /* RESETX = 1 (RUNNING) */
{ volatile uint32_t delay = 200000; while(delay--); }
/* Ensure RESETX is stable */
for (volatile int i = 0; i < 10; i++) {
LPC_GPIO->W2[14] = 1;
}
/* PD_11 = GPIO6[25] RFFC5072 Lock Detect (input) */
LPC_SCU->SFSP[0xD][11] = 0xF0; /* FUNCTION0 (GPIO), no pulls */
/* Small delay for signals to stabilize */
for (volatile int i = 0; i < 10000; i++) {}
LPC_SCU->SFSPD[11] = 0x10; /* FUNCTION0 (GPIO), pull-up (matches HackRF USB) */
LPC_GPIO->DIR[6] &= ~(1 << 25); /* LD: INPUT */
{ volatile uint32_t delay = 200000; while(delay--); }
/* Configure PRALINE-specific SGPIO pins for FPGA sample interface.
* These override the HackRF One pin config from pins_setup.
@@ -968,6 +1023,7 @@ extern "C" void boardInit(void) {
LPC_SCU->SFSP[8][2] = 0xF4; /* SCU_GPIO_FAST | func 4 */
/* SGPIO11 = P1_17 function 6 (HOST_DIRECTION - output to FPGA, tells FPGA TX vs RX) */
LPC_SCU->SFSP[1][17] = 0xF6; /* SCU_GPIO_FAST | func 6 */
{ volatile uint32_t delay = 200000; while(delay--); }
/* SGPIO data pins (SGPIO0-7) - all 8 bits required for sample data */
LPC_SCU->SFSP[0][0] = 0xF3; /* SGPIO0: P0_0 function 3, HOST_DATA0 */
@@ -978,14 +1034,10 @@ extern "C" void boardInit(void) {
LPC_SCU->SFSP[6][6] = 0xF2; /* SGPIO5: P6_6 function 2, HOST_DATA5 */
LPC_SCU->SFSP[2][2] = 0xF0; /* SGPIO6: P2_2 function 0, HOST_DATA6 */
LPC_SCU->SFSP[1][0] = 0xF6; /* SGPIO7: P1_0 function 6, HOST_DATA7 */
{ volatile uint32_t delay = 200000; while(delay--); }
/* NOTE: P9_5 is RFFC5072 mixer clock (SCU_MIXER_SCLK), NOT SGPIO!
* Do NOT override P9_5 here. */
// Trigger FPGA bitstream loading via fpga bridge
// Attempt to load the FPGA bitstream
// This function returns LD_SUCCESS (0) if the FPGA confirms the bitstream
// Use LEDs to check if initi is successful.
// Trigger FPGA bitstream loading via fpga bridge in portapack.cpp
// Use LEDs to check if boardInit initialization is successful.
// Setup LED pin directions
// LED1 (USB) = GPIO2[1], LED2 (RX) = GPIO2[2], LED3 (TX) = GPIO2[8]
@@ -994,14 +1046,8 @@ extern "C" void boardInit(void) {
// Turn off all LEDs to start
// PRALINE LEDs are active-low: SET (HIGH) = OFF, CLR (LOW) = ON
LPC_GPIO->SET[2] = (1 << 1) | (1 << 2) | (1 << 8);
{ volatile uint32_t delay = 200000; while(delay--); }
// Call fpga_bridge_init and continue boot regardless of result
// (Watchdog was resetting device when we halted with while(1))
int load_result = fpga_bridge_init();
(void)load_result; // Ignore result for now, just let boot continue
// Keep LEDs off after FPGA load
LPC_GPIO->SET[2] = (1 << 1) | (1 << 2) | (1 << 8);
#endif
}
@@ -3,7 +3,6 @@
// Check if PRALINE was passed from CMake
#ifdef PRALINE
#warning "Building for HackRF_PRO with FPGA."
// Necessary headers
#include "lz4_blk.h"
@@ -297,7 +296,6 @@
// Cached register values for debug reads (since reads may require mode switch)
static uint8_t fpga_reg_cache[6] = {0, 0x01, 0x00, 0x00, 0x00, 0x00};
static uint8_t fpga_reg_cache_valid = 0;
// Public function to read FPGA register (callable from C++ application code)
// Switches SPI mode, reads register, switches back
+20
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@@ -213,6 +213,24 @@ CpldUpdateStatus update_autodetect(const Config config_rev_20150901, const Confi
namespace hackrf {
namespace cpld {
#ifdef PRALINE
/* PRALINE has no HackRF CPLD - stub these functions out */
bool load_sram() {
return true;
}
void load_sram_no_verify() {
return;
}
bool verify_eeprom() {
return true;
}
void init_from_eeprom() {
return;
}
#else
static jtag::GPIOTarget jtag_target_hackrf() {
return {
hackrf::one::gpio_cpld_tck,
@@ -262,5 +280,7 @@ void init_from_eeprom() {
hackrf_cpld.init_from_eeprom();
}
#endif // PRALINE
} /* namespace cpld */
} /* namespace hackrf */
+31
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@@ -278,6 +278,37 @@ constexpr fir_taps_real<32> taps_11k0_channel{
}},
};
// NBFM 12K5F3E emission type /////////////////////////////////////////////
// IFIR image-reject filter: fs=3072000, pass=6250, stop=342250, decim=8, fout=384000
constexpr fir_taps_real<24> taps_12k5_decim_0{
.low_frequency_normalized = -6250.0f / 3072000.0f,
.high_frequency_normalized = 6250.0f / 3072000.0f,
.transition_normalized = 336000.0f / 3072000.0f,
.taps = {{42, 108, 226, 412, 672, 1004, 1391, 1807, 2211, 2565, 2828, 2969,
2969, 2828, 2565, 2211, 1807, 1391, 1004, 672, 412, 226, 108, 42}},
};
// IFIR prototype filter: fs=384000, pass=6250, stop=42500, decim=8, fout=48000
constexpr fir_taps_real<32> taps_12k5_decim_1{
.low_frequency_normalized = -6250.0f / 384000.0f,
.high_frequency_normalized = 6250.0f / 384000.0f,
.transition_normalized = 36250.0f / 384000.0f,
.taps = {{-38, -85, -162, -245, -315, -338, -275, -85, 255, 752, 1378, 2088,
2807, 3452, 3939, 4202, 4202, 3939, 3452, 2807, 2088, 1378, 752, 255,
-85, -275, -338, -315, -245, -162, -85, -38}},
};
// Channel filter: fs=48000, pass=6250, stop=9250, decim=1, fout=48000
constexpr fir_taps_real<32> taps_12k5_channel{
.low_frequency_normalized = -6250.0f / 48000.0f,
.high_frequency_normalized = 6250.0f / 48000.0f,
.transition_normalized = 3000.0f / 48000.0f,
.taps = {{-75, -362, -712, -908, -592, 268, 1324, 1720, 684, -1522, -3541, -3385,
342, 7150, 14642, 19541, 19541, 14642, 7150, 342, -3385, -3541, -1522, 684,
1720, 1324, 268, -592, -908, -712, -362, -75}},
};
// NBFM 8K50F3E emission type /////////////////////////////////////////////
// IFIR image-reject filter: fs=3072000, pass=4250, stop=340250, decim=8, fout=384000
+26 -6
View File
@@ -52,7 +52,12 @@ constexpr GPIO gpio_r9_vaa_disable = gpio[GPIO3_6];
constexpr GPIO gpio_rx_mix_bp = gpio[GPIO2_12];
constexpr GPIO gpio_tx_mix_bp = gpio[GPIO2_11];
#ifdef PRALINE
constexpr GPIO gpio_mix_bypass = gpio[GPIO3_2]; // P6_3: PRALINE RF path mixer bypass inverted
constexpr GPIO gpio_mix_en_n_r1_0 = gpio[GPIO5_6]; // P2_6: R1.0 board mixer bypass
#else
constexpr GPIO gpio_mix_bypass = gpio[GPIO5_16];
#endif
constexpr GPIO gpio_not_mix_bypass = gpio[GPIO1_0];
constexpr GPIO gpio_og_rx = gpio[GPIO5_5];
@@ -68,8 +73,15 @@ constexpr GPIO gpio_amp_bypass = gpio[GPIO0_14];
constexpr GPIO gpio_not_rx_amp_pwr = gpio[GPIO1_12];
constexpr GPIO gpio_not_tx_amp_pwr = gpio[GPIO3_5];
constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14];
#ifdef PRALINE
// PRALINE: GPIO2[13] is SPI CS only, FPGA controls ENX/RESETX
constexpr GPIO gpio_rffc5072_select = gpio[GPIO2_13]; // P5_4: SPI CS (ENX)
constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14]; // P5_5: LPC43xx controls directly
#else
constexpr GPIO gpio_rffc5072_select = gpio[GPIO2_13];
constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14];
#endif
#ifdef PRALINE
constexpr GPIO gpio_rffc5072_clock = gpio[GPIO5_18];
constexpr GPIO gpio_rffc5072_data = gpio[GPIO4_14];
@@ -103,8 +115,8 @@ constexpr GPIO gpio_max2839_rxtx = gpio[GPIO2_5];
#endif
#ifdef PRALINE
constexpr GPIO gpio_max5864_select = gpio[GPIO6_30];
constexpr GPIO gpio_fpga_select = gpio[GPIO2_10]; // FPGA SPI CS (P5_1)
constexpr GPIO gpio_max5864_select = gpio[GPIO6_30]; // PD_16: PRALINE MAX5864 CS
constexpr GPIO gpio_fpga_select = gpio[GPIO2_10]; // FPGA SPI CS (P5_1)
#else
constexpr GPIO gpio_max5864_select = gpio[GPIO2_7];
#endif
@@ -118,8 +130,8 @@ constexpr GPIO gpio_1v2_enable = gpio[GPIO4_7]; // 1V2 enable (P8_7)
constexpr GPIO gpio_3v3aux_disable = gpio[GPIO5_15]; // 3V3 aux disable (P6_7)
// PRALINE RF path control
constexpr GPIO gpio_tx_enable = gpio[GPIO3_4]; // TX enable (P6_5)
constexpr GPIO gpio_mix_enable_n = gpio[GPIO3_2]; // Mixer enable inverted (P6_3)
constexpr GPIO gpio_tx_enable = gpio[GPIO3_4]; // TX enable (P6_5)
// constexpr GPIO gpio_mix_enable_n = gpio[GPIO3_2]; // Mixer enable inverted (P6_3)
constexpr GPIO gpio_lpf_enable = gpio[GPIO4_8]; // LPF enable (PA_1)
constexpr GPIO gpio_rf_amp_enable = gpio[GPIO4_9]; // RF amp enable (PA_2)
constexpr GPIO gpio_ant_bias_disable = gpio[GPIO1_12]; // Antenna bias disable (P2_12)
@@ -144,9 +156,17 @@ constexpr GPIO gpio_trigger_out = gpio[GPIO5_6]; // Trigger output (P2_6)
constexpr GPIO gpio_pps_out = gpio[GPIO5_5]; // PPS output (P2_5)
#endif
#ifdef PRALINE
/* PRALINE has no HackRF CPLD. These pins are used for RFFC5072 and TX_EN instead.
* Dummy assignments here allow cpld_update.cpp to compile; the functions
* that use them are never called on PRALINE. */
constexpr GPIO gpio_cpld_tdo = gpio[GPIO3_0]; // dummy: reuse TCK pin
constexpr GPIO gpio_cpld_tms = gpio[GPIO3_1]; // dummy: reuse TDI pin
#else
constexpr GPIO gpio_cpld_tdo = gpio[GPIO5_18];
constexpr GPIO gpio_cpld_tck = gpio[GPIO3_0];
constexpr GPIO gpio_cpld_tms = gpio[GPIO3_4];
#endif
constexpr GPIO gpio_cpld_tck = gpio[GPIO3_0];
constexpr GPIO gpio_cpld_tdi = gpio[GPIO3_1];
constexpr GPIO gpio_r9_clkin_en = gpio[GPIO5_15];
+1 -1
View File
@@ -205,7 +205,7 @@ uint16_t I2cDev::read16_1(uint8_t reg) {
}
uint32_t I2cDev::read24_1(uint8_t reg) {
uint8_t buffer[3];
i2c_read(&reg, 1, buffer, 2);
i2c_read(&reg, 1, buffer, 3);
return uint32_t(buffer[0]) << 16 | uint32_t(buffer[1]) << 8 | uint32_t(buffer[2]);
}
-1
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@@ -29,7 +29,6 @@
using namespace lpc43xx;
#include "utility.hpp"
#include "../flashsize.h"
namespace portapack {
namespace memory {
+1 -1
View File
@@ -41,7 +41,7 @@ size_t morse_encode(std::string& message, const uint32_t time_unit_ms, const uin
i = 0;
for (char& ch : message) {
if (i > 256) return 0; // Message too long
if (i >= 256) return 0; // Message too long
if ((ch >= 'a') && (ch <= 'z')) // Make uppercase
ch -= 32;
+10 -8
View File
@@ -272,9 +272,8 @@ void View::add_child(Widget* const widget) {
}
void View::add_children(const std::initializer_list<Widget*> children) {
children_.insert(std::end(children_), children);
for (auto child : children) {
child->set_parent(this);
add_child(child);
}
}
@@ -622,8 +621,8 @@ ProgressBar::ProgressBar(
void ProgressBar::set_max(const uint32_t max) {
if (max == _max) return;
if (_value > _max)
_value = _max;
if (_value > max)
_value = max;
_max = max;
set_dirty();
@@ -651,9 +650,11 @@ void ProgressBar::paint(Painter& painter) {
const auto sr = screen_rect();
const auto s = style();
v_scaled = (sr.size().width() * (uint64_t)_value) / _max;
if (_max == 0) {
v_scaled = 0;
} else {
v_scaled = (sr.size().width() * (uint64_t)_value) / _max;
}
painter.fill_rectangle({sr.location(), {v_scaled, sr.size().height()}}, style().foreground);
painter.fill_rectangle({{sr.location().x() + v_scaled, sr.location().y()}, {sr.size().width() - v_scaled, sr.size().height()}}, s.background);
@@ -1267,7 +1268,7 @@ bool ButtonWithEncoder::on_encoder(const EncoderEvent delta) {
if (delta != 0) {
encoder_delta += delta;
delta_change = true;
on_change();
if (on_change) on_change();
} else
delta_change = 0;
return true;
@@ -1904,6 +1905,7 @@ void OptionsField::on_focus() {
}
bool OptionsField::on_encoder(const EncoderEvent delta) {
if (options_.empty()) return false;
int32_t new_value = selected_index() + delta;
if (new_value < 0)
new_value = options_.size() - 1;
+18 -2
View File
@@ -22,6 +22,7 @@
#include "utility.hpp"
#include <cstdint>
#include <string.h>
#if 0
uint32_t gcd(const uint32_t u, const uint32_t v) {
@@ -257,8 +258,23 @@ std::string join(char c, std::initializer_list<std::string_view> strings) {
}
uint32_t simple_checksum(uint32_t buffer_address, uint32_t length) {
if (buffer_address == 0 || length == 0) {
return 0;
}
uint32_t checksum = 0;
for (uint32_t i = 0; i < length; i += 4)
checksum += *(uint32_t*)(buffer_address + i);
const uint8_t* ptr = (const uint8_t*)(uintptr_t)buffer_address;
uint32_t i = 0;
for (; i + 3 < length; i += 4) {
uint32_t chunk;
// memcpy prevents unaligned access hard-faults on embedded processors
memcpy(&chunk, ptr + i, 4);
checksum += chunk;
}
// Leftover bytes (won't happen hopefully)
if (i < length) {
uint32_t remainder = 0;
memcpy(&remainder, ptr + i, length - i);
checksum += remainder;
}
return checksum;
}
+9
View File
@@ -0,0 +1,9 @@
#pragma once
// DO NOT EDIT: IT IS AUTO GENERATED BY CMAKE!!!!
// clang-format off
//Allowed fw size in MB
#define FLASH_SIZE_MB 2
//Current compiled fw size in MB
#define FLASH_SIZE_LIMIT_MB 1
// clang-format on
+36 -32
View File
@@ -23,63 +23,67 @@
set -e # exit immediately on any failure
# 1. PARSE ARGUMENTS
# We separate arguments into two lists:
# - CMAKE_OPTS: Anything starting with -D (e.g., -DFLASH_MB_SIZE=4)
# - BUILD_ARGS: Everything else (e.g., make, ninja, -j20)
CMAKE_OPTS=()
BUILD_DIR="build"
CMAKE_ARGS=()
BUILD_ARGS=()
for arg in "$@"; do
if [[ "$arg" == -D* ]]; then
CMAKE_OPTS+=("$arg")
else
BUILD_ARGS+=("$arg")
fi
done
parse_build_args() {
# 1. PARSE BUILD ARGUMENTS
# We separate arguments into two lists, and possibly get an override for the build dir:
# - BUILD_DIR: Defaults to build, can be overriden (e.g., -B build-4mb, --workdir build-praline)
# - CMAKE_ARGS: Anything starting with -D (e.g., -DFLASH_MB_SIZE=4)
# - BUILD_ARGS: Everything else (e.g., make, ninja, -j20)
# Reset the script arguments ($1, $2...) to contain only the BUILD_ARGS. This allows the original logic below to work exactly as before.
set -- "${BUILD_ARGS[@]}"
while [[ $# -gt 0 ]]; do
if [[ "$1" == -B ]] || [[ "$1" == "--workdir" ]]; then
shift
BUILD_DIR=$1
shift
elif [[ "$1" == -D* ]]; then
CMAKE_ARGS+=("$1")
shift
else
BUILD_ARGS+=("$1")
shift
fi
done
}
build_make() {
parse_build_args "$@"
echo "Building in workdir: \"$BUILD_DIR\" using CMake options: \"${CMAKE_ARGS[@]}\" and make options: \"${BUILD_ARGS[@]}\""
cd ..
mkdir -p build
cd build
cmake "${CMAKE_OPTS[@]}" ..
make "$@"
mkdir -p "$BUILD_DIR"
cd "$BUILD_DIR"
cmake "${CMAKE_ARGS[@]}" ..
make "${BUILD_ARGS[@]}"
exit 0
}
build_ninja() {
parse_build_args "$@"
echo "Building in workdir: \"$BUILD_DIR\" using CMake options: \"${CMAKE_ARGS[@]}\" and ninja options: \"${BUILD_ARGS[@]}\""
cd ..
mkdir -p build
cd build
cmake -G Ninja "${CMAKE_OPTS[@]}" ..
ninja "$@"
mkdir -p "$BUILD_DIR"
cd "$BUILD_DIR"
cmake -G Ninja "${CMAKE_ARGS[@]}" ..
ninja "${BUILD_ARGS[@]}"
exit 0
}
if [ "$1" = 'make' ]; then
# User explicitly typed 'make'
shift
build_make "$@"
elif [[ $1 == -j* ]]; then
# User passed -j20 directly (Implied make)
elif [[ $1 == -* ]]; then
# User passed a switch not a command as first argument. Assuming make. (e.g., -j20)
build_make "$@"
elif [ "$1" = 'ninja' ]; then
# User explicitly typed 'ninja'
shift
build_ninja "$@"
elif [ ${#CMAKE_OPTS[@]} -gt 0 ] && [ ${#BUILD_ARGS[@]} -eq 0 ]; then
# User passed ONLY CMake flags (e.g. "-DFLASH_MB_SIZE=4")
# We assume they want to run a default 'make' build.
build_make
fi
# Fallback for other commands (e.g. /bin/bash)
+1 -1
Submodule hackrf updated: f56e711b6b...7d16b954ad