mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2026-08-21 06:59:02 +00:00
Update submodule, fix warnings for PRALINE (#3012)
* update submodule * remove pragma, remove unused variable * fix bad external decl, signed vs unsigned comparison * fix unused: display computed flags * fix max2881 info mess * code format * fix gui positions * use constexpr for min and max lo_frequencies
This commit is contained in:
@@ -46,6 +46,11 @@ using namespace portapack;
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#include "irq_controls.hpp"
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#ifdef PRALINE
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#include "max2831.hpp"
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using namespace max2831;
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#endif
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namespace ui {
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/* DebugMemoryView *******************************************************/
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@@ -1337,6 +1342,8 @@ Si5351DebugView::Si5351DebugView(NavigationView& nav)
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&text_sys_init_status,
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&text_xtal_cap_label,
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&text_xtal_cap_value,
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&text_clkin_label,
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&text_clkin_status,
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&text_clk0_label,
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&text_clk0_status,
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&text_clk0_freq_label,
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@@ -1417,6 +1424,11 @@ void Si5351DebugView::refresh_status() {
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// Read clock output enables (reg 16-23 control, reg 3 for output enable mask)
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uint8_t output_enable_mask = portapack::clock_manager.si5351_read_register(3);
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// CLKIN
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text_clkin_status.set(los_clkin ? "LOS" : "CLOCK SIGNAL");
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text_clkin_status.set_style(los_clkin ? Theme::getInstance()->fg_red
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: Theme::getInstance()->fg_green);
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// CLK0 (bit 0 of reg 3, reg 16 for control)
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uint8_t clk0_ctrl = portapack::clock_manager.si5351_read_register(16);
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bool clk0_enabled = !(output_enable_mask & 0x01) && !(clk0_ctrl & 0x80);
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@@ -2152,9 +2164,11 @@ void RFFC5072StatusView::refresh_status() {
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bool enx = (gpio2_pin >> 13) & 1;
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bool resetx = (gpio2_pin >> 14) & 1;
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text_ctrl.set(std::string(enx ? "DIS" : "EN") + " " +
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std::string(resetx ? "RUN" : "RST") + " " +
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"O:" + std::string(resetx_is_output ? "Y" : "N"));
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text_ctrl.set(
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std::string(enx ? "DIS" : "EN") + " " +
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std::string(resetx ? "RUN" : "RST") + " " +
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"EO:" + std::string(enx_is_output ? "Y" : "N") + " " +
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"RO:" + std::string(resetx_is_output ? "Y" : "N"));
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text_ctrl.set_style((enx == 0 && resetx == 1) ? Theme::getInstance()->fg_green
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: Theme::getInstance()->fg_red);
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@@ -2396,7 +2410,7 @@ void MAX2831DebugView::focus() {
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}
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void MAX2831DebugView::refresh() {
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auto info = radio::debug::second_if::get_max2831_info();
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auto info = get_max2831_info();
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// Show if set_frequency was called
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if (info.set_frequency_called) {
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@@ -660,17 +660,20 @@ class Si5351DebugView : public View {
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Text text_xtal_cap_label{{8, 120, 80, 16}, "XTAL Cap:"};
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Text text_xtal_cap_value{{96, 120, 144, 16}, ""};
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Text text_clk0_label{{8, 150, 72, 16}, "CLK0:"};
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Text text_clk0_status{{88, 150, 152, 16}, ""};
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Text text_clkin_label{{8, 140, 72, 16}, "CLKIN:"};
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Text text_clkin_status{{88, 140, 160, 16}, ""};
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Text text_clk0_freq_label{{8, 170, 72, 16}, " Freq:"};
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Text text_clk0_freq_value{{88, 170, 152, 16}, ""};
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Text text_clk0_label{{8, 160, 72, 16}, "CLK0:"};
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Text text_clk0_status{{88, 160, 152, 16}, ""};
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Text text_clk0_div_label{{8, 190, 72, 16}, " Div:"};
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Text text_clk0_div_value{{88, 190, 152, 16}, ""};
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Text text_clk0_freq_label{{8, 180, 72, 16}, " Freq:"};
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Text text_clk0_freq_value{{88, 180, 152, 16}, ""};
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Text text_clk1_label{{8, 210, 96, 16}, "CLK1 (SCT):"};
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Text text_clk1_status{{112, 210, 128, 16}, ""};
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Text text_clk0_div_label{{8, 200, 72, 16}, " Div:"};
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Text text_clk0_div_value{{88, 200, 152, 16}, ""};
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Text text_clk1_label{{8, 220, 96, 16}, "CLK1 (SCT):"};
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Text text_clk1_status{{112, 220, 128, 16}, ""};
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Button button_refresh{{8, 240, 72, 24}, "Refresh"};
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Button button_reset_pll{{88, 240, 72, 24}, "Reset PLL"};
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@@ -38,20 +38,21 @@ using namespace hackrf::one;
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#include <algorithm>
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#include <cstring>
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// Global debug tracking for MAX2831
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struct max2831_debug_t {
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uint32_t requested_freq_mhz;
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uint32_t calculated_n;
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uint32_t calculated_frac;
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bool set_frequency_called;
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bool frequency_valid;
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};
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extern "C" max2831_debug_t max2831_debug_info = {0, 0, 0, false, false};
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namespace max2831 {
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using namespace max283x;
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static MAX2831Info max2831_info = {0, 0, 0, false, false};
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MAX2831Info get_max2831_info() {
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return {
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max2831_info.requested_freq_mhz,
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max2831_info.calculated_n,
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max2831_info.calculated_frac,
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max2831_info.set_frequency_called,
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max2831_info.frequency_valid};
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}
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/*
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* MAX2831 uses 9-bit SPI transfers.
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* An 18-bit word is sent as two 9-bit transfers:
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@@ -378,20 +379,20 @@ bool MAX2831::set_frequency(const rf::Frequency lo_frequency) {
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*/
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/* MAX2831 supports 2.3-2.6 GHz */
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// if (lo_frequency < 2300000000ULL || lo_frequency > 2600000000ULL) {
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// if (lo_frequency < MAX2831_MIN_LO_FREQUENCY_HZ || lo_frequency > MAX2831_MAX_LO_FREQUENCY_HZ) {
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// return false;
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// }
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bool valid = (lo_frequency >= 2300000000ULL && lo_frequency <= 2600000000ULL);
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bool valid = (lo_frequency >= MAX2831_MIN_LO_FREQUENCY_HZ && lo_frequency <= MAX2831_MAX_LO_FREQUENCY_HZ);
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// TRACK REQUEST IMMEDIATELY
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max2831_debug_info.requested_freq_mhz = lo_frequency / 1000000;
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max2831_debug_info.set_frequency_called = true;
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max2831_debug_info.frequency_valid = valid;
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max2831_info.requested_freq_mhz = lo_frequency / 1000000;
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max2831_info.set_frequency_called = true;
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max2831_info.frequency_valid = valid;
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if (!valid) {
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max2831_debug_info.calculated_n = 0;
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max2831_debug_info.calculated_frac = 0;
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max2831_info.calculated_n = 0;
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max2831_info.calculated_frac = 0;
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return false;
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}
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@@ -414,8 +415,8 @@ bool MAX2831::set_frequency(const rf::Frequency lo_frequency) {
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}
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// TRACK CALCULATED VALUES
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max2831_debug_info.calculated_n = div_int;
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max2831_debug_info.calculated_frac = div_frac;
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max2831_info.calculated_n = div_int;
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max2831_info.calculated_frac = div_frac;
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/* Write order matters - matches GSG reference */
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/* REG 3: SYN_INT (bits 7:0) and SYN_FRAC_LO (bits 13:8) */
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@@ -38,6 +38,21 @@ namespace max2831 {
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using namespace max283x;
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// Global debug tracking for MAX2831
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struct MAX2831Info {
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uint32_t requested_freq_mhz;
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uint32_t calculated_n;
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uint32_t calculated_frac;
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bool set_frequency_called;
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bool frequency_valid;
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};
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MAX2831Info get_max2831_info();
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/* minumum and maximum lo_frequencies supported by max2831 */
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constexpr rf::Frequency MAX2831_MIN_LO_FREQUENCY_HZ = 2300000000LL;
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constexpr rf::Frequency MAX2831_MAX_LO_FREQUENCY_HZ = 2600000000LL;
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/* MAX2831 has 16 registers, each containing 14 bits of data */
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constexpr size_t reg_count = 16;
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@@ -32,10 +32,11 @@
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extern "C" {
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#include "fpga_bridge.h"
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}
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#else
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#include "baseband_cpld.hpp"
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#endif
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#include "max5864.hpp"
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#include "baseband_cpld.hpp"
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#include "tuning.hpp"
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@@ -116,9 +117,10 @@ max2837::MAX2837 second_if_max2837{ssp1_target_max283x};
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max2839::MAX2839 second_if_max2839{ssp1_target_max283x};
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#ifdef PRALINE
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max2831::MAX2831 second_if_max2831{ssp1_target_max283x};
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#else
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static baseband::CPLD baseband_cpld;
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#endif
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static max5864::MAX5864 baseband_codec{ssp1_target_max5864};
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static baseband::CPLD baseband_cpld;
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// load_sram() is called at boot in portapack.cpp, including verify CPLD part, so default direction is Receive
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static rf::Direction direction{rf::Direction::Receive};
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@@ -457,27 +459,6 @@ TuningInfo get_tuning_info() {
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namespace second_if {
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#ifdef PRALINE
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extern "C" {
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extern struct max2831_debug_t {
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uint32_t requested_freq_mhz;
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uint32_t calculated_n;
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uint32_t calculated_frac;
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bool set_frequency_called;
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bool frequency_valid;
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} max2831_debug_info;
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}
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MAX2831Info get_max2831_info() {
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return {
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max2831_debug_info.requested_freq_mhz,
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max2831_debug_info.calculated_n,
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max2831_debug_info.calculated_frac,
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max2831_debug_info.set_frequency_called,
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max2831_debug_info.frequency_valid};
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}
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#endif
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uint32_t register_read(const size_t register_number) {
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return radio::second_if->read(register_number);
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}
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@@ -95,17 +95,6 @@ TuningInfo get_tuning_info();
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namespace second_if {
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#ifdef PRALINE
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struct MAX2831Info {
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uint32_t requested_freq_mhz;
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uint32_t calculated_n;
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uint32_t calculated_frac;
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bool set_frequency_called;
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bool frequency_valid;
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};
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MAX2831Info get_max2831_info();
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#endif
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uint32_t register_read(const size_t register_number);
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void register_write(const size_t register_number, uint32_t value);
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@@ -3,7 +3,6 @@
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// Check if PRALINE was passed from CMake
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#ifdef PRALINE
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#warning "Building for HackRF_PRO with FPGA."
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// Necessary headers
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#include "lz4_blk.h"
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@@ -297,7 +296,6 @@
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// Cached register values for debug reads (since reads may require mode switch)
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static uint8_t fpga_reg_cache[6] = {0, 0x01, 0x00, 0x00, 0x00, 0x00};
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static uint8_t fpga_reg_cache_valid = 0;
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// Public function to read FPGA register (callable from C++ application code)
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// Switches SPI mode, reads register, switches back
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+1
-1
Submodule hackrf updated: f56e711b6b...f1dcd5544d
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