From 705e4f125f4aa57b8b27f359234685c98e5dbf6f Mon Sep 17 00:00:00 2001 From: gullradriel <3157857+gullradriel@users.noreply.github.com> Date: Fri, 20 Feb 2026 12:08:41 +0100 Subject: [PATCH] Update submodule, fix warnings for PRALINE (#3012) * update submodule * remove pragma, remove unused variable * fix bad external decl, signed vs unsigned comparison * fix unused: display computed flags * fix max2881 info mess * code format * fix gui positions * use constexpr for min and max lo_frequencies --- firmware/application/apps/ui_debug.cpp | 22 +++++++++-- firmware/application/apps/ui_debug.hpp | 19 +++++---- firmware/application/hw/max2831.cpp | 39 ++++++++++--------- firmware/application/hw/max2831.hpp | 15 +++++++ firmware/application/radio.cpp | 27 ++----------- firmware/application/radio.hpp | 11 ------ .../PORTAPACK_APPLICATION/fpga_bridge.c | 2 - hackrf | 2 +- 8 files changed, 69 insertions(+), 68 deletions(-) diff --git a/firmware/application/apps/ui_debug.cpp b/firmware/application/apps/ui_debug.cpp index a9e06bf91..168d8a5f7 100644 --- a/firmware/application/apps/ui_debug.cpp +++ b/firmware/application/apps/ui_debug.cpp @@ -46,6 +46,11 @@ using namespace portapack; #include "irq_controls.hpp" +#ifdef PRALINE +#include "max2831.hpp" +using namespace max2831; +#endif + namespace ui { /* DebugMemoryView *******************************************************/ @@ -1337,6 +1342,8 @@ Si5351DebugView::Si5351DebugView(NavigationView& nav) &text_sys_init_status, &text_xtal_cap_label, &text_xtal_cap_value, + &text_clkin_label, + &text_clkin_status, &text_clk0_label, &text_clk0_status, &text_clk0_freq_label, @@ -1417,6 +1424,11 @@ void Si5351DebugView::refresh_status() { // Read clock output enables (reg 16-23 control, reg 3 for output enable mask) uint8_t output_enable_mask = portapack::clock_manager.si5351_read_register(3); + // CLKIN + text_clkin_status.set(los_clkin ? "LOS" : "CLOCK SIGNAL"); + text_clkin_status.set_style(los_clkin ? Theme::getInstance()->fg_red + : Theme::getInstance()->fg_green); + // CLK0 (bit 0 of reg 3, reg 16 for control) uint8_t clk0_ctrl = portapack::clock_manager.si5351_read_register(16); bool clk0_enabled = !(output_enable_mask & 0x01) && !(clk0_ctrl & 0x80); @@ -2152,9 +2164,11 @@ void RFFC5072StatusView::refresh_status() { bool enx = (gpio2_pin >> 13) & 1; bool resetx = (gpio2_pin >> 14) & 1; - text_ctrl.set(std::string(enx ? "DIS" : "EN") + " " + - std::string(resetx ? "RUN" : "RST") + " " + - "O:" + std::string(resetx_is_output ? "Y" : "N")); + text_ctrl.set( + std::string(enx ? "DIS" : "EN") + " " + + std::string(resetx ? "RUN" : "RST") + " " + + "EO:" + std::string(enx_is_output ? "Y" : "N") + " " + + "RO:" + std::string(resetx_is_output ? "Y" : "N")); text_ctrl.set_style((enx == 0 && resetx == 1) ? Theme::getInstance()->fg_green : Theme::getInstance()->fg_red); @@ -2396,7 +2410,7 @@ void MAX2831DebugView::focus() { } void MAX2831DebugView::refresh() { - auto info = radio::debug::second_if::get_max2831_info(); + auto info = get_max2831_info(); // Show if set_frequency was called if (info.set_frequency_called) { diff --git a/firmware/application/apps/ui_debug.hpp b/firmware/application/apps/ui_debug.hpp index 73b03c6fa..31a9fc50b 100644 --- a/firmware/application/apps/ui_debug.hpp +++ b/firmware/application/apps/ui_debug.hpp @@ -660,17 +660,20 @@ class Si5351DebugView : public View { Text text_xtal_cap_label{{8, 120, 80, 16}, "XTAL Cap:"}; Text text_xtal_cap_value{{96, 120, 144, 16}, ""}; - Text text_clk0_label{{8, 150, 72, 16}, "CLK0:"}; - Text text_clk0_status{{88, 150, 152, 16}, ""}; + Text text_clkin_label{{8, 140, 72, 16}, "CLKIN:"}; + Text text_clkin_status{{88, 140, 160, 16}, ""}; - Text text_clk0_freq_label{{8, 170, 72, 16}, " Freq:"}; - Text text_clk0_freq_value{{88, 170, 152, 16}, ""}; + Text text_clk0_label{{8, 160, 72, 16}, "CLK0:"}; + Text text_clk0_status{{88, 160, 152, 16}, ""}; - Text text_clk0_div_label{{8, 190, 72, 16}, " Div:"}; - Text text_clk0_div_value{{88, 190, 152, 16}, ""}; + Text text_clk0_freq_label{{8, 180, 72, 16}, " Freq:"}; + Text text_clk0_freq_value{{88, 180, 152, 16}, ""}; - Text text_clk1_label{{8, 210, 96, 16}, "CLK1 (SCT):"}; - Text text_clk1_status{{112, 210, 128, 16}, ""}; + Text text_clk0_div_label{{8, 200, 72, 16}, " Div:"}; + Text text_clk0_div_value{{88, 200, 152, 16}, ""}; + + Text text_clk1_label{{8, 220, 96, 16}, "CLK1 (SCT):"}; + Text text_clk1_status{{112, 220, 128, 16}, ""}; Button button_refresh{{8, 240, 72, 24}, "Refresh"}; Button button_reset_pll{{88, 240, 72, 24}, "Reset PLL"}; diff --git a/firmware/application/hw/max2831.cpp b/firmware/application/hw/max2831.cpp index 8fb2e43d2..8ce7e0218 100644 --- a/firmware/application/hw/max2831.cpp +++ b/firmware/application/hw/max2831.cpp @@ -38,20 +38,21 @@ using namespace hackrf::one; #include #include -// Global debug tracking for MAX2831 -struct max2831_debug_t { - uint32_t requested_freq_mhz; - uint32_t calculated_n; - uint32_t calculated_frac; - bool set_frequency_called; - bool frequency_valid; -}; -extern "C" max2831_debug_t max2831_debug_info = {0, 0, 0, false, false}; - namespace max2831 { using namespace max283x; +static MAX2831Info max2831_info = {0, 0, 0, false, false}; + +MAX2831Info get_max2831_info() { + return { + max2831_info.requested_freq_mhz, + max2831_info.calculated_n, + max2831_info.calculated_frac, + max2831_info.set_frequency_called, + max2831_info.frequency_valid}; +} + /* * MAX2831 uses 9-bit SPI transfers. * An 18-bit word is sent as two 9-bit transfers: @@ -378,20 +379,20 @@ bool MAX2831::set_frequency(const rf::Frequency lo_frequency) { */ /* MAX2831 supports 2.3-2.6 GHz */ - // if (lo_frequency < 2300000000ULL || lo_frequency > 2600000000ULL) { + // if (lo_frequency < MAX2831_MIN_LO_FREQUENCY_HZ || lo_frequency > MAX2831_MAX_LO_FREQUENCY_HZ) { // return false; // } - bool valid = (lo_frequency >= 2300000000ULL && lo_frequency <= 2600000000ULL); + bool valid = (lo_frequency >= MAX2831_MIN_LO_FREQUENCY_HZ && lo_frequency <= MAX2831_MAX_LO_FREQUENCY_HZ); // TRACK REQUEST IMMEDIATELY - max2831_debug_info.requested_freq_mhz = lo_frequency / 1000000; - max2831_debug_info.set_frequency_called = true; - max2831_debug_info.frequency_valid = valid; + max2831_info.requested_freq_mhz = lo_frequency / 1000000; + max2831_info.set_frequency_called = true; + max2831_info.frequency_valid = valid; if (!valid) { - max2831_debug_info.calculated_n = 0; - max2831_debug_info.calculated_frac = 0; + max2831_info.calculated_n = 0; + max2831_info.calculated_frac = 0; return false; } @@ -414,8 +415,8 @@ bool MAX2831::set_frequency(const rf::Frequency lo_frequency) { } // TRACK CALCULATED VALUES - max2831_debug_info.calculated_n = div_int; - max2831_debug_info.calculated_frac = div_frac; + max2831_info.calculated_n = div_int; + max2831_info.calculated_frac = div_frac; /* Write order matters - matches GSG reference */ /* REG 3: SYN_INT (bits 7:0) and SYN_FRAC_LO (bits 13:8) */ diff --git a/firmware/application/hw/max2831.hpp b/firmware/application/hw/max2831.hpp index 84eb97766..7db101825 100644 --- a/firmware/application/hw/max2831.hpp +++ b/firmware/application/hw/max2831.hpp @@ -38,6 +38,21 @@ namespace max2831 { using namespace max283x; +// Global debug tracking for MAX2831 +struct MAX2831Info { + uint32_t requested_freq_mhz; + uint32_t calculated_n; + uint32_t calculated_frac; + bool set_frequency_called; + bool frequency_valid; +}; + +MAX2831Info get_max2831_info(); + +/* minumum and maximum lo_frequencies supported by max2831 */ +constexpr rf::Frequency MAX2831_MIN_LO_FREQUENCY_HZ = 2300000000LL; +constexpr rf::Frequency MAX2831_MAX_LO_FREQUENCY_HZ = 2600000000LL; + /* MAX2831 has 16 registers, each containing 14 bits of data */ constexpr size_t reg_count = 16; diff --git a/firmware/application/radio.cpp b/firmware/application/radio.cpp index cf844bf06..fe5096f44 100644 --- a/firmware/application/radio.cpp +++ b/firmware/application/radio.cpp @@ -32,10 +32,11 @@ extern "C" { #include "fpga_bridge.h" } +#else +#include "baseband_cpld.hpp" #endif #include "max5864.hpp" -#include "baseband_cpld.hpp" #include "tuning.hpp" @@ -116,9 +117,10 @@ max2837::MAX2837 second_if_max2837{ssp1_target_max283x}; max2839::MAX2839 second_if_max2839{ssp1_target_max283x}; #ifdef PRALINE max2831::MAX2831 second_if_max2831{ssp1_target_max283x}; +#else +static baseband::CPLD baseband_cpld; #endif static max5864::MAX5864 baseband_codec{ssp1_target_max5864}; -static baseband::CPLD baseband_cpld; // load_sram() is called at boot in portapack.cpp, including verify CPLD part, so default direction is Receive static rf::Direction direction{rf::Direction::Receive}; @@ -457,27 +459,6 @@ TuningInfo get_tuning_info() { namespace second_if { -#ifdef PRALINE -extern "C" { -extern struct max2831_debug_t { - uint32_t requested_freq_mhz; - uint32_t calculated_n; - uint32_t calculated_frac; - bool set_frequency_called; - bool frequency_valid; -} max2831_debug_info; -} - -MAX2831Info get_max2831_info() { - return { - max2831_debug_info.requested_freq_mhz, - max2831_debug_info.calculated_n, - max2831_debug_info.calculated_frac, - max2831_debug_info.set_frequency_called, - max2831_debug_info.frequency_valid}; -} -#endif - uint32_t register_read(const size_t register_number) { return radio::second_if->read(register_number); } diff --git a/firmware/application/radio.hpp b/firmware/application/radio.hpp index 217b5a316..cf9290352 100644 --- a/firmware/application/radio.hpp +++ b/firmware/application/radio.hpp @@ -95,17 +95,6 @@ TuningInfo get_tuning_info(); namespace second_if { -#ifdef PRALINE -struct MAX2831Info { - uint32_t requested_freq_mhz; - uint32_t calculated_n; - uint32_t calculated_frac; - bool set_frequency_called; - bool frequency_valid; -}; -MAX2831Info get_max2831_info(); -#endif - uint32_t register_read(const size_t register_number); void register_write(const size_t register_number, uint32_t value); diff --git a/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/fpga_bridge.c b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/fpga_bridge.c index b144e6ba9..afdc6cd9e 100644 --- a/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/fpga_bridge.c +++ b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/fpga_bridge.c @@ -3,7 +3,6 @@ // Check if PRALINE was passed from CMake #ifdef PRALINE - #warning "Building for HackRF_PRO with FPGA." // Necessary headers #include "lz4_blk.h" @@ -297,7 +296,6 @@ // Cached register values for debug reads (since reads may require mode switch) static uint8_t fpga_reg_cache[6] = {0, 0x01, 0x00, 0x00, 0x00, 0x00}; - static uint8_t fpga_reg_cache_valid = 0; // Public function to read FPGA register (callable from C++ application code) // Switches SPI mode, reads register, switches back diff --git a/hackrf b/hackrf index f56e711b6..f1dcd5544 160000 --- a/hackrf +++ b/hackrf @@ -1 +1 @@ -Subproject commit f56e711b6bc254a8ea5d25e90133b508de93bd56 +Subproject commit f1dcd5544d24432df37d1a884c35c8d55bd357c7