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b9cdfd9e9a
This commit adds support for timer interrupts, replacing the busy loop that was used before. It is perhaps the most simple interrupt to implement and should serve as the basis for further interrupt support in RISC-V.
61 lines
1.6 KiB
ArmAsm
61 lines
1.6 KiB
ArmAsm
.section .init
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.global _start
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.type _start,@function
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_start:
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// Load the stack pointer.
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la sp, _stack_top
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// Load the globals pointer. The program will load pointers relative to this
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// register, so it must be set to the right value on startup.
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// See: https://gnu-mcu-eclipse.github.io/arch/riscv/programmer/#the-gp-global-pointer-register
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la gp, __global_pointer$
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// Jump to runtime.main
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call main
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.section .text.handleInterruptASM
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.global handleInterruptASM
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.type handleInterruptASM,@function
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handleInterruptASM:
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// Save and restore all registers, because the hardware only saves/restores
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// the pc.
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// Note: we have to do this in assembly because the "interrupt"="machine"
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// attribute is broken in LLVM: https://bugs.llvm.org/show_bug.cgi?id=42984
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addi sp, sp, -64
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sw ra, 60(sp)
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sw t0, 56(sp)
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sw t1, 52(sp)
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sw t2, 48(sp)
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sw a0, 44(sp)
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sw a1, 40(sp)
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sw a2, 36(sp)
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sw a3, 32(sp)
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sw a4, 28(sp)
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sw a5, 24(sp)
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sw a6, 20(sp)
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sw a7, 16(sp)
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sw t3, 12(sp)
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sw t4, 8(sp)
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sw t5, 4(sp)
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sw t6, 0(sp)
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call handleInterrupt
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lw t6, 0(sp)
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lw t5, 4(sp)
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lw t4, 8(sp)
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lw t3, 12(sp)
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lw a7, 16(sp)
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lw a6, 20(sp)
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lw a5, 24(sp)
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lw a4, 28(sp)
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lw a3, 32(sp)
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lw a2, 36(sp)
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lw a1, 40(sp)
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lw a0, 44(sp)
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lw t2, 48(sp)
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lw t1, 52(sp)
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lw t0, 56(sp)
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lw ra, 60(sp)
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addi sp, sp, 64
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mret
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