mirror of
https://github.com/tinygo-org/tinygo.git
synced 2026-09-01 18:29:03 +00:00
Pavel Burgr
b420a8be17
* pinout yamls removed * machine: implement default UART pin configuration for Embedfire boards * flash command moved to chip level so VS Code plugin can select bare chip * machine: add support for alternate pin mode configuration * add build targets for embedfire on py32 * add support for embedfire target in GNUmakefile for py32 * lib/py32-svd: remove duplicate DBGMCU.IDCODE CODE field Update submodule to fix duplicate SetIDCODE/GetIDCODE method declarations in the generated py32f002bxx.go device file. * update subproject commit reference in py32-svd * refactor: update CPU frequency handling in machine and runtime packages * refactor: replace ConfigureUARTPin function with direct pin configuration in UART setup * SetAltFunc documentation for GPIO pin alternate functions * refactor: improve UART write and flush error handling with timeout * machine/py32: generalize UART driver to any USART Add a per-instance setup func to the UART type so the driver is no longer hardwired to USART1. DefaultUART stays USART1; add UART2 (USART2) in a separately build-tagged file since py32f002x parts lack USART2. RX IRQ handlers reference runtime-assigned vars to break the init cycle, and setup is assigned in the var initializer so it runs before InitSerial. Add the py32f003_32k_4k target (32K flash / 4K RAM). * Add canonical PY32F002, F003, and F030 density targets Use CMSIS/pyocd device names for target files and build tags. Add all F003 and F030 densities plus F002A/B, correct F002B to 24K flash and its own startup file, fix the F030x8 pyocd target, and update Embedfire inheritance. * Add targets for all PY32 CMSIS devices * Support all PY32 register layout variants * machine/py32: use generated register definitions * machine/py32: fix alternate-function documentation * machine/py32: report the configured CPU frequency * machine/py32: use unsafe.Add for GPIO ports * machine/py32: bound and yield UART polling * machine/py32: configure UART pins from UARTConfig * build: use the current PY32 SVD repository URL * test: cover PY32 UART register layouts * machine/py32: restore dynamic CPU frequency tracking * machine/py32: share the USART TX-ready bit * targets/py32: scale system stacks with RAM * machine/py32: keep clock state internal * targets/py32: normalize generated metadata * machine/py32: normalize GPIO configuration * machine/py32: fix T020 UART setup * machine/py32: reduce clock variant files * machine/py32: clean up UART variants * machine/py32: decouple UART clock capability * lib/py32-svd: use organization repository * runtime/py32: name 24MHz HSI encodings * machine/py32: derive startup clock from capability * machine/py32: use generated USART clock mask * machine/py32: name T020 8-bit UART mode * ci: include PY32 in sharded smoke tests * runtime: remove PY32 HSI frequency workaround
89 lines
5.4 KiB
CSV
89 lines
5.4 KiB
CSV
part,family,core,flash_start,flash_size,ram_start,ram_size
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py32e407xc,py32e407xx,m4,0x08000000,0x40000,0x20000000,0x1c000
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py32e407xd,py32e407xx,m4,0x08000000,0x60000,0x20000000,0x24000
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py32e407xe,py32e407xx,m4,0x08000000,0x80000,0x20000000,0x24000
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py32f001cx4,py32f001cxx,m0,0x08000000,0x4000,0x20000000,0xc00
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py32f002ax5,py32f002axx,m0,0x08000000,0x5000,0x20000000,0xc00
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py32f002bx5,py32f002bxx,m0,0x08000000,0x6000,0x20000000,0xc00
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py32f002cx5,py32f002cxx,m0,0x08000000,0x8000,0x20000000,0xc00
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py32f002xx2,py32f002xxx,m0,0x08000000,0x2000,0x20000000,0xc00
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py32f002xx4,py32f002xxx,m0,0x08000000,0x4000,0x20000000,0xc00
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py32f002xx5,py32f002xxx,m0,0x08000000,0x6000,0x20000000,0xc00
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py32f002zx4,py32f002zxx,m0,0x08000000,0x4000,0x20000000,0xc00
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py32f003x4,py32f003xx,m0,0x08000000,0x4000,0x20000000,0x800
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py32f003x6,py32f003xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f003x7,py32f003xx,m0,0x08000000,0xc000,0x20000000,0x1800
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py32f003x8,py32f003xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f021x8,py32f021xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f030x4,py32f030xx,m0,0x08000000,0x4000,0x20000000,0x800
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py32f030x6,py32f030xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f030x7,py32f030xx,m0,0x08000000,0xc000,0x20000000,0x1800
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py32f030x8,py32f030xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f031x4,py32f031xx,m0,0x08000000,0x4000,0x20000000,0x800
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py32f031x6,py32f031xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f031x7,py32f031xx,m0,0x08000000,0xc000,0x20000000,0x1800
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py32f031x8,py32f031xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f032x8,py32f032xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f040cx6,py32f040cxx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f040cx8,py32f040cxx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f040cx9,py32f040cxx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f040cxb,py32f040cxx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f040epxb,py32f040epxx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f040ex6,py32f040exx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f040ex8,py32f040exx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f040ex9,py32f040exx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f040exb,py32f040exx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f040x6,py32f040xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f040x8,py32f040xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f040x9,py32f040xx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f040xb,py32f040xx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f071cx6,py32f071cxx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f071cx8,py32f071cxx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f071cx9,py32f071cxx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f071cxb,py32f071cxx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f071ex6,py32f071exx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f071ex8,py32f071exx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f071ex9,py32f071exx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f071exb,py32f071exx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f071x6,py32f071xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f071x8,py32f071xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f071x9,py32f071xx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f071xb,py32f071xx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f072cx6,py32f072cxx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f072cx8,py32f072cxx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f072cx9,py32f072cxx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f072cxb,py32f072cxx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f072ex6,py32f072exx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f072ex8,py32f072exx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f072ex9,py32f072exx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f072exb,py32f072exx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f072x6,py32f072xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32f072x8,py32f072xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32f072x9,py32f072xx,m0,0x08000000,0x18000,0x20000000,0x3000
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py32f072xb,py32f072xx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32f403xb,py32f403xx,m4,0x08000000,0x20000,0x20000000,0x10000
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py32f403xc,py32f403xx,m4,0x08000000,0x40000,0x20000000,0x10000
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py32f403xd,py32f403xx,m4,0x08000000,0x60000,0x20000000,0x10000
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py32f410xb,py32f410xx,m4,0x08000000,0x20000,0x20000000,0x4000
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py32l020x5,py32l020xx,m0,0x08000000,0x6000,0x20000000,0xc00
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py32l090xb,py32l090xx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32l090xc,py32l090xx,m0,0x08000000,0x40000,0x20000000,0x8000
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py32m010x5,py32m010xx,m0,0x08000000,0x6000,0x20000000,0xc00
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py32m020x6,py32m020xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32m030x8,py32m030xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32m031x8,py32m031xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32m070cxb,py32m070cxx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32m070xb,py32m070xx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32md310x8,py32md310xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32md320x8,py32md320xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32md410x8,py32md410xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32md420x8,py32md420xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32md430x8,py32md430xx,m0,0x08000000,0x10000,0x20000000,0x2000
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py32t020bx5,py32t020xx,m0,0x08000000,0x5000,0x20000000,0x800
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py32t020bx6,py32t020xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32t020x5,py32t020xx,m0,0x08000000,0x5000,0x20000000,0x800
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py32t020x6,py32t020xx,m0,0x08000000,0x8000,0x20000000,0x1000
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py32t090xb,py32t090xx,m0,0x08000000,0x20000,0x20000000,0x4000
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py32t090xc,py32t090xx,m0,0x08000000,0x40000,0x20000000,0x8000
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py32t092xc,py32t092xx,m0,0x08000000,0x40000,0x20000000,0x8000
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