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riscv: print exception PC and code
This can be useful for debugging critical bugs in code. I haven't added human-readable exceptions (such as "illegal instruction" or "stack overflow") yet, they can be added when they happen in practice (to avoid increasing code size too much).
This commit is contained in:
committed by
Ron Evans
parent
b9cdfd9e9a
commit
b258f3424b
@@ -69,8 +69,10 @@ func handleInterrupt() {
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riscv.MIE.ClearBits(1 << 7) // MTIE bit
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}
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} else {
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// TODO: handle exceptions in a similar was as HardFault is handled on
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// Cortex-M (by printing an error message with instruction address).
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// Topmost bit is clear, so it is an exception of some sort.
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// We could implement support for unsupported instructions here (such as
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// misaligned loads). However, for now we'll just print a fatal error.
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handleException(code)
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}
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}
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@@ -151,3 +153,17 @@ func sleepTicks(d timeUnit) {
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riscv.Asm("wfi")
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}
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}
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// handleException is called from the interrupt handler for any exception.
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// Exceptions can be things like illegal instructions, invalid memory
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// read/write, and similar issues.
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func handleException(code uint) {
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// For a list of exception codes, see:
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// https://content.riscv.org/wp-content/uploads/2019/08/riscv-privileged-20190608-1.pdf#page=49
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print("fatal error: exception with mcause=")
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print(code)
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print(" pc=")
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print(riscv.MEPC.Get())
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println()
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abort()
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}
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