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stm32: make SPI CLK fast to fix data issue

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See "STM32F40x and STM32F41x Errata sheet" - SPI CLK port must be 'fast' or 'very fast' to avoid data corruption on last bit (at the APB clocks we configure).
This commit is contained in:
Kenneth Bell
2021-04-12 20:05:41 -07:00
committed by Ron Evans
parent e587b1d1b4
commit ae59e7703e
1 changed files with 6 additions and 4 deletions
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src/machine/machine_stm32_moder_gpio.go
+6 -4
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@@ -55,9 +55,11 @@ const (
gpioPullMask = 0x3
// OSPEED bitfields.
gpioOutputSpeedHigh = 2
gpioOutputSpeedLow = 0
gpioOutputSpeedMask = 0x3
gpioOutputSpeedVeryHigh = 3
gpioOutputSpeedHigh = 2
gpioOutputSpeedMedium = 1
gpioOutputSpeedLow = 0
gpioOutputSpeedMask = 0x3
)
// Configure this pin with the given configuration
@@ -120,7 +122,7 @@ func (p Pin) ConfigureAltFunc(config PinConfig, altFunc uint8) {
// SPI
case PinModeSPICLK:
port.MODER.ReplaceBits(gpioModeAlternate, gpioModeMask, pos)
port.OSPEEDR.ReplaceBits(gpioOutputSpeedLow, gpioOutputSpeedMask, pos)
port.OSPEEDR.ReplaceBits(gpioOutputSpeedHigh, gpioOutputSpeedMask, pos)
port.PUPDR.ReplaceBits(gpioPullFloating, gpioPullMask, pos)
p.SetAltFunc(altFunc)
case PinModeSPISDO: