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prevent heap alloc in control complete

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This commit is contained in:
ardnew
2021-04-22 18:14:30 -05:00
parent eb705f0d4f
commit 0ff290cecc
4 changed files with 88 additions and 97 deletions
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src/device/nxp/mimxrt1062_mpu.go
-1
View File
@@ -278,7 +278,6 @@ func enableDcache(enable bool) {
}
}
// FlushDcache flushes data from cache to memory
//
// Normally FlushDcache is used when metadata written to memory will be used by
src/machine/usb/dcd_mimxrt1062.go
+78 -71
View File
@@ -658,16 +658,72 @@ func (dc *deviceController) control(setup dcdSetup) {
dc.bus.ENDPTCTRL0.Set(0x00010001)
}
// controlTransfers returns the data and ackowledgement transfer descriptors for
// the control endpoint (i.e., endpoint 0).
//go:inline
func (dc *deviceController) controlTransfers() (dat, ack *dcdTransfer) {
// control endpoint is device class-specific
switch dc.cc.id {
case classDeviceCDCACM:
return descCDCACM[dc.cc.config-1].cd, descCDCACM[dc.cc.config-1].ad
// controlComplete handles the setup completion of control endpoint 0.
func (dc *deviceController) controlComplete() {
// First, switch on the type of request (standard, class, or vendor)
switch dc.setup.bmRequestType & descRequestTypeTypeMsk {
// === CLASS REQUEST ===
case descRequestTypeTypeClass:
// Switch on the recepient and direction of the request
switch dc.setup.bmRequestType &
(descRequestTypeRecipientMsk | descRequestTypeDirMsk) {
// --- INTERFACE Rx (OUT) ---
case descRequestTypeRecipientInterface | descRequestTypeDirOut:
// Identify which request was received
switch dc.setup.bRequest {
// CDC | SET LINE CODING (0x20):
case descCDCRequestSetLineCoding:
// Respond based on our device class configuration
switch dc.cc.id {
// CDC-ACM (single)
case classDeviceCDCACM:
acm := &descCDCACM[dc.cc.config-1]
// Determine interface destination of the notification
switch dc.setup.wIndex {
// Control/status interface:
case descCDCACMInterfaceCtrl:
acm.lineCoding.baud = packU32(acm.cx[:])
acm.lineCoding.stopBits = acm.cx[4]
if 0 == acm.lineCoding.stopBits {
acm.lineCoding.stopBits = 1
}
acm.lineCoding.parity = acm.cx[5]
acm.lineCoding.numBits = acm.cx[6]
if 134 == acm.lineCoding.baud {
dc.enableSofInterrupts(true, descCDCACMInterfaceCount)
dc.rebootTimer = 80
}
default:
// Unhandled device interface
}
default:
// Unhandled device class
}
default:
// Unhandled request
}
default:
// Unhandled recepient or direction
}
default:
return nil, nil
// Unhandled request type
}
}
@@ -782,6 +838,19 @@ func (dc *deviceController) controlDescriptor(setup dcdSetup) {
}
// controlTransfers returns the data and ackowledgement transfer descriptors for
// the control endpoint (i.e., endpoint 0).
//go:inline
func (dc *deviceController) controlTransfers() (dat, ack *dcdTransfer) {
// control endpoint is device class-specific
switch dc.cc.id {
case classDeviceCDCACM:
return descCDCACM[dc.cc.config-1].cd, descCDCACM[dc.cc.config-1].ad
default:
return nil, nil
}
}
// controlReceive receives (Rx, OUT) data on control endpoint 0.
func (dc *deviceController) controlReceive(
data uintptr, size uint32, notify bool) {
@@ -858,68 +927,6 @@ func (dc *deviceController) controlTransmit(
}
}
// controlComplete handles the setup completion of control endpoint 0.
func (dc *deviceController) controlComplete() {
// First, switch on the type of request (standard, class, or vendor)
switch dc.setup.bmRequestType & descRequestTypeTypeMsk {
// === CLASS REQUEST ===
case descRequestTypeTypeClass:
// Switch on the recepient and direction of the request
switch dc.setup.bmRequestType &
(descRequestTypeRecipientMsk | descRequestTypeDirMsk) {
// --- INTERFACE Rx (OUT) ---
case descRequestTypeRecipientInterface | descRequestTypeDirOut:
// Identify which request was received
switch dc.setup.bRequest {
// CDC | SET LINE CODING (0x20):
case descCDCRequestSetLineCoding:
// Respond based on our device class configuration
switch dc.cc.id {
// CDC-ACM (single)
case classDeviceCDCACM:
acm := &descCDCACM[dc.cc.config-1]
// Determine interface destination of the notification
switch dc.setup.wIndex {
// Control/status interface:
case descCDCACMInterfaceCtrl:
if acm.lineCoding.parse(acm.cx[:]) {
if 134 == acm.lineCoding.baud {
dc.enableSofInterrupts(true, descCDCACMInterfaceCount)
dc.rebootTimer = 80
}
}
default:
// Unhandled device interface
}
default:
// Unhandled device class
}
default:
// Unhandled request
}
default:
// Unhandled recepient or direction
}
default:
// Unhandled request type
}
}
// endpointQueueHead returns the queue head for the given endpoint address,
// encoded as direction D and endpoint number N with the 8-bit mask DxxxNNNN.
//go:inline
src/machine/usb/desc.go
-15
View File
@@ -475,21 +475,6 @@ type descCDCACMLineCoding struct {
rtsdtr uint8
}
func (lc *descCDCACMLineCoding) parse(buffer []uint8) bool {
if len(buffer) < descCDCACMCodingSize {
return false
}
_ = copy(buffer[:], buffer)
lc.baud = packU32(buffer[:])
lc.stopBits = buffer[4]
if 0 == lc.stopBits {
lc.stopBits = 1
}
lc.parity = buffer[5]
lc.numBits = buffer[6]
return true
}
const (
descStringIndexCount = 4 // Language, Manufacturer, Product, Serial Number
descStringSize = 64 // (64-2)/2 = 31 chars each (UTF-16 code points)
src/machine/usb/hcd_mimxrt1062.go
+10 -10
View File
@@ -56,20 +56,20 @@ func initHCD(port int, class class) (hcd, status) {
case 0:
hostControllerInstance[i].bus = nxp.USB1
hostControllerInstance[i].phy = nxp.USBPHY1
hostControllerInstance[i].irq =
interrupt.New(nxp.IRQ_USB_OTG1,
func(interrupt.Interrupt) {
coreInstance[0].hc.interrupt()
})
//hostControllerInstance[i].irq =
// interrupt.New(nxp.IRQ_USB_OTG1,
// func(interrupt.Interrupt) {
// coreInstance[0].hc.interrupt()
// })
case 1:
hostControllerInstance[i].bus = nxp.USB2
hostControllerInstance[i].phy = nxp.USBPHY2
hostControllerInstance[i].irq =
interrupt.New(nxp.IRQ_USB_OTG2,
func(interrupt.Interrupt) {
//coreInstance[1].hc.interrupt()
})
//hostControllerInstance[i].irq =
// interrupt.New(nxp.IRQ_USB_OTG2,
// func(interrupt.Interrupt) {
// //coreInstance[1].hc.interrupt()
// })
}
return &hostControllerInstance[i], statusOK
}