device/arm: clear pending interrupts before enabling them

Without this change, a pending interrupt would spuriously trigger
immediately after enabling. This happens if an interrupt is triggered
during flashing (e.g. by DMA), which survives the subsequent reset.

This behaviour matches e.g. `machine.irqSet` in machine_rp2_rp2350.go.

See 7f970a45, whose symptoms were likely caused by spurious interrupts.
This commit is contained in:
Elias Naur
2025-04-11 21:40:56 +02:00
committed by Ron Evans
parent 0fdf08d14f
commit 0f06f59c6e
3 changed files with 10 additions and 2 deletions
+2 -2
View File
@@ -43,8 +43,8 @@ func TestBinarySize(t *testing.T) {
tests := []sizeTest{
// microcontrollers
{"hifive1b", "examples/echo", 4560, 280, 0, 2268},
{"microbit", "examples/serial", 2916, 388, 8, 2272},
{"wioterminal", "examples/pininterrupt", 7359, 1489, 116, 6912},
{"microbit", "examples/serial", 2924, 388, 8, 2272},
{"wioterminal", "examples/pininterrupt", 7383, 1489, 116, 6912},
// TODO: also check wasm. Right now this is difficult, because
// wasm binaries are run through wasm-opt and therefore the