diff --git a/builder/sizes_test.go b/builder/sizes_test.go
index a96ce9e6f..931e9970e 100644
--- a/builder/sizes_test.go
+++ b/builder/sizes_test.go
@@ -43,8 +43,8 @@ func TestBinarySize(t *testing.T) {
 	tests := []sizeTest{
 		// microcontrollers
 		{"hifive1b", "examples/echo", 4560, 280, 0, 2268},
-		{"microbit", "examples/serial", 2916, 388, 8, 2272},
-		{"wioterminal", "examples/pininterrupt", 7359, 1489, 116, 6912},
+		{"microbit", "examples/serial", 2924, 388, 8, 2272},
+		{"wioterminal", "examples/pininterrupt", 7383, 1489, 116, 6912},
 
 		// TODO: also check wasm. Right now this is difficult, because
 		// wasm binaries are run through wasm-opt and therefore the
diff --git a/src/device/arm/arm.go b/src/device/arm/arm.go
index 4b54da8f7..1f26b7fe9 100644
--- a/src/device/arm/arm.go
+++ b/src/device/arm/arm.go
@@ -146,6 +146,11 @@ const (
 	SYST_CALIB_NOREF     = 0x80000000 // Bit NOREF.
 )
 
+// ClearPendingIRQ clears the pending status of the interrupt.
+func ClearPendingIRQ(irq uint32) {
+	NVIC.ICPR[irq>>5].Set(1 << (irq & 0x1F))
+}
+
 // Enable the given interrupt number.
 func EnableIRQ(irq uint32) {
 	NVIC.ISER[irq>>5].Set(1 << (irq & 0x1F))
diff --git a/src/runtime/interrupt/interrupt_cortexm.go b/src/runtime/interrupt/interrupt_cortexm.go
index 708d486bd..2b44106da 100644
--- a/src/runtime/interrupt/interrupt_cortexm.go
+++ b/src/runtime/interrupt/interrupt_cortexm.go
@@ -9,6 +9,9 @@ import (
 // Enable enables this interrupt. Right after calling this function, the
 // interrupt may be invoked if it was already pending.
 func (irq Interrupt) Enable() {
+	// Clear the ARM pending bit, an asserting device may still
+	// trigger the interrupt once enabled.
+	arm.ClearPendingIRQ(uint32(irq.num))
 	arm.EnableIRQ(uint32(irq.num))
 }