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ws2812: add support for 168MHz (e.g. Adafruit Feather STM32F405)

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This commit is contained in:
Ayke van Laethem
2021-08-23 23:59:22 +02:00
committed by Ron Evans
parent 7a2b1b8c90
commit 259593e608
3 changed files with 398 additions and 1 deletions
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ws2812/gen-ws2812-arm.go
+1 -1
View File
@@ -35,7 +35,7 @@ import (
// from wp.josh.com seem to be fine for the ws2812.
// Clock frequencies to support, in MHz.
var clockFrequencies = []int{16, 48, 64, 120}
var clockFrequencies = []int{16, 48, 64, 120, 168}
func writeImplementation(f *os.File, megahertz int) error {
cycleTimeNS := 1 / float64(megahertz)
ws2812/ws2812-asm_cortexm.go
+394
View File
@@ -651,3 +651,397 @@ func (d Device) writeByte120(c byte) {
})
interrupt.Restore(mask)
}
func (d Device) writeByte168(c byte) {
portSet, maskSet := d.Pin.PortMaskSet()
portClear, maskClear := d.Pin.PortMaskClear()
// Timings:
// T0H: 59 - 61 cycles or 351.2ns - 363.1ns
// T1H: 177 - 179 cycles or 1053.6ns - 1065.5ns
// TLD: 194 - cycles or 1154.8ns -
mask := interrupt.Disable()
value := uint32(c) << 24
device.AsmFull(`
1: @ send_bit
str {maskSet}, {portSet} @ [2] T0H and T0L start here
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lsls {value}, #1 @ [1]
bcs.n 2f @ [1/3] skip_store
str {maskClear}, {portClear} @ [2] T0H -> T0L transition
2: @ skip_store
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str {maskClear}, {portClear} @ [2] T1H -> T1L transition
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subs {i}, #1 @ [1]
bne.n 1b @ [1/3] send_bit
`, map[string]interface{}{
"value": value,
"i": 8,
"maskSet": maskSet,
"portSet": portSet,
"maskClear": maskClear,
"portClear": portClear,
})
interrupt.Restore(mask)
}
ws2812/ws2812_cortexm.go
+3
View File
@@ -29,6 +29,9 @@ func (d Device) WriteByte(c byte) error {
case 120_000_000: // 120MHz
d.writeByte120(c)
return nil
case 168_000_000: // 168MHz, e.g. stm32f405
d.writeByte168(c)
return nil
default:
return errUnknownClockSpeed
}