update submodule (#3277)

* Initial plan

* Fix ADSB altitude integer overflow and add on-ground indicator

- Fix display overflow: use to_string_dec_int (signed) instead of
  to_string_dec_uint (unsigned) for altitude display - per ICAO Annex 10
  Vol IV 3.1.2.6.5.4, altitude = 25N-1000 can be as low as -1000ft
- Remove incorrect altitude clamp (altitude < 0 => 0) in DF 0/4/20 decoder
- Add on_ground flag to AircraftRecentEntry; set from TC 5-8 (surface
  position) messages, cleared on TC 9-22 (airborne position) messages
- Display 'GND' in altitude column when aircraft is on ground
- Clear altitude to 0 when on_ground is set to prevent stale data in map
  color calculation

Closes #3274

* Revert on-ground indicator; keep only the overflow and clamp fixes

Remove on_ground field, TC 5-8 handling, and "GND" display per review
feedback. Only keep the two minimal bug fixes:
- Signed altitude display (to_string_dec_int vs to_string_dec_uint)
- Remove erroneous altitude < 0 clamp; update comment to show the math

firmware/application/CMakeLists.txt

@@ -239,7 +239,6 @@ set(CPPSRC
 	serializer.cpp
 	spectrum_color_lut.cpp
 	string_format.cpp
-	temperature_logger.cpp
 	theme.cpp
 	touch.cpp
 	tone_key.cpp

firmware/application/apps/ui_adsb_rx.cpp

@@ -75,7 +75,7 @@ void RecentEntriesTable<AircraftRecentEntries>::draw(
     uint8_t firstcolwidth = columns.at(0).second;
     ipc.resize(firstcolwidth, ' ');  // Make sure this is always match the first column's width that is dynamic.
 
-    entry_string += ipc + to_string_dec_uint((unsigned int)(entry.pos.altitude / 100), 4);
+    entry_string += ipc + to_string_dec_int((int32_t)(entry.pos.altitude / 100), 4);
 
     if (entry.velo.type == SPD_IAS && entry.pos.alt_valid) {  // IAS can be converted to TAS
         // It is generally accepted that for every thousand feet of altitude,
@@ -668,9 +668,8 @@ void ADSBRxView::on_frame(const ADSBFrameMessage* message) {
                         (raw_data[3] & 15);
 
                 // The final altitude is due to the resulting number multiplied by 25, minus 1000.
+                // altitude = 25N - 1000 (ft); minimum is -1000 ft when N=0 (Q=1, M=0 per ICAO Annex 10).
                 altitude = 25 * n - 1000;
-                if (altitude < 0)
-                    altitude = 0;
             }  // else N is an 11 bit Gillham coded altitude
         }
 

firmware/application/apps/ui_looking_glass_app.cpp

@@ -328,8 +328,8 @@ void GlassView::update_min(int32_t v) {
         min_size = search_span;
     if (min_size < 1)
         min_size = 1;
-    if (v > 7200 - min_size) {
-        v = 7200 - min_size;
+    if (v > LOOKING_GLASS_MAX_FREQ_MHZ - min_size) {
+        v = LOOKING_GLASS_MAX_FREQ_MHZ - min_size;
     }
     if (v > (field_frequency_max.value() - min_size))
         field_frequency_max.set_value(v + min_size, false);
@@ -348,6 +348,9 @@ void GlassView::update_max(int32_t v) {
     if (v < min_size) {
         v = min_size;
     }
+    if (v > LOOKING_GLASS_MAX_FREQ_MHZ) {
+        v = LOOKING_GLASS_MAX_FREQ_MHZ;
+    }
     if (v < (field_frequency_min.value() + min_size))
         field_frequency_min.set_value(v - min_size, false);
     if (locked_range)
@@ -398,7 +401,7 @@ GlassView::GlassView(
                   &button_jump,
                   &button_rst,
                   &button_rssi,
-                  &freq_stats});
+                  &freq_stats, &button_play});
 
     load_presets();  // Load available presets from TXT files (or default).
     preset_index = clip<uint8_t>(preset_index, 0, presets_db.size());
@@ -554,6 +557,21 @@ GlassView::GlassView(
         reset_live_view();
     };
 
+    button_play.on_select = [this](ImageButton&) {
+        paused = !paused;
+        if (paused) {
+            button_play.set_foreground(Theme::getInstance()->fg_red->foreground);
+            button_play.set_background(Theme::getInstance()->fg_red->background);
+            baseband::spectrum_streaming_stop();
+            button_play.set_bitmap(&bitmap_play);
+        } else {
+            button_play.set_foreground(Theme::getInstance()->fg_green->foreground);
+            button_play.set_background(Theme::getInstance()->fg_green->background);
+            baseband::spectrum_streaming_start();
+            button_play.set_bitmap(&bitmap_stop);
+        }
+    };
+
     display.scroll_set_area(109, screen_height - 1);  // Restart scroll on the correct coordinates
 
     // trigger:
@@ -630,7 +648,7 @@ void GlassView::load_presets() {
                 parse_int(cols[1], entry.max);
                 entry.label = trimr(cols[2]);
 
-                if (entry.min == 0 || entry.max == 0 || entry.min >= entry.max)
+                if (entry.max == 0 || entry.min >= entry.max)
                     continue;  // Invalid line.
 
                 presets_db.emplace_back(std::move(entry));

firmware/application/apps/ui_looking_glass_app.hpp

@@ -42,6 +42,7 @@ namespace ui {
 #define LOOKING_GLASS_SLICE_WIDTH_MAX 20000000
 #define LOOKING_GLASS_MAX_SAMPLERATE 20000000
 #define MHZ_DIV 1000000
+#define LOOKING_GLASS_MAX_FREQ_MHZ 7250  // HackRF upper tuning limit (band_high top), in MHz
 
 // blanked DC (16 centered bins ignored ) and top left and right (2 bins ignored on each side )
 #define LOOKING_GLASS_FASTSCAN 0
@@ -129,6 +130,8 @@ class GlassView : public View {
     void populate_presets();
     void launch_audio(rf::Frequency center_freq);
 
+    bool paused{false};
+
     rf::Frequency search_span{0};
     rf::Frequency f_center{0};
     rf::Frequency f_center_ini{0};
@@ -179,14 +182,14 @@ class GlassView : public View {
     NumberField field_frequency_min{
         {UI_POS_X(4), UI_POS_Y(0)},
         4,
-        {0, 7199},
+        {0, LOOKING_GLASS_MAX_FREQ_MHZ - 1},
         1,  // number of steps by encoder delta
         ' '};
 
     NumberField field_frequency_max{
         {UI_POS_X(13), UI_POS_Y(0)},
         4,
-        {1, 7200},
+        {1, LOOKING_GLASS_MAX_FREQ_MHZ},
         1,  // number of steps by encoder delta
         ' '};
 
@@ -221,6 +224,12 @@ class GlassView : public View {
         {UI_POS_X_RIGHT(8), UI_POS_Y(2.25), UI_POS_WIDTH(8), UI_POS_HEIGHT(0.5)},
         ""};
 
+    ImageButton button_play{
+        {UI_POS_X_RIGHT(2), UI_POS_Y(3.25) - 2, UI_POS_WIDTH(2), UI_POS_HEIGHT(0.5)},
+        &bitmap_stop,
+        Theme::getInstance()->fg_green->foreground,
+        Theme::getInstance()->fg_green->background};
+
     TextField field_marker{
         {UI_POS_X(12), UI_POS_Y(3), UI_POS_WIDTH(9), UI_POS_HEIGHT(1)},
         ""};

firmware/application/apps/ui_settings.cpp

@@ -6,7 +6,7 @@
  * Copyright (C) 2024 Mark Thompson
  * Copyright (C) 2024 u-foka
  * Copyright (C) 2024 HTotoo
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/apps/ui_settings.hpp

@@ -5,7 +5,7 @@
  * Copyright (C) 2023 Kyle Reed
  * Copyright (C) 2024 Mark Thompson
  * Copyright (C) 2024 u-foka
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/config_mode.cpp

@@ -61,7 +61,6 @@ uint32_t blink_patterns[] = {
 
 void config_mode_run() {
     configure_pins_portapack();
-    portapack::gpio_dfu.input();
     portapack::persistent_memory::cache::init();
 
     if (hackrf_r9) {
@@ -80,14 +79,14 @@ void config_mode_run() {
         config_mode_blink_until_dfu();
     }
 
-    auto last_dfu_btn = portapack::gpio_dfu.read();
+    auto last_dfu_btn = dfu_button.read();
 
     int32_t counter = 0;
     int8_t blink_pattern_value = portapack::persistent_memory::config_cpld() +
                                  (portapack::persistent_memory::config_disable_external_tcxo() ? 5 : 0);
 
     while (true) {
-        auto dfu_btn = portapack::gpio_dfu.read();
+        auto dfu_btn = dfu_button.read();
         auto dfu_clicked = last_dfu_btn == true && dfu_btn == false;
         last_dfu_btn = dfu_btn;
 
@@ -137,7 +136,7 @@ void config_mode_blink_until_dfu() {
         led_usb.setInactive();
         chThdSleepMilliseconds(115);
 
-        auto dfu_btn = portapack::gpio_dfu.read();
+        auto dfu_btn = dfu_button.read();
         if (dfu_btn)
             break;
     }
@@ -145,7 +144,7 @@ void config_mode_blink_until_dfu() {
     while (true) {
         chThdSleepMilliseconds(10);
 
-        auto dfu_btn = portapack::gpio_dfu.read();
+        auto dfu_btn = dfu_button.read();
         if (!dfu_btn)
             break;
     }

firmware/application/event_m0.cpp

@@ -400,8 +400,6 @@ void EventDispatcher::handle_local_queue() {
 void EventDispatcher::handle_rtc_tick() {
     sd_card::poll_inserted();
 
-    portapack::temperature_logger.second_tick();
-
     const auto backlight_timer = portapack::persistent_memory::config_backlight_timer();
     if (backlight_timer.timeout_enabled()) {
         if (portapack::bl_tick_counter == backlight_timer.timeout_seconds())

firmware/application/external/app_manager/ui_app_manager.cpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/app_manager/ui_app_manager.hpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/epirb_tx/beacon.hpp

@@ -143,30 +143,6 @@ static void push_bits(uint8_t* buf, int& pos, uint64_t v, int n) {
         set_bit(buf, pos++, (v >> i) & 1);
 }
 
-/**
- * Convert a beacon to hex string representation
- * @param frame the frame to convert
- * @param start true for the first half of the frame, false for the second half
- * @return the hex string representation of the specieid half of the frame
- */
-std::string beacon_to_hex_string(const uint8_t* frame, bool start) {
-    static const char hex[] = "0123456789ABCDEF";
-
-    std::string out;
-    out.resize(18);
-
-    int offset = start ? 0 : 9;
-
-    for (int i = 0; i < 9; i++) {
-        uint8_t b = frame[offset + i];
-
-        out[i * 2] = hex[b >> 4];
-        out[i * 2 + 1] = hex[b & 0x0F];
-    }
-
-    return out;
-}
-
 /**
  * Generate a beacon in the provided buffer
  * @param frame the buffer to generate the frame in
@@ -351,6 +327,204 @@ size_t generate_beacon(uint8_t* frame, const BeaconParams& params) {
     return 18;
 }
 
+/**
+ * Convert a beacon hex string representation (generic range)
+ * @param frame the frame data
+ * @param offset_bytes starting byte offset
+ * @param count_bytes number of bytes to convert
+ * @return the hex string representation
+ */
+std::string beacon_to_hex_string_range(const uint8_t* frame, int offset_bytes, int count_bytes) {
+    static const char hex[] = "0123456789ABCDEF";
+    std::string out;
+    out.resize(count_bytes * 2);
+    for (int i = 0; i < count_bytes; i++) {
+        uint8_t b = frame[offset_bytes + i];
+        out[i * 2] = hex[b >> 4];
+        out[i * 2 + 1] = hex[b & 0x0F];
+    }
+    return out;
+}
+
+// ---------------------------------------------------------------------------
+// SGB (Second Generation Beacon) — T.018 Rev 7, March 2021
+// ---------------------------------------------------------------------------
+
+// Reference values from T.018 canonical test vector (Appendix B.1)
+#define SGB_TAC_NUMBER 230     // TAC number (16 bits, 0–65535)
+#define SGB_SERIAL_NUMBER 573  // Serial number within TAC (14 bits, 0–16383)
+#define SGB_HOMING_DEVICE 1    // 1 = beacon has 121.5 / 243 MHz homing device
+#define SGB_RLS_FUNCTION 0     // 0 = no Return Link Service function
+
+// BCH(250,202) generator polynomial — lower 48 bits (without leading X^48 term)
+// Full g(x): X^48+X^47+X^46+X^42+X^41+X^40+X^39+X^38+X^37+X^35+X^33+X^32+X^31
+//            +X^26+X^24+X^23+X^22+X^20+X^19+X^18+X^17+X^16+X^13+X^12+X^11+X^10
+//            +X^7+X^4+X^2+X+1
+// Binary MSB-first: 1110001111110101110000101110111110011110010010111 (T.018 App. B.1)
+#define SGB_BCH_G_LOWER UINT64_C(0xC7EB85DF3C97)
+
+/**
+ * Encode latitude for SGB GNSS location protocol (T.018 Appendix C)
+ * Pushes 23 bits: 1-bit N/S flag + 7-bit degrees + 15-bit decimal fraction
+ * @param frame the frame buffer
+ * @param pos current bit position (modified in-place)
+ * @param south true if southern hemisphere
+ * @param lat_mag absolute latitude in decimal degrees (0..90)
+ */
+static void push_sgb_latitude(uint8_t* frame, int& pos, bool south, float lat_mag) {
+    push_bits(frame, pos, south ? 1 : 0, 1);
+    uint32_t deg = (uint32_t)lat_mag;
+    if (deg > 90) deg = 90;
+    float frac = lat_mag - (float)deg;
+    uint32_t frac_n = (uint32_t)(frac * 32768.0f + 0.5f);
+    if (frac_n >= 32768) {
+        frac_n = 0;
+        if (deg < 90) deg++;
+    }
+    push_bits(frame, pos, deg, 7);
+    push_bits(frame, pos, frac_n, 15);
+}
+
+/**
+ * Encode longitude for SGB GNSS location protocol (T.018 Appendix C)
+ * Pushes 24 bits: 1-bit E/W flag + 8-bit degrees + 15-bit decimal fraction
+ * @param frame the frame buffer
+ * @param pos current bit position (modified in-place)
+ * @param west true if western hemisphere
+ * @param lon_mag absolute longitude in decimal degrees (0..180)
+ */
+static void push_sgb_longitude(uint8_t* frame, int& pos, bool west, float lon_mag) {
+    push_bits(frame, pos, west ? 1 : 0, 1);
+    uint32_t deg = (uint32_t)lon_mag;
+    if (deg > 180) deg = 180;
+    float frac = lon_mag - (float)deg;
+    uint32_t frac_n = (uint32_t)(frac * 32768.0f + 0.5f);
+    if (frac_n >= 32768) {
+        frac_n = 0;
+        if (deg < 180) deg++;
+    }
+    push_bits(frame, pos, deg, 8);
+    push_bits(frame, pos, frac_n, 15);
+}
+
+/**
+ * Compute BCH(250,202) parity using LFSR method (T.018 Appendix B.1)
+ * Reads 202 message bits from buffer positions 6..207 and writes
+ * 48 BCH parity bits to buffer positions 208..255.
+ * @param frame the 32-byte SGB buffer (message already written at bits 6..207)
+ */
+static void compute_sgb_bch(uint8_t* frame) {
+    uint64_t reg = 0;
+    for (int i = 0; i < 202; i++) {
+        int bp = i + 6;  // buffer bit position (6 = start of message after padding)
+        bool msg_bit = (frame[bp >> 3] >> (7 - (bp & 7))) & 1;
+        bool feedback = ((reg >> 47) & 1) ^ (msg_bit ? 1u : 0u);
+        reg = (reg << 1) & UINT64_C(0xFFFFFFFFFFFF);
+        if (feedback) reg ^= SGB_BCH_G_LOWER;
+    }
+    // Append 48-bit remainder at buffer positions 208..255
+    int pos = 208;
+    push_bits(frame, pos, reg, 48);
+}
+
+/**
+ * Map BeaconType to SGB 3-bit beacon type code (T.018 Table 3.1, bits 138-140)
+ * 000=ELT, 001=EPIRB, 010=PLB
+ */
+static uint8_t sgb_beacon_type_code(BeaconType t) {
+    switch (t) {
+        case BeaconType::EPIRB:
+            return 0b001;
+        case BeaconType::PLB:
+            return 0b010;
+        default:
+        case BeaconType::ELT:
+            return 0b000;
+    }
+}
+
+/**
+ * Generate a Second Generation Beacon (SGB / T.018) frame.
+ * The 250-bit frame is stored in 32 bytes with 6 leading padding bits
+ * (bits 0..4 = 0, bit 5 = 1).
+ * The rotating field is Type 0 — G.008 Objective Requirements (Table 3.3),
+ * with elapsed_hours and time_last_loc_min updated from elapsed_s.
+ * @param frame     32-byte output buffer
+ * @param params    beacon parameters
+ * @param elapsed_s seconds elapsed since beacon activation (drives rotating field)
+ * @return 32 (size of the generated frame in bytes)
+ */
+size_t generate_sgb_beacon(uint8_t* frame, const BeaconParams& params, uint32_t elapsed_s) {
+    memset(frame, 0, 32);
+
+    // 6 padding bits at start of 32-byte buffer: [0,0,0,0,1,0]  (5th bit (1 based index as per specification) = 1 to indicate self-test mode)
+    set_bit(frame, 4, 1);
+
+    // Message bits start at buffer bit position 6 (= SGB message bit 1)
+    int pos = 6;
+
+    // Bits  1-16:  TAC number (16 bits) — T.018 Table 3.1
+    push_bits(frame, pos, SGB_TAC_NUMBER, 16);
+    // Bits 17-30:  Serial number within TAC (14 bits)
+    push_bits(frame, pos, SGB_SERIAL_NUMBER, 14);
+    // Bits 31-40:  Country code (10 bits, ITU MID)
+    push_bits(frame, pos, params.country & 0x3FFU, 10);
+    // Bit  41:     Status of homing device (1 = has 121.5/243 MHz homing device)
+    push_bits(frame, pos, params.has_121_5 ? 1 : 0, 1);
+    // Bit  42:     RLS function flag (0 = no RLS)
+    push_bits(frame, pos, SGB_RLS_FUNCTION, 1);
+    // Bit  43:     Test protocol flag
+    push_bits(frame, pos, params.is_test ? 1 : 0, 1);
+
+    // Bits 44-66:  Encoded GNSS latitude (23 bits) — T.018 Appendix C
+    float lat_mag = params.location.latitude < 0.0f ? -params.location.latitude : params.location.latitude;
+    push_sgb_latitude(frame, pos, params.location.south, lat_mag);
+    // Bits 67-90:  Encoded GNSS longitude (24 bits)
+    float lon_mag = params.location.longitude < 0.0f ? -params.location.longitude : params.location.longitude;
+    push_sgb_longitude(frame, pos, params.location.west, lon_mag);
+
+    // Bits 91-137: Vessel ID (47 bits = 3-bit type selector + 44-bit body)
+    // Type 000 = No aircraft/maritime identity; body all zeros
+    push_bits(frame, pos, 0, 47);
+
+    // Bits 138-140: Beacon type (3 bits)
+    push_bits(frame, pos, sgb_beacon_type_code(params.type), 3);
+
+    // Bits 141-154: Spare (14 bits, all 1s in normal operation)
+    push_bits(frame, pos, 0x3FFFU, 14);
+
+    // Bits 155-202: Rotating Field Type 0 — G.008 Objective Requirements (Table 3.3)
+    // Bits 155-158: Identifier (4 bits = 0000)
+    push_bits(frame, pos, 0b0000U, 4);
+    // Bits 159-164: Elapsed time since activation (6 bits, 0-63 h, truncated at 63)
+    uint32_t elapsed_h = elapsed_s / 3600;
+    if (elapsed_h > 63) elapsed_h = 63;
+    push_bits(frame, pos, elapsed_h, 6);
+    // Bits 165-175: Time from last encoded location (11 bits, 0-2046 min; 2047 = no fix)
+    uint32_t loc_age_min = elapsed_s / 60;
+    if (loc_age_min > 2046) loc_age_min = 2046;
+    push_bits(frame, pos, loc_age_min, 11);
+    // Bits 176-185: Altitude of encoded location (10 bits; 0x3FF = no altitude)
+    push_bits(frame, pos, 0x3FFU, 10);
+    // Bits 186-193: Dilution of Precision (4-bit HDOP + 4-bit VDOP; 0 = best HDOP, 0 = best VDOP)
+    push_bits(frame, pos, 0b00000000U, 8);
+    // Bits 194-195: Activation notification (00 = manual by user)
+    push_bits(frame, pos, 0b00U, 2);
+    // Bits 196-198: Remaining battery capacity (101 = >75%)
+    push_bits(frame, pos, 0b101U, 3);
+    // Bits 199-200: GNSS status (10 = 3D fix)
+    push_bits(frame, pos, 0b10U, 2);
+    // Bits 201-202: Spare (00)
+    push_bits(frame, pos, 0b00U, 2);
+
+    // pos == 208: 6 padding + 202 message bits consumed
+
+    // Bits 203-250: BCH(250,202) parity (48 bits) computed and written at positions 208-255
+    compute_sgb_bch(frame);
+
+    return 32;
+}
+
 }  // namespace ui::external_app::epirb_tx
 
 #endif /*__BEACON_H__*/

firmware/application/external/epirb_tx/ui_epirb_tx.cpp

@@ -67,12 +67,17 @@ static uint8_t hexToByte(char high, char low) {
     return (hexval(high) << 4) | hexval(low);
 }
 
-std::string EPIRBTXAppView::frame_to_hex_string(bool start) {
-    return beacon_to_hex_string(epirb_tx_message.data, start);
+std::string EPIRBTXAppView::frame_to_hex_string_range(int offset_bytes, int count_bytes) {
+    return beacon_to_hex_string_range(epirb_tx_message.data, offset_bytes, count_bytes);
 }
 
 void EPIRBTXAppView::generate_frame(BeaconParams params) {
-    epirb_tx_message.data_len = generate_beacon(epirb_tx_message.data, params);
+    if (format_sgb) {
+        uint32_t elapsed_s = sgb_start_time > 0 ? (chTimeNow() - sgb_start_time) / 1000 : 0;
+        epirb_tx_message.data_len = generate_sgb_beacon(epirb_tx_message.data, params, elapsed_s);
+    } else {
+        epirb_tx_message.data_len = generate_beacon(epirb_tx_message.data, params);
+    }
 }
 
 void EPIRBTXAppView::on_timer() {
@@ -125,7 +130,7 @@ void EPIRBTXAppView::update_am_transmission() {
     if (am_enabled && transmitting && !transmitting_bpsk) {
         // Start am transmission
         // Restore am frequency
-        epirb_tx_message.mode_bpsk = false;
+        epirb_tx_message.mode_406 = false;
         transmitter_model.set_target_frequency(am_frequency);
         // Send config to baseband
         baseband::set_epirb_tx_config(epirb_tx_message);
@@ -146,10 +151,18 @@ void EPIRBTXAppView::update_frame(bool updateConfig) {
         file_mode_ui->text_description.set(beacon.description.substr(0, max_text_width_ext));
         file_mode_ui->text_description_end.set(beacon.description.size() > max_text_width_ext ? "-" + beacon.description.substr(max_text_width_ext, max_text_width_ext + max_text_width_ext - 1) : "");
         // Udapte frame content on display
-        text_frame.set(beacon.frame.substr(0, 18));
-        text_frame_end.set(beacon.frame.size() > 18 ? beacon.frame.substr(18, 36) : "");
+        bool is_fgb = beacon.frame.size() <= BEACON_HEXA_SIZE_FGB;
+        if (is_fgb) {
+            text_frame.set(beacon.frame.substr(0, BEACON_HEXA_SPLIT_FGB));
+            text_frame_end.set(beacon.frame.size() > BEACON_HEXA_SPLIT_FGB ? beacon.frame.substr(BEACON_HEXA_SPLIT_FGB, BEACON_HEXA_SPLIT_FGB) : "");
+            text_frame_sgb_end.set("");
+        } else {
+            text_frame.set(" " + beacon.frame.substr(1, BEACON_HEXA_SPLIT_SGB - 1));
+            text_frame_end.set(beacon.frame.size() > BEACON_HEXA_SPLIT_SGB ? beacon.frame.substr(BEACON_HEXA_SPLIT_SGB, BEACON_HEXA_SPLIT_SGB) : "");
+            text_frame_sgb_end.set(beacon.frame.size() > 2 * BEACON_HEXA_SPLIT_SGB ? beacon.frame.substr(2 * BEACON_HEXA_SPLIT_SGB, BEACON_HEXA_SPLIT_SGB) : "");
+        }
         // Prepare tx configuration
-        epirb_tx_message.data_len = std::min<size_t>((beacon.frame.size() / 2), 18);
+        epirb_tx_message.data_len = std::min<size_t>((beacon.frame.size() / 2), BEACON_SIZE_SGB);
         for (uint8_t i = 0; i < epirb_tx_message.data_len; i++) {
             epirb_tx_message.data[i] = hexToByte(
                 beacon.frame[2 * i],
@@ -159,8 +172,17 @@ void EPIRBTXAppView::update_frame(bool updateConfig) {
         // In manual mode, generate frame content for current beacon params
         generate_frame(beacon_params);
         // Update frame content on display
-        text_frame.set(frame_to_hex_string(true));
-        text_frame_end.set(frame_to_hex_string(false));
+        if (format_sgb) {
+            // SGB: 32 bytes across 3 lines (BEACON_HEXA_SPLIT_SGB = 22 hex chars = 11 bytes)
+            // Remove first nibble and replace it with a space to match COSPAS hexadecimal representation specification
+            text_frame.set(" " + frame_to_hex_string_range(0, BEACON_HEXA_SPLIT_SGB / 2).substr(1));
+            text_frame_end.set(frame_to_hex_string_range(BEACON_HEXA_SPLIT_SGB / 2, BEACON_HEXA_SPLIT_SGB / 2));
+            text_frame_sgb_end.set(frame_to_hex_string_range(BEACON_HEXA_SPLIT_SGB, (BEACON_HEXA_SPLIT_SGB / 2) - 1));
+        } else {
+            text_frame.set(frame_to_hex_string_range(0, BEACON_HEXA_SPLIT_FGB / 2));
+            text_frame_end.set(frame_to_hex_string_range(BEACON_HEXA_SPLIT_FGB / 2, BEACON_HEXA_SPLIT_FGB / 2));
+            text_frame_sgb_end.set("");
+        }
     }
     if (updateConfig && send_on_change && loop) {
         // Need to update config / send new beacon
@@ -176,14 +198,14 @@ void EPIRBTXAppView::update_frame(bool updateConfig) {
 }
 
 void EPIRBTXAppView::update_config() {
-    if (!epirb_tx_message.mode_bpsk) {
+    if (!epirb_tx_message.mode_406) {
         // Previously in AM mode => restore bpsk frequency
         transmitter_model.set_target_frequency(bpsk_frequency);
         // Update displayed frequency
         tx_view.on_show();
     }
     // Set mode to bpsk
-    epirb_tx_message.mode_bpsk = true;
+    epirb_tx_message.mode_406 = true;
     transmitting_bpsk = true;
     // Set pre/post count
     epirb_tx_message.pre_count = (160 * TONES_SAMPLERATE) / 1000;   // 160 ms carrier (COSPAS spec.)
@@ -198,6 +220,13 @@ void EPIRBTXAppView::set_tx_button_state(bool active) {
 }
 
 void EPIRBTXAppView::start_tx() {
+    if (format_sgb && !mode_file) {
+        // Track start time for the SGB rotating field elapsed-time counter
+        if (!transmitting) sgb_start_time = chTimeNow();
+        // update_frame regenerates the SGB frame with current elapsed time and refreshes display
+        update_frame(false);
+        set_dirty();
+    }
     last_frame_time = chTimeNow();
     update_config();
     loop = loop_enabled;
@@ -221,7 +250,7 @@ void EPIRBTXAppView::on_tx_progress(const uint32_t progress, const bool done) {
         transmitting_bpsk = false;
         if (am_enabled) {
             // BPSK frame sent, switch back to 121.5 AM signal
-            epirb_tx_message.mode_bpsk = false;
+            epirb_tx_message.mode_406 = false;
             // Start am transmission
             update_am_transmission();
         } else {
@@ -310,6 +339,7 @@ void EPIRBTXAppView::update_mode() {
     options_beacon_type.hidden(mode_file);
     options_beacon_protocol.hidden(mode_file);
     options_beacon_country.hidden(mode_file);
+    options_format.hidden(mode_file);
     text_field_beacon_locator.hidden(mode_file);
 }
 
@@ -323,6 +353,7 @@ EPIRBTXAppView::EPIRBTXAppView(
                   &text_beacon_type,
                   &options_beacon_type,
                   &options_beacon_protocol,
+                  &options_format,
                   &text_beacon_country,
                   &options_beacon_country,
                   &checkbox_beacon_internal,
@@ -335,6 +366,7 @@ EPIRBTXAppView::EPIRBTXAppView(
                   &text_field_beacon_locator,
                   &text_frame,
                   &text_frame_end,
+                  &text_frame_sgb_end,
                   &text_timeout,
                   &checkbox_loop,
                   &field_delay,
@@ -376,6 +408,7 @@ EPIRBTXAppView::EPIRBTXAppView(
     init_from_locator(beacon_params.location);
     update_mode();
     update_location();
+    options_format.set_by_value(format_sgb ? 1 : 0);
 
     options_mode.on_change = [this](size_t, OptionsField::value_t value) {
         mode_file = (((BeaconMode)value) == BeaconMode::FILE);
@@ -405,6 +438,13 @@ EPIRBTXAppView::EPIRBTXAppView(
         set_dirty();
     };
 
+    options_format.on_change = [this](size_t, OptionsField::value_t v) {
+        format_sgb = (v == 1);
+        sgb_start_time = 0;  // reset elapsed counter when format changes
+        update_frame();
+        set_dirty();
+    };
+
     options_am_channel.on_change = [this](size_t, OptionsField::value_t v) {
         bool is_real = false;
         switch ((AmChannel)v) {
@@ -458,6 +498,9 @@ EPIRBTXAppView::EPIRBTXAppView(
             case BpskChannel::O:
                 bpsk_frequency = BPSK_FREQUENCY_O;
                 break;
+            case BpskChannel::SGB:
+                bpsk_frequency = BPSK_FREQUENCY_SGB;
+                break;
             default:
                 v = (uint8_t)BpskChannel::HAM;
                 // fallthrough
@@ -590,6 +633,9 @@ EPIRBTXAppView::EPIRBTXAppView(
                 case BPSK_FREQUENCY_O:
                     bpsk_channel = (uint8_t)BpskChannel::O;
                     break;
+                case BPSK_FREQUENCY_SGB:
+                    bpsk_channel = (uint8_t)BpskChannel::SGB;
+                    break;
                 default:
                     bpsk_channel = (uint8_t)BpskChannel::MANUAL;
                     manual_bpsk_frequency = bpsk_frequency;
@@ -642,11 +688,14 @@ void EPIRBTXAppView::load_beacons() {
             Beacon beacon{};
             beacon.title = trim(cols[0]);
             beacon.description = trim(cols[1]);
-            // Make sure frame is not longer tha 18 bytes / 36 hex character
-            beacon.frame = trim(cols[2]).substr(0, 36);
+            // 1G uses up to 36 hex chars, 2G uses 64 hex chars (250 bits rounded to 32 bytes).
+            beacon.frame = trim(cols[2]).substr(0, BEACON_HEXA_SIZE_SGB);
             size_t size = beacon.frame.size();
             if (size <= 0)
                 continue;  // Invalid line.
+            if ((size % 2) != 0) {
+                beacon.frame = "0" + beacon.frame;  // Pad with leading 0 to make it even length
+            }
             // Beacon is valid, add it to the list
             beacons.emplace_back(std::move(beacon));
         }

firmware/application/external/epirb_tx/ui_epirb_tx.hpp

@@ -33,9 +33,12 @@
 #include "message.hpp"
 #include "tonesets.hpp"
 
-#define BEACON_HEXA_SIZE 36
-#define BEACON_HEXA_HALF_SIZE 18
-#define BEACON_SIZE 18
+#define BEACON_SIZE_FGB 18
+#define BEACON_SIZE_SGB 32
+#define BEACON_HEXA_SIZE_FGB BEACON_SIZE_FGB * 2
+#define BEACON_HEXA_SIZE_SGB BEACON_SIZE_SGB * 2
+#define BEACON_HEXA_SPLIT_FGB 18
+#define BEACON_HEXA_SPLIT_SGB 22
 
 #define AM_TEST_FREQUENCY 121375000
 #define AM_REAL_FREQUENCY 121500000
@@ -49,6 +52,7 @@
 #define BPSK_FREQUENCY_K 406052000
 #define BPSK_FREQUENCY_N 406061000
 #define BPSK_FREQUENCY_O 406064000
+#define BPSK_FREQUENCY_SGB 406050000
 
 namespace ui::external_app::epirb_tx {
 
@@ -85,7 +89,8 @@ enum class BpskChannel {
     K = 6,
     N = 7,
     O = 8,
-    MANUAL = 10
+    MANUAL = 10,
+    SGB = 100
 };
 
 struct Location {
@@ -129,7 +134,7 @@ class EPIRBTXAppView : public View {
     void on_timer();
     void load_beacons();
     void set_tx_button_state(bool active);
-    std::string frame_to_hex_string(bool start);
+    std::string frame_to_hex_string_range(int offset_bytes, int count_bytes);
     void generate_frame(BeaconParams params);
     void update_frame(bool updateConfig = true);
     void update_bpsk_frequency();
@@ -214,6 +219,7 @@ class EPIRBTXAppView : public View {
             {"country"sv, &beacon_country},
             {"internal"sv, &beacon_internal},
             {"locator"sv, &locator},
+            {"sgb"sv, &format_sgb},
         }};
 
     // Time of the last sent frame
@@ -224,6 +230,10 @@ class EPIRBTXAppView : public View {
     bool transmitting_bpsk{false};
     // True when currently looping on sending beacons
     bool loop{false};
+    // True when SGB (Second Generation Beacon) format is selected
+    bool format_sgb{false};
+    // System time (ms) when the current SGB transmission session started
+    uint32_t sgb_start_time{0};
 
     // Current EPIRBTXDataMessage for baseband
     EPIRBTXDataMessage epirb_tx_message{};
@@ -302,10 +312,17 @@ class EPIRBTXAppView : public View {
          {"PLB", (uint8_t)BeaconType::PLB}}};
     OptionsField options_beacon_protocol{
         {UI_POS_X(9 + 7), UI_POS_Y(1)},
-        30,
+        8,
         {{"User", (uint8_t)BeaconProtocol::USER},
          {"Standard", (uint8_t)BeaconProtocol::STANDARD},
          {"National", (uint8_t)BeaconProtocol::NATIONAL}}};
+    // Format selector (FGB / SGB) — manual mode only, same row as type/protocol
+    OptionsField options_format{
+        {UI_POS_X_RIGHT(4), UI_POS_Y(1)},
+        4,
+        {{"FGB", 0},
+         {"SGB", 1}}};
+
     OptionsField options_beacon_country{
         {UI_POS_X(9), UI_POS_Y(2)},
         7,
@@ -337,6 +354,9 @@ class EPIRBTXAppView : public View {
     Text text_frame_end{
         {UI_POS_X(6), UI_POS_Y(7), UI_POS_WIDTH_REMAINING(6), UI_POS_DEFAULT_HEIGHT},
         ""};
+    Text text_frame_sgb_end{
+        {UI_POS_X(6), UI_POS_Y(8), UI_POS_WIDTH_REMAINING(6), UI_POS_DEFAULT_HEIGHT},
+        ""};
 
     Text text_timeout{
         {UI_POS_X(14), UI_POS_Y(10), UI_POS_WIDTH(2), UI_POS_DEFAULT_HEIGHT},
@@ -389,6 +409,7 @@ class EPIRBTXAppView : public View {
          {"406.052 MHz (K)", (uint8_t)BpskChannel::K},
          {"406.061 MHz (N)", (uint8_t)BpskChannel::N},
          {"406.064 MHz (O)", (uint8_t)BpskChannel::O},
+         {"406.050 MHz (SGB)", (uint8_t)BpskChannel::SGB},
          {"Manual", (uint8_t)BpskChannel::MANUAL}}};
 
     // Transmitter view

firmware/application/external/external.cmake

@@ -169,6 +169,7 @@ set(EXTCPPSRC
 	#mcu_temperature    112
 	external/mcu_temperature/main.cpp
 	external/mcu_temperature/mcu_temperature.cpp
+	external/mcu_temperature/temperature_logger.cpp
 
 	#fmradio  640
 	external/fmradio/main.cpp
@@ -379,6 +380,17 @@ set(EXTCPPSRC
   #signal_hunter
   external/signal_hunter/main.cpp
   external/signal_hunter/ui_signal_hunter.cpp
+
+
+	#tetra rx
+	external/tetra_rx/main.cpp
+	external/tetra_rx/ui_tetra_rx.cpp
+	external/tetra_rx/tetra_crc.cpp
+	external/tetra_rx/tetra_descrambler.cpp
+	external/tetra_rx/tetra_interleave.cpp
+	external/tetra_rx/tetra_rcpc.cpp
+	external/tetra_rx/tetra_viterbi.cpp
+
 )
 
 set(EXTAPPLIST
@@ -472,6 +484,7 @@ set(EXTAPPLIST
 	hard_reset
 	secplustx
   signal_hunter
+	tetra_rx
 )
 
 # sdusb has type conflicts with PRALINE (HackRF Pro) - add only for non-PRALINE builds

firmware/application/external/external.ld

@@ -114,6 +114,7 @@ MEMORY
     ram_external_app_vor_rx                (rwx) : org = 0xAE090000, len = 32k
     ram_external_app_vor_tx                (rwx) : org = 0xAE0A0000, len = 32k
     ram_external_app_signal_hunter         (rwx) : org = 0xAE0B0000, len = 32k
+    ram_external_app_tetra_rx              (rwx) : org = 0xAE0C0000, len = 32k
 }
 
 SECTIONS
@@ -663,4 +664,13 @@ SECTIONS
       KEEP(*(.external_app.app_signal_hunter.application_information));
       *(*ui*external_app*signal_hunter*);
     } > ram_external_app_signal_hunter
+
+    .external_app_tetra_rx : ALIGN(4) SUBALIGN(4)
+    {
+        KEEP(*(.external_app.app_tetra_rx.application_information));
+        *(*ui*external_app*tetra_rx*);
+    } > ram_external_app_tetra_rx
+
+
+
 }

firmware/application/external/font_viewer/ui_font_viewer.cpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2023 Mark Thompson
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/font_viewer/ui_font_viewer.hpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2023 Mark Thompson
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/game2048/ui_game2048.cpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2025 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/game2048/ui_game2048.hpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2025 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/hopper/ui_hopper.cpp

@@ -2,7 +2,7 @@
  * Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
  * Copyright (C) 2016 Furrtek
  * Copyright (C) 2020 euquiq
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/hopper/ui_hopper.hpp

@@ -2,7 +2,7 @@
  * Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
  * Copyright (C) 2016 Furrtek
  * Copyright (C) 2020 euquiq
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/mcu_temperature/mcu_temperature.cpp

@@ -8,14 +8,12 @@ using namespace portapack;
 namespace ui::external_app::mcu_temperature {
 
 void McuTemperatureWidget::paint(Painter& painter) {
-    const auto logger = portapack::temperature_logger;
-
     const auto rect = screen_rect();
     const Color color_background{0, 0, 64};
     const Color color_foreground = Theme::getInstance()->fg_green->foreground;
     const Color color_reticle{128, 128, 128};
 
-    const auto graph_width = static_cast<int>(logger.capacity()) * bar_width;
+    const auto graph_width = static_cast<int>(temperature_logger.capacity()) * bar_width;
     const Rect graph_rect{
         rect.left() + (rect.width() - graph_width) / 2, rect.top() + 8,
         graph_width, rect.height()};
@@ -25,7 +23,7 @@ void McuTemperatureWidget::paint(Painter& painter) {
     painter.draw_rectangle(frame_rect, color_reticle);
     painter.fill_rectangle(graph_rect, color_background);
 
-    const auto history = logger.history();
+    const auto history = temperature_logger.history();
     for (size_t i = 0; i < history.size(); i++) {
         const Coord x = graph_rect.right() - (history.size() - i) * bar_width;
         const auto sample = history[i];

firmware/application/external/mcu_temperature/mcu_temperature.hpp

@@ -32,7 +32,7 @@
 #include "portapack.hpp"
 #include "memory_map.hpp"
 #include "irq_controls.hpp"
-
+#include "temperature_logger.hpp"
 #include <functional>
 #include <utility>
 
@@ -43,14 +43,25 @@ class McuTemperatureWidget : public Widget {
     explicit McuTemperatureWidget(
         Rect parent_rect)
         : Widget{parent_rect} {
+        signal_token_tick_second = rtc_time::signal_tick_second += [this]() {
+            this->on_tick_second();
+        };
+    }
+    ~McuTemperatureWidget() {
+        rtc_time::signal_tick_second -= signal_token_tick_second;
+    }
+    void on_tick_second() {
+        temperature_logger.second_tick();
+        set_dirty();
     }
-
     void paint(Painter& painter) override;
 
    private:
+    TemperatureLogger temperature_logger{};
+
     using sample_t = uint32_t;
     using temperature_t = int32_t;
-
+    SignalToken signal_token_tick_second{};
     temperature_t temperature(const sample_t sensor_value) const;
     Coord screen_y(const temperature_t temperature, const Rect& screen_rect) const;
 

firmware/application/external/mcu_temperature/temperature_logger.cpp

@@ -25,6 +25,8 @@
 
 #include <algorithm>
 
+namespace ui::external_app::mcu_temperature {
+
 void TemperatureLogger::second_tick() {
     sample_phase++;
     if (sample_phase >= sample_interval) {
@@ -67,3 +69,5 @@ void TemperatureLogger::push_sample(const TemperatureLogger::sample_t sample) {
     samples_count++;
     sample_phase = 0;
 }
+
+}  // namespace ui::external_app::mcu_temperature

firmware/application/external/mcu_temperature/temperature_logger.hpp

@@ -27,6 +27,8 @@
 #include <array>
 #include <vector>
 
+namespace ui::external_app::mcu_temperature {
+
 class TemperatureLogger {
    public:
     using sample_t = int8_t;
@@ -49,4 +51,6 @@ class TemperatureLogger {
     void push_sample(const sample_t sample);
 };
 
+}  // namespace ui::external_app::mcu_temperature
+
 #endif /*__TEMPERATURE_LOGGER_H__*/

firmware/application/external/metronome/ui_metronome.cpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/metronome/ui_metronome.hpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/ook_editor/ui_ook_editor.cpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2024 Samir Sánchez Garnica @sasaga92
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
 
  *
  * This file is part of PortaPack.

firmware/application/external/ook_editor/ui_ook_editor.hpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2024 Samir Sánchez Garnica @sasaga92
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/ookbrute/ui_ookbrute.cpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2024 HTotoo
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/ookbrute/ui_ookbrute.hpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2024 HTotoo
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/playlist_editor/ui_playlist_editor.cpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2025 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/playlist_editor/ui_playlist_editor.hpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2025 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/stopwatch/ui_stopwatch.cpp

@@ -1,6 +1,6 @@
 /*
  * Copyright 2025 Mark Thompson
- * copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2025 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/stopwatch/ui_stopwatch.hpp

@@ -1,6 +1,6 @@
 /*
  * Copyright 2025 Mark Thompson
- * copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2025 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/tetra_rx/main.cpp

@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2026 HTotoo
+ *
+ * This file is part of PortaPack.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "ui_tetra_rx.hpp"
+#include "ui_navigation.hpp"
+#include "external_app.hpp"
+
+namespace ui::external_app::tetra_rx {
+void initialize_app(ui::NavigationView& nav) {
+    nav.push<TetraRxView>();
+}
+}  // namespace ui::external_app::tetra_rx
+extern "C" {
+
+__attribute__((section(".external_app.app_tetra_rx.application_information"), used)) application_information_t _application_information_tetra_rx = {
+    /*.memory_location = */ (uint8_t*)0x00000000,
+    /*.externalAppEntry = */ ui::external_app::tetra_rx::initialize_app,
+    /*.header_version = */ CURRENT_HEADER_VERSION,
+    /*.app_version = */ VERSION_MD5,
+
+    /*.app_name = */ "Tetra",
+    /*.bitmap_data = */ {
+        0xE0,
+        0x0F,
+        0x18,
+        0x38,
+        0xE4,
+        0x67,
+        0x7E,
+        0xCE,
+        0xC7,
+        0xCC,
+        0x00,
+        0x00,
+        0xFF,
+        0x4F,
+        0xBA,
+        0xB2,
+        0x9A,
+        0xEE,
+        0xBA,
+        0xB2,
+        0x00,
+        0x00,
+        0x3B,
+        0xE3,
+        0x73,
+        0x7E,
+        0xC6,
+        0x27,
+        0x1C,
+        0x18,
+        0xF0,
+        0x07,
+    },
+    /*.icon_color = */ ui::Color::orange().v,
+    /*.menu_location = */ app_location_t::RX,
+    /*.desired_menu_position = */ -1,
+
+    /*.m4_app_tag = portapack::spi_flash::image_tag_tetrarx*/ {'P', 'T', 'E', 'T'},
+    /*.m4_app_offset = */ 0x00000000,  // will be filled at compile time
+};
+}

firmware/application/external/tetra_rx/tetra_bits.hpp

@@ -0,0 +1,45 @@
+#pragma once
+
+#include <stdint.h>
+#include <stddef.h>
+
+namespace ui::external_app::tetra_rx {
+
+class BitVector {
+   public:
+    BitVector(uint8_t* p, size_t bits)
+        : data_(p),
+          bits_(bits) {
+    }
+
+    inline bool get(size_t bit) const {
+        return (data_[bit >> 3] >>
+                (7 - (bit & 7))) &
+               1;
+    }
+
+    inline void set(size_t bit, bool value) {
+        if (value)
+            data_[bit >> 3] |=
+                1 << (7 - (bit & 7));
+        else
+            data_[bit >> 3] &=
+                ~(1 << (7 - (bit & 7)));
+    }
+
+    inline void xor_bit(size_t bit, bool value) {
+        if (value)
+            data_[bit >> 3] ^=
+                1 << (7 - (bit & 7));
+    }
+
+    inline size_t size() const {
+        return bits_;
+    }
+
+   private:
+    uint8_t* data_;
+    size_t bits_;
+};
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_crc.cpp

@@ -0,0 +1,33 @@
+#include "tetra_crc.hpp"
+
+namespace ui::external_app::tetra_rx {
+
+uint16_t CRC::crc16_itut_bits(
+    const uint8_t* bits,
+    uint32_t n_bits,
+    uint16_t init) {
+    uint16_t crc = init;
+
+    for (uint32_t i = 0; i < n_bits; i++) {
+        uint8_t bit =
+            (bits[i >> 3] >>
+             (7 - (i & 7))) &
+            1;
+
+        crc ^= uint16_t(bit) << 15;
+
+        if (crc & 0x8000) {
+            crc =
+                (crc << 1) ^
+                0x1021;
+        } else {
+            crc <<= 1;
+        }
+
+        crc &= 0xffff;
+    }
+
+    return crc;
+}
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_crc.hpp

@@ -0,0 +1,17 @@
+#pragma once
+
+#include <stdint.h>
+
+namespace ui::external_app::tetra_rx {
+
+class CRC {
+   public:
+    static constexpr uint16_t CRC_OK = 0x1d0f;
+
+    static uint16_t crc16_itut_bits(
+        const uint8_t* bits,
+        uint32_t n_bits,
+        uint16_t init = 0xffff);
+};
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_descrambler.cpp

@@ -0,0 +1,60 @@
+#include "tetra_descrambler.hpp"
+
+namespace ui::external_app::tetra_rx {
+
+static inline uint8_t lfsr_step(uint32_t& s) {
+    uint8_t b = 0;
+
+    b ^= (s >> (32 - 32)) & 1;
+    b ^= (s >> (32 - 26)) & 1;
+    b ^= (s >> (32 - 23)) & 1;
+    b ^= (s >> (32 - 22)) & 1;
+    b ^= (s >> (32 - 16)) & 1;
+    b ^= (s >> (32 - 12)) & 1;
+    b ^= (s >> (32 - 11)) & 1;
+    b ^= (s >> (32 - 10)) & 1;
+    b ^= (s >> (32 - 8)) & 1;
+    b ^= (s >> (32 - 7)) & 1;
+    b ^= (s >> (32 - 5)) & 1;
+    b ^= (s >> (32 - 4)) & 1;
+    b ^= (s >> (32 - 2)) & 1;
+    b ^= (s >> (32 - 1)) & 1;
+
+    s = (s >> 1) | (uint32_t(b) << 31);
+
+    return b;
+}
+
+void Descrambler::generate(
+    uint32_t init,
+    uint8_t* seq,
+    size_t bits) {
+    uint32_t s = init;
+
+    for (size_t i = 0; i < bits; i++)
+        seq[i] = lfsr_step(s);
+}
+
+void Descrambler::descramble(
+    BitVector& bits,
+    uint32_t init) {
+    uint32_t s = init;
+
+    for (size_t i = 0; i < bits.size(); i++)
+        bits.xor_bit(i, lfsr_step(s));
+}
+
+uint32_t Descrambler::dmo_scramb_init(
+    uint32_t mni,
+    uint32_t src) {
+    uint32_t init =
+        (src & 0xFFFFFF) |
+        ((mni & 0x3F) << 24);
+
+    init <<= 2;
+    init |= 3;
+
+    return init;
+}
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_descrambler.hpp

@@ -0,0 +1,26 @@
+#pragma once
+
+#include <stdint.h>
+#include "tetra_bits.hpp"
+
+namespace ui::external_app::tetra_rx {
+
+class Descrambler {
+   public:
+    static constexpr uint32_t SCRAMB_INIT_BSCH = 0x00000003;
+
+    static void descramble(
+        BitVector& bits,
+        uint32_t init = SCRAMB_INIT_BSCH);
+
+    static void generate(
+        uint32_t init,
+        uint8_t* sequence,
+        size_t bits);
+
+    static uint32_t dmo_scramb_init(
+        uint32_t mni,
+        uint32_t src);
+};
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_interleave.cpp

@@ -0,0 +1,21 @@
+#include "tetra_interleave.hpp"
+
+namespace ui::external_app::tetra_rx {
+
+void Interleave::block_deinterleave(
+    BitVector& in,
+    BitVector& out,
+    uint32_t K,
+    uint32_t a) {
+    for (uint32_t i = 1; i <= K; i++) {
+        uint32_t k =
+            1 +
+            ((a * i) % K);
+
+        out.set(
+            i - 1,
+            in.get(k - 1));
+    }
+}
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_interleave.hpp

@@ -0,0 +1,16 @@
+#pragma once
+
+#include "tetra_bits.hpp"
+
+namespace ui::external_app::tetra_rx {
+
+class Interleave {
+   public:
+    static void block_deinterleave(
+        BitVector& in,
+        BitVector& out,
+        uint32_t K,
+        uint32_t a);
+};
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_rcpc.cpp

@@ -0,0 +1,24 @@
+#include "tetra_rcpc.hpp"
+#include <string.h>
+
+namespace ui::external_app::tetra_rx {
+
+static constexpr uint8_t P_RATE_2_3[3] = {1, 2, 5};
+
+static constexpr uint32_t T_RATE_2_3 = 3;
+static constexpr uint32_t PERIOD = 8;
+
+void RCPC::depuncture_2_3(BitVector& in, uint8_t* out, uint32_t in_bits) {
+    const uint32_t mother_bits = ((in_bits + T_RATE_2_3 - 1) / T_RATE_2_3) * PERIOD + PERIOD;
+    memset(out, ERASED, mother_bits);
+    for (uint32_t j = 1; j <= in_bits; j++) {
+        uint32_t i = j;
+        uint32_t k = PERIOD * ((i - 1) / T_RATE_2_3);
+        k += P_RATE_2_3[(i - 1) % T_RATE_2_3];
+        if (k >= 1 && k <= mother_bits) {
+            out[k - 1] = in.get(j - 1);
+        }
+    }
+}
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_rcpc.hpp

@@ -0,0 +1,18 @@
+#pragma once
+
+#include <stdint.h>
+#include "tetra_bits.hpp"
+
+namespace ui::external_app::tetra_rx {
+
+class RCPC {
+   public:
+    static constexpr uint8_t ERASED = 0xff;
+
+    static void depuncture_2_3(
+        BitVector& in,
+        uint8_t* out,
+        uint32_t in_bits);
+};
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_viterbi.cpp

@@ -0,0 +1,73 @@
+#include "tetra_viterbi.hpp"
+#include <string.h>
+
+namespace ui::external_app::tetra_rx {
+
+int Viterbi::decode_cch(
+    const uint8_t* mother,
+    uint32_t n_info,
+    uint8_t* bits,
+    uint8_t* trace_buffer) {  // Puffer by caller
+
+    // Store these on stack, to avoid flash space usage
+    const uint8_t next_state[16][2] = {
+        {0, 1}, {2, 3}, {4, 5}, {6, 7}, {8, 9}, {10, 11}, {12, 13}, {14, 15}, {0, 1}, {2, 3}, {4, 5}, {6, 7}, {8, 9}, {10, 11}, {12, 13}, {14, 15}};
+    const uint8_t next_output[16][2] = {
+        {0, 15}, {11, 4}, {6, 9}, {13, 2}, {5, 10}, {14, 1}, {3, 12}, {8, 7}, {15, 0}, {4, 11}, {9, 6}, {2, 13}, {10, 5}, {1, 14}, {12, 3}, {7, 8}};
+
+    const uint16_t INF = 0x3fff;
+    uint16_t cost[16];
+    uint16_t new_cost[16];
+
+    // Initialization
+    for (int i = 0; i < 16; i++) cost[i] = INF;
+    cost[0] = 0;
+
+    for (uint32_t step = 0; step < n_info; step++) {
+        for (int i = 0; i < 16; i++) new_cost[i] = INF;
+        const uint8_t* rx = &mother[step * 4];
+
+        for (int prev = 0; prev < 16; prev++) {
+            if (cost[prev] >= INF) continue;
+
+            for (int bit = 0; bit < 2; bit++) {
+                const uint8_t pattern = next_output[prev][bit];
+                const uint8_t next = next_state[prev][bit];
+
+                uint16_t d = 0;
+                for (int b = 0; b < 4; b++) {
+                    if (rx[b] != 0xff && rx[b] != ((pattern >> (3 - b)) & 1)) d++;
+                }
+
+                const uint16_t total = cost[prev] + d;
+                if (total < new_cost[next]) {
+                    new_cost[next] = total;
+                    trace_buffer[step * 16 + next] = (prev << 1) | bit;
+                }
+            }
+        }
+        memcpy(cost, new_cost, sizeof(cost));
+    }
+
+    // Traceback
+    uint8_t best_state = 0;
+    for (int i = 1; i < 16; i++) {
+        if (cost[i] < cost[best_state]) best_state = i;
+    }
+
+    uint8_t state = best_state;
+    memset(bits, 0, (n_info + 7) >> 3);
+
+    for (int step = (int)n_info - 1; step >= 0; step--) {
+        uint8_t packed = trace_buffer[step * 16 + state];
+        uint8_t prev = (packed >> 1) & 0x0F;
+        uint8_t bit = packed & 0x01;
+
+        if (bit) bits[step >> 3] |= (1 << (7 - (step & 7)));
+        state = prev;
+    }
+
+    return cost[best_state];
+}
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/tetra_viterbi.hpp

@@ -0,0 +1,17 @@
+#pragma once
+
+#include <stdint.h>
+#include <string.h>
+
+namespace ui::external_app::tetra_rx {
+
+class Viterbi {
+   public:
+    int decode_cch(
+        const uint8_t* mother,
+        uint32_t n_info,
+        uint8_t* bits,
+        uint8_t* trace_buffer);
+};
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/ui_tetra_rx.cpp

@@ -0,0 +1,354 @@
+#include "ui_tetra_rx.hpp"
+#include "rtc_time.hpp"
+#include "baseband_api.hpp"
+#include "string_format.hpp"
+#include "portapack_persistent_memory.hpp"
+#include "file_path.hpp"
+#include "tetra_crc.hpp"
+#include "tetra_descrambler.hpp"
+#include "tetra_interleave.hpp"
+#include "tetra_rcpc.hpp"
+#include "tetra_viterbi.hpp"
+#include <cstring>
+
+using namespace portapack;
+using namespace ui;
+
+namespace ui::external_app::tetra_rx {
+
+template <size_t OutBytes>
+bool TetraChannelDecoder::decode_block(
+    const std::array<uint8_t, 63>& burst,
+    size_t offset,
+    size_t len_t5,
+    size_t type1_bits,
+    size_t type2_bits,
+    size_t interleave_a,
+    std::array<uint8_t, OutBytes>& out,
+    uint16_t& crc,
+    int& cost,
+    uint32_t scramb_init) {
+    std::array<uint8_t, 64> t5{};
+    std::array<uint8_t, 64> t3{};
+    std::array<uint8_t, 1200> mother{};
+    std::array<uint8_t, 64> type2{};
+
+    out.fill(0);
+
+    for (size_t i = 0; i < len_t5; i++) {
+        set_bit(t5, i, get_bit(burst, offset + i));
+    }
+
+    BitVector t5_bits{t5.data(), len_t5};
+    Descrambler::descramble(t5_bits, scramb_init);
+
+    BitVector t3_bits{t3.data(), len_t5};
+    Interleave::block_deinterleave(t5_bits, t3_bits, len_t5, interleave_a);
+
+    RCPC::depuncture_2_3(t3_bits, mother.data(), len_t5);
+    Viterbi viterbi;
+    cost = viterbi.decode_cch(mother.data(), type2_bits, type2.data(), trace_buffer);
+    crc = CRC::crc16_itut_bits(type2.data(), type1_bits + 16);
+    for (size_t i = 0; i < type1_bits; i++) {
+        set_bit(out, i, (type2[i >> 3] >> (7 - (i & 7))) & 1);
+    }
+    return crc == CRC::CRC_OK;
+}
+
+TetraChannelDecoder::Result TetraChannelDecoder::decode_dnb(const TetraDnbMessage& message) {
+    Result result{};
+    result.inverted = message.inverted;
+
+    if (!network_synced)
+        return result;
+
+    std::array<uint8_t, 63> buffer{};
+    std::copy(message.payload.begin(), message.payload.end(), buffer.begin());
+
+    uint32_t tmo_dnb_seed = (((uint32_t)last_mcc << 20) | ((uint32_t)last_mnc << 6) | (uint32_t)last_bcc) << 2 | 3;
+    // 1. DNB Full slot (SCH/F)
+    bool ok = decode_block(buffer, 0, SCH_F_LEN_BITS, SCH_F_TYPE1_BITS, SCH_F_TYPE2_BITS,
+                           SCH_F_INTERLEAVE_A, result.payload, result.crc, result.cost, tmo_dnb_seed);
+
+    // 2. SCH/HD Block 1
+    if (!ok) {
+        ok = decode_block(buffer, 0, BLK2_LEN_BITS, SB2_TYPE1_BITS, SB2_TYPE2_BITS,
+                          SB2_INTERLEAVE_A, result.payload, result.crc, result.cost, tmo_dnb_seed);
+    }
+
+    // 3. SCH/HD Block 2
+    if (!ok) {
+        ok = decode_block(buffer, 216, BLK2_LEN_BITS, SB2_TYPE1_BITS, SB2_TYPE2_BITS,
+                          SB2_INTERLEAVE_A, result.payload, result.crc, result.cost, tmo_dnb_seed);
+    }
+
+    if (ok) {
+        result.type = Result::Type::Dnb;
+        result.is_ok = true;
+        parse_mac_pdu(result);
+    }
+
+    return result;
+}
+
+TetraChannelDecoder::Result TetraChannelDecoder::decode_burst(const TetraBurstMessage& message) {
+    Result result{};
+    result.sync_errors = message.sync_errors;
+    result.inverted = message.inverted;
+
+    // 1. SCH/S
+    bool ok = decode_block(
+        message.payload, BLK1_OFFSET_BITS, BLK1_LEN_BITS,
+        SB1_TYPE1_BITS, SB1_TYPE2_BITS, SB1_INTERLEAVE_A,
+        result.payload, result.crc, result.cost,
+        Descrambler::SCRAMB_INIT_BSCH);
+
+    if (!ok) return result;
+
+    result.type = Result::Type::Sync;
+    result.is_ok = true;
+    parse_sync_pdu(result);
+
+    uint16_t current_mcc = result.mcc;
+    uint16_t current_mnc = result.mnc;
+    uint8_t current_bcc = result.bcc;
+    uint8_t current_enc = result.encryption;
+
+    // 2. SCH/H
+    uint16_t h_crc = 0;
+    int h_cost = 0;
+
+    ok = decode_block(
+        message.payload, TMO_BLK2_OFFSET_BITS, BLK2_LEN_BITS,
+        SB2_TYPE1_BITS, SB2_TYPE2_BITS, SB2_INTERLEAVE_A,
+        result.payload, h_crc, h_cost,
+        Descrambler::SCRAMB_INIT_BSCH);
+
+    if (ok) {
+        result.type = Result::Type::SyncFull;
+        result.crc = h_crc;
+        result.cost = h_cost;
+
+        result.mcc = current_mcc;
+        result.mnc = current_mnc;
+        result.bcc = current_bcc;
+        result.encryption = current_enc;
+
+        parse_mac_pdu(result);
+    } else {
+        result.encryption = current_enc;
+    }
+
+    return result;
+}
+
+uint32_t TetraChannelDecoder::read_bits(const uint8_t* bytes, size_t bit, size_t count) const {
+    uint32_t value = 0;
+    for (size_t i = 0; i < count; i++) {
+        value <<= 1;
+        value |= (bytes[(bit + i) >> 3] >> (7 - ((bit + i) & 7))) & 1;
+    }
+    return value;
+}
+
+void TetraChannelDecoder::parse_sync_pdu(Result& result) {
+    // Sys 4 bit, then BCC
+    result.bcc = read_bits(result.payload.data(), 4, 6);
+    result.timeslot = read_bits(result.payload.data(), 10, 2);
+    result.frame_number = read_bits(result.payload.data(), 12, 5);
+    result.encryption = read_bits(result.payload.data(), 30, 1);
+    result.mcc = read_bits(result.payload.data(), 31, 10);
+    result.mnc = read_bits(result.payload.data(), 41, 14);
+
+    last_mcc = result.mcc;
+    last_mnc = result.mnc;
+    last_bcc = result.bcc;
+    network_synced = true;
+}
+
+void TetraChannelDecoder::parse_mac_pdu(Result& result) {
+    result.pdu_type = read_bits(result.payload.data(), 0, 2);
+
+    if (result.pdu_type == 0) {  // MAC-RESOURCE
+        result.encryption = read_bits(result.payload.data(), 4, 2);
+        uint8_t length_ind = read_bits(result.payload.data(), 7, 6);
+
+        if (result.encryption == 0 && length_ind > 0 && length_ind < 62) {
+            size_t offset = 13;
+            uint8_t addr_type = read_bits(result.payload.data(), offset, 3);
+            offset += 3;
+
+            if (addr_type == 1) {
+                result.calling_ssi = read_bits(result.payload.data(), offset, 24);
+                offset += 24;
+            } else if (addr_type == 2) {
+                offset += 10;
+            } else if (addr_type == 3 || addr_type == 4) {
+                result.calling_ssi = read_bits(result.payload.data(), offset, 24);
+                offset += 24;
+            } else if (addr_type == 5) {
+                offset += 34;
+            } else if (addr_type == 6) {
+                offset += 30;
+            } else if (addr_type == 7) {
+                offset += 34;
+            }
+
+            // skip optional fields
+            if (read_bits(result.payload.data(), offset++, 1)) offset += 4;  // Power control
+            if (read_bits(result.payload.data(), offset++, 1)) offset += 8;  // Slot grant
+
+            uint8_t chan_alloc = read_bits(result.payload.data(), offset++, 1);
+
+            if (chan_alloc == 0) {
+                uint8_t llc_type = read_bits(result.payload.data(), offset, 4);
+                offset += 4;
+
+                // LLC header skipped
+                if (llc_type == 0 || llc_type == 1)
+                    offset += 2;
+                else if (llc_type == 2 || llc_type == 3 || llc_type == 6 || llc_type == 7)
+                    offset += 1;
+
+                uint8_t mle_type = read_bits(result.payload.data(), offset, 3);
+                offset += 3;
+
+                // 1 = CMCE
+                if (mle_type == 1) {
+                    result.cmce_type = read_bits(result.payload.data(), offset, 5);
+                    offset += 5;
+                    result.call_id = read_bits(result.payload.data(), offset, 14);
+                }
+            }
+        }
+    } else if (result.pdu_type == 2) {  // SYSINFO/BCAST
+        uint8_t bcast_type = read_bits(result.payload.data(), 2, 2);
+        if (bcast_type == 0) {
+            result.la = read_bits(result.payload.data(), 82, 14);
+            result.encryption = read_bits(result.payload.data(), 122, 1);
+        }
+    }
+}
+
+TetraRxView::TetraRxView(NavigationView& nav)
+    : nav_{nav} {
+    baseband::run_prepared_image(portapack::memory::map::m4_code.base());
+
+    add_children({&rssi, &channel, &field_rf_amp, &field_lna, &field_vga,
+                  &field_frequency, &text_mcc, &text_la, &text_pdu,
+                  &text_mnc, &text_ts, &text_fn, &text_bcc, &text_enc, &text_debug, &console});
+
+    field_frequency.set_step(25000);
+
+    receiver_model.set_modulation(ReceiverModel::Mode::NarrowbandFMAudio);
+    receiver_model.set_sampling_rate(3072000);
+    receiver_model.set_baseband_bandwidth(1750000);
+    receiver_model.set_squelch_level(0);
+    receiver_model.enable();
+}
+
+void TetraRxView::focus() {
+    field_frequency.focus();
+}
+
+void TetraRxView::on_data_tetra(const TetraBurstMessage& message) {
+    packet_count++;
+    auto result = decoder.decode_burst(message);
+
+    if (result.type == TetraChannelDecoder::Result::Type::Sync ||
+        result.type == TetraChannelDecoder::Result::Type::SyncFull) {
+        valid_count++;
+
+        text_mcc.set("MCC: " + to_string_dec_uint(result.mcc));
+        text_mnc.set("MNC: " + to_string_dec_uint(result.mnc));
+        text_bcc.set("BCC: " + to_string_dec_uint(result.bcc));
+        text_ts.set("TS:  " + to_string_dec_uint(result.timeslot));
+        text_fn.set("FN:  " + to_string_dec_uint(result.frame_number));
+
+        std::string enc_str = (result.encryption != 0) ? "Encrypted" : "Clear";
+        text_enc.set("ENC: " + enc_str);
+
+        if (result.type == TetraChannelDecoder::Result::Type::SyncFull) {
+            h_valid_count++;
+            if (result.la != 0xffff) text_la.set("LA:  " + to_string_dec_uint(result.la));
+            text_pdu.set("PDU: " + decoder.get_pdu_name(result.pdu_type));
+        }
+    }
+    text_debug.set(
+        "Syn: " + to_string_dec_uint(packet_count) +
+        ", V: " + to_string_dec_uint(valid_count) +
+        ", H: " + to_string_dec_uint(h_valid_count) +
+        ", E:" + to_string_dec_uint(result.sync_errors));
+}
+
+void TetraRxView::on_data_dnb(const TetraDnbMessage& message) {
+    dnb_count++;
+    auto result = decoder.decode_dnb(message);
+
+    if (result.is_ok && result.type == TetraChannelDecoder::Result::Type::Dnb) {
+        if (result.la != 0xffff) text_la.set("LA:  " + to_string_dec_uint(result.la));
+        text_pdu.set("PDU: " + decoder.get_pdu_name(result.pdu_type));
+
+        std::string enc_str = (result.encryption != 0) ? "Encrypted" : "Clear";
+        text_enc.set("ENC: " + enc_str);
+
+        // if (rate_limiter++ < 2) console.writeln("DNB: " + decoder.get_pdu_name(result.pdu_type));
+        if (result.cmce_type != 0xff) {
+            std::string msg = "";
+            if (result.cmce_type == 7)
+                msg = "SETUP";
+            else if (result.cmce_type == 1)
+                msg = "CALL PROCEEDING";
+            else if (result.cmce_type == 0)
+                msg = "ALERTING";
+            else if (result.cmce_type == 2)
+                msg = "CONNECT";
+            else if (result.cmce_type == 3)
+                msg = "CONNECT ACK";
+            else if (result.cmce_type == 11)
+                msg = "TX GRANTED";
+            else if (result.cmce_type == 9)
+                msg = "TX CEASED";
+            else if (result.cmce_type == 13)
+                msg = "TX WAIT";
+            else if (result.cmce_type == 10)
+                msg = "TX CONTINUE";
+            else if (result.cmce_type == 12)
+                msg = "TX INTERRUPT";
+            else if (result.cmce_type == 4)
+                msg = "DISCONNECT";
+            else if (result.cmce_type == 6)
+                msg = "RELEASE";
+            else if (result.cmce_type == 5)
+                msg = "INFO";
+            else if (result.cmce_type == 8)
+                msg = "STATUS";
+            else if (result.cmce_type == 14)
+                msg = "SDS DATA";
+            else if (result.cmce_type == 15)
+                msg = "FACILITY";
+            else if (result.cmce_type == 16)
+                msg = "CALL RESTORE";
+            else if (result.cmce_type == 31)
+                msg = "NOT SUPPORTED";
+            else
+                msg = "CMCE:" + to_string_dec_uint(result.cmce_type);
+
+            console.writeln(msg);
+            if (result.call_id != 0xffff) {
+                console.writeln("ID:" + to_string_dec_uint(result.call_id) + " | SSI:" + to_string_dec_uint(result.calling_ssi));
+            }
+        }
+    }
+}
+
+void TetraRxView::on_timer() {
+    rate_limiter = 0;
+}
+
+TetraRxView::~TetraRxView() {
+    receiver_model.disable();
+    baseband::shutdown();
+}
+
+}  // namespace ui::external_app::tetra_rx

firmware/application/external/tetra_rx/ui_tetra_rx.hpp

@@ -0,0 +1,192 @@
+#ifndef __UI_TETRA_RX_H__
+#define __UI_TETRA_RX_H__
+
+#include "ui.hpp"
+#include "ui_language.hpp"
+#include "ui_navigation.hpp"
+#include "ui_receiver.hpp"
+#include "ui_freq_field.hpp"
+#include "app_settings.hpp"
+#include "radio_state.hpp"
+#include "log_file.hpp"
+#include "utility.hpp"
+#include "message.hpp"
+#include <array>
+#include <string>
+
+using namespace ui;
+
+namespace ui::external_app::tetra_rx {
+
+class TetraChannelDecoder {
+   public:
+    struct Result {
+        enum class Type { None,
+                          Sync,
+                          SyncFull,
+                          Dnb };
+        Type type{Type::None};
+
+        bool is_ok{false};
+        uint8_t sync_errors{0};
+        bool inverted{false};
+
+        uint16_t crc{0};
+        int cost{0};
+
+        uint8_t timeslot{0xff};
+        uint8_t frame_number{0xff};
+        uint16_t mcc{0xffff};
+        uint16_t mnc{0xffff};
+        uint8_t bcc{0xff};
+
+        uint8_t pdu_type{0xff};
+        uint16_t la{0xffff};
+        uint8_t encryption{0xff};
+
+        uint8_t cmce_type{0xff};
+        uint16_t call_id{0xffff};
+        uint32_t calling_ssi{0};
+
+        std::array<uint8_t, 34> payload{};
+    };
+
+    std::string get_pdu_name(uint8_t pdu_type) {
+        switch (pdu_type) {
+            case 0:
+                return "MAC-RESOURCE";
+            case 1:
+                return "MAC-FRAG";
+            case 2:
+                return "SYSINFO/BCAST";
+            case 3:
+                return "MAC-U-SIGNAL";
+            default:
+                return "UNK_" + std::to_string(pdu_type);
+        }
+    }
+
+    Result decode_burst(const TetraBurstMessage& message);
+    Result decode_dnb(const TetraDnbMessage& message);
+
+   private:
+    static constexpr size_t BLK1_OFFSET_BITS = 94;
+    static constexpr size_t BLK1_LEN_BITS = 120;
+    static constexpr size_t TMO_BLK2_OFFSET_BITS = 282;
+    static constexpr size_t BLK2_LEN_BITS = 216;
+    static constexpr size_t SB1_TYPE1_BITS = 60;
+    static constexpr size_t SB1_TYPE2_BITS = 80;
+    static constexpr size_t SB1_INTERLEAVE_A = 11;
+    static constexpr size_t SB2_TYPE1_BITS = 124;
+    static constexpr size_t SB2_TYPE2_BITS = 144;
+    static constexpr size_t SB2_INTERLEAVE_A = 101;
+
+    static constexpr size_t SCH_F_LEN_BITS = 432;
+    static constexpr size_t SCH_F_TYPE1_BITS = 268;
+    static constexpr size_t SCH_F_TYPE2_BITS = 288;
+    static constexpr size_t SCH_F_INTERLEAVE_A = 103;
+
+    uint16_t last_mcc{0};
+    uint16_t last_mnc{0};
+    uint8_t last_bcc{0};
+    bool network_synced{false};
+
+    // Viterbi buffer
+    uint8_t trace_buffer[9216];
+
+    template <size_t OutBytes>
+    bool decode_block(const std::array<uint8_t, 63>& burst,
+                      size_t offset,
+                      size_t len_t5,
+                      size_t type1_bits,
+                      size_t type2_bits,
+                      size_t interleave_a,
+                      std::array<uint8_t, OutBytes>& out,
+                      uint16_t& crc,
+                      int& cost,
+                      uint32_t scramb_init);
+
+    void parse_sync_pdu(Result& result);
+    void parse_mac_pdu(Result& result);
+    uint32_t read_bits(const uint8_t* bytes, size_t bit, size_t count) const;
+
+    template <size_t N>
+    uint8_t get_bit(const std::array<uint8_t, N>& arr, size_t bit_idx) const {
+        return (arr[bit_idx / 8] >> (7 - (bit_idx % 8))) & 0x01;
+    }
+
+    template <size_t N>
+    void set_bit(std::array<uint8_t, N>& arr, size_t bit_idx, uint8_t val) const {
+        if (val)
+            arr[bit_idx / 8] |= (1 << (7 - (bit_idx % 8)));
+        else
+            arr[bit_idx / 8] &= ~(1 << (7 - (bit_idx % 8)));
+    }
+};
+
+class TetraRxView : public View {
+   public:
+    TetraRxView(NavigationView& nav);
+    ~TetraRxView();
+    void focus() override;
+    std::string title() const override { return "Tetra RX"; };
+
+   private:
+    NavigationView& nav_;
+    RxRadioState radio_state_{};
+    app_settings::SettingsManager settings_{"rx_tetra", app_settings::Mode::RX};
+
+    uint32_t packet_count{0};
+    uint32_t valid_count{0};
+    uint32_t h_valid_count{0};
+    uint32_t dnb_count{0};
+
+    RxFrequencyField field_frequency{{UI_POS_X(0), UI_POS_Y(0)}, nav_};
+    RFAmpField field_rf_amp{{UI_POS_X(13), UI_POS_Y(0)}};
+    LNAGainField field_lna{{UI_POS_X(15), UI_POS_Y(0)}};
+    VGAGainField field_vga{{UI_POS_X(18), UI_POS_Y(0)}};
+    RSSI rssi{{UI_POS_X_RIGHT(9), UI_POS_Y(0), UI_POS_WIDTH(9), 4}};
+    Channel channel{{UI_POS_X_RIGHT(9), UI_POS_Y(0) + 5, UI_POS_WIDTH(9), 4}};
+
+    Text text_mcc{{UI_POS_X(0), UI_POS_Y(1), UI_POS_WIDTH(15), UI_POS_HEIGHT(1)}, "MCC: ---"};
+    Text text_mnc{{UI_POS_X(15), UI_POS_Y(1), UI_POS_WIDTH(15), UI_POS_HEIGHT(1)}, "MNC: ---"};
+    Text text_ts{{UI_POS_X(0), UI_POS_Y(2), UI_POS_WIDTH(15), UI_POS_HEIGHT(1)}, "TS:  -"};       // time slot
+    Text text_fn{{UI_POS_X(15), UI_POS_Y(2), UI_POS_WIDTH(15), UI_POS_HEIGHT(1)}, "FN:  -"};      // frame number
+    Text text_bcc{{UI_POS_X(0), UI_POS_Y(3), UI_POS_WIDTH(15), UI_POS_HEIGHT(1)}, "BCC: -"};      // Base Station Color Code
+    Text text_enc{{UI_POS_X(15), UI_POS_Y(3), UI_POS_WIDTH(15), UI_POS_HEIGHT(1)}, "ENC: -"};     // encoded or not
+    Text text_la{{UI_POS_X(0), UI_POS_Y(4), UI_POS_WIDTH(15), UI_POS_HEIGHT(1)}, "LA:  ----"};    // Location Area
+    Text text_pdu{{UI_POS_X(15), UI_POS_Y(4), UI_POS_WIDTH(15), UI_POS_HEIGHT(1)}, "PDU: ----"};  // pdu content type
+
+    Text text_debug{{UI_POS_X(0), UI_POS_Y(5), UI_POS_MAXWIDTH, UI_POS_HEIGHT(1)}, "Syn: 0, V: 0, H: 0, E:0"};  // sync, valid, h_valid, errors corrected in top part
+    Console console{{UI_POS_X(0), UI_POS_Y(6) + 8, UI_POS_MAXWIDTH, screen_height - (UI_POS_Y(7) + 8)}};
+
+    TetraChannelDecoder decoder{};
+
+    void on_data_tetra(const TetraBurstMessage&);
+    void on_data_dnb(const TetraDnbMessage&);
+
+    uint8_t rate_limiter{0};  // limiter, to keep the device responsive
+    void on_timer();
+
+    MessageHandlerRegistration message_handler_frame_sync{
+        Message::ID::DisplayFrameSync,
+        [this](const Message* const) {
+            this->on_timer();
+        }};
+
+    MessageHandlerRegistration message_handler_packet{
+        Message::ID::TetraBsch,
+        [this](Message* const p) {
+            this->on_data_tetra(*static_cast<const TetraBurstMessage*>(p));
+        }};
+
+    MessageHandlerRegistration message_handler_dnb{
+        Message::ID::TetraDnb,
+        [this](Message* const p) {
+            this->on_data_dnb(*static_cast<const TetraDnbMessage*>(p));
+        }};
+};
+
+}  // namespace ui::external_app::tetra_rx
+
+#endif

firmware/application/external/tuner/ui_tuner.cpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/external/tuner/ui_tuner.hpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/hw/max2831.cpp

@@ -28,10 +28,15 @@
 
 #include "max2831.hpp"
 
+#include "portapack_adc.hpp"
+
 #include "hackrf_hal.hpp"
 #include "hackrf_gpio.hpp"
 using namespace hackrf::one;
 
+#include "gpio.hpp"
+using namespace gpio_control;
+
 #include "ch.h"
 #include "hal.h"
 
@@ -151,7 +156,7 @@ void MAX2831::set_mode(const Mode mode) {
      *   RX:       ENABLE=1, RXTX=0
      *   TX:       ENABLE=1, RXTX=1
      *
-     * Note: gpio_max2831_rx_enable is the RXTX mode select pin.
+     * Note: max2831_rxtx_enable is the RXTX mode select pin.
      * RXTX=0 selects RX, RXTX=1 selects TX.
      */
 
@@ -174,26 +179,26 @@ void MAX2831::set_mode(const Mode mode) {
     switch (mode) {
         default:
         case Mode::Shutdown:
-            gpio_max2831_rx_enable.write(0); /* RXTX=0 */
-            gpio_max283x_enable.write(0);    /* ENABLE=0 */
+            max2831_rxtx_enable.setInactive(); /* RXTX=0 */
+            max283x_enable.setInactive();      /* ENABLE=0 */
             set_rssi_mux(0);
             break;
         case Mode::Standby:
-            gpio_max2831_rx_enable.write(1); /* RXTX=1 */
-            gpio_max283x_enable.write(0);    /* ENABLE=0 */
+            max2831_rxtx_enable.setActive(); /* RXTX=1 */
+            max283x_enable.setInactive();    /* ENABLE=0 */
             set_rssi_mux(0);
             break;
         case Mode::Transmit:
         case Mode::Tx_Calibration:
-            gpio_max2831_rx_enable.write(1); /* RXTX=1 for TX */
-            gpio_max283x_enable.write(1);    /* ENABLE=1 */
+            max2831_rxtx_enable.setActive(); /* RXTX=1 for TX */
+            max283x_enable.setActive();      /* ENABLE=1 */
             set_rssi_mux(2);                 // transmit power
             break;
         case Mode::Receive:
         case Mode::Rx_Calibration:
-            gpio_max2831_rx_enable.write(0); /* RXTX=0 for RX */
-            gpio_max283x_enable.write(1);    /* ENABLE=1 */
-            set_rssi_mux(1);                 // RSSI
+            max2831_rxtx_enable.setInactive(); /* RXTX=0 for RX */
+            max283x_enable.setActive();        /* ENABLE=1 */
+            set_rssi_mux(1);                   // RSSI
             break;
     }
 
@@ -227,8 +232,15 @@ void MAX2831::set_lna_gain(const int_fast8_t db) {
     } else {
         gain_val = REG11_LNA_GAIN_M33;
     }
+
+    max2831_rxhp.setActive();  // Fast DC offset compensation
+
     set_reg_field(11, REG11_LNA_GAIN_MASK, gain_val);
     flush_reg(11);
+
+    chThdSleepMicroseconds(2);
+
+    max2831_rxhp.setInactive();
 }
 
 void MAX2831::set_vga_gain(const int_fast8_t db) {
@@ -237,10 +249,18 @@ void MAX2831::set_vga_gain(const int_fast8_t db) {
     if ((db & 0x1) || db > 62) {
         return; /* Invalid: must be even and <= 62 */
     }
+
     int_fast8_t db_clipped = std::max(0, std::min(62, (int)db));
     uint16_t value = (db_clipped >> 1) & 0x1f;
+
+    max2831_rxhp.setActive();  // Fast DC offset compensation
+
     set_reg_field(11, REG11_RXVGA_GAIN_MASK, value);
     flush_reg(11);
+
+    chThdSleepMicroseconds(2);
+
+    max2831_rxhp.setInactive();
 }
 
 /*
@@ -365,9 +385,9 @@ void MAX2831::set_lpf_rf_bandwidth_rx(const uint32_t bandwidth_minimum) {
 
 void MAX2831::set_lpf_rf_bandwidth_tx(const uint32_t bandwidth_minimum) {
     _desired_lpf_bw = bandwidth_minimum;
-#ifdef PRALINE
-    gpio_control::aa_en.clear();  // Disable external AA filter for wideband operations
-#endif
+
+    gpio_control::aa_en.setInactive();  // Disable external AA filter for wideband operations
+
     if (_mode == Mode::Transmit || _mode == Mode::Tx_Calibration) {
         set_lpf_bandwidth_internal(bandwidth_minimum);
     }
@@ -461,13 +481,56 @@ void MAX2831::set_rx_buff_vcm(const size_t v) {
 }
 
 int8_t MAX2831::temp_sense() {
-    /* MAX2831 temperature sensor can be read via RSSI MUX.
-     * This would require:
-     * 1. Switch RSSI_MUX to temperature mode
-     * 2. Read the ADC
-     * 3. Switch back to RSSI mode
-     * For now, return a placeholder value. */
-    return 25; /* Room temperature placeholder */
+    bool not_in_rx = (_mode != Mode::Receive && _mode != Mode::Rx_Calibration);
+
+    if (not_in_rx) {
+        max2831_rxtx_enable.setInactive();
+        max283x_enable.setActive();
+        chThdSleepMilliseconds(1);
+    }
+
+    set_rssi_mux(3);
+    chThdSleepMilliseconds(5);
+
+    uint32_t saved_cr = LPC_ADC1->CR;
+    uint32_t cr_temp = saved_cr;
+    cr_temp &= ~0xFF;
+    cr_temp |= (1 << portapack::adc1_rssi_input);
+
+    if (((cr_temp >> 8) & 0xFF) == 0) {
+        cr_temp |= (0xFF << 8);
+    }
+
+    cr_temp &= ~(1 << 16);
+    cr_temp |= (1 << 21);
+    cr_temp &= ~(7 << 24);
+    cr_temp |= (1 << 24);
+
+    LPC_ADC1->CR = cr_temp;
+
+    uint32_t val;
+    while (((val = LPC_ADC1->DR[portapack::adc1_rssi_input]) & (1UL << 31)) == 0) {
+        __asm__("nop");
+    }
+
+    uint32_t adc_raw = (val >> 6) & 0x3FF;
+
+    LPC_ADC1->CR = saved_cr;
+
+    if (not_in_rx) {
+        set_mode(_mode);
+    } else {
+        set_rssi_mux(1);
+    }
+
+    float v_adc = (adc_raw / 1023.0f) * 3.3f;
+
+    constexpr float V_25_CELSIUS = 1.185f;
+    constexpr float SLOPE = 0.003f;
+
+    float temp = 25.0f + ((v_adc - V_25_CELSIUS) / SLOPE);
+
+    return static_cast<int8_t>(std::max(-128.0f, std::min(127.0f, temp)));
 }
 
 reg_t MAX2831::read(const address_t reg_num) {

firmware/application/hw/max2837.cpp

@@ -19,12 +19,17 @@
  * Boston, MA 02110-1301, USA.
  */
 
+#ifndef PRALINE  // not praline
+
 #include "max2837.hpp"
 
 #include "hackrf_hal.hpp"
 #include "hackrf_gpio.hpp"
 using namespace hackrf::one;
 
+#include "gpio.hpp"
+using namespace gpio_control;
+
 #include "ch.h"
 #include "hal.h"
 
@@ -99,12 +104,6 @@ constexpr uint32_t pll_factor = 1.0 / (4.0 / 3.0 / reference_frequency) + 0.5;
 void MAX2837::init() {
     set_mode(Mode::Shutdown);
 
-#ifndef PRALINE
-    gpio_max283x_enable.output();
-    gpio_max2837_rxenable.output();
-    gpio_max2837_txenable.output();
-#endif
-
     _map.r.tx_gain.TXVGA_GAIN_SPI_EN = 1;
     _map.r.tx_gain.TXVGA_GAIN_MSB_SPI_EN = 1;
     _map.r.tx_gain.TXVGA_GAIN_SPI = 0x00;
@@ -159,12 +158,6 @@ void MAX2837::set_tx_LO_iq_phase_calibration(const size_t v) {
     // TX calibration , Logic pins , ENABLE, RXENABLE, TXENABLE = 1,0,1 (5dec), and  Reg address 16, D1 (CAL mode 1):DO (CHIP ENABLE 1)
     set_mode(Mode::Tx_Calibration);  // write to ram 3 LOGIC Pins .
 
-#ifndef PRALINE
-    gpio_max283x_enable.output();
-    gpio_max2837_rxenable.output();
-    gpio_max2837_txenable.output();
-#endif
-
     _map.r.spi_en.CAL_SPI = 1;  // Register Settings reg address 16,  D1 (CAL mode 1)
     _map.r.spi_en.EN_SPI = 1;   // Register Settings reg address 16,  DO (CHIP ENABLE 1)
     flush_one(Register::SPI_EN);
@@ -214,7 +207,7 @@ void MAX2837::set_mode(const Mode mode) {  // We set up the 3 Logic Pins ENABLE,
     _mode = mode;
 
     Mask mask = mode_mask(mode);
-    gpio_max283x_enable.write(toUType(mask) & toUType(Mask::Enable));
+    max283x_enable.write(toUType(mask) & toUType(Mask::Enable));
     gpio_max2837_rxenable.write(toUType(mask) & toUType(Mask::RxEnable));
     gpio_max2837_txenable.write(toUType(mask) & toUType(Mask::TxEnable));
 }
@@ -352,12 +345,6 @@ void MAX2837::set_rx_LO_iq_phase_calibration(const size_t v) {
     // RX calibration , Logic pins , ENABLE, RXENABLE, TXENABLE = 1,1,0 (3dec), and  Reg address 16, D1 (CAL mode 1):DO (CHIP ENABLE 1)
     set_mode(Mode::Rx_Calibration);  // write to ram 3 LOGIC Pins .
 
-#ifndef PRALINE
-    gpio_max283x_enable.output();
-    gpio_max2837_rxenable.output();
-    gpio_max2837_txenable.output();
-#endif
-
     _map.r.spi_en.CAL_SPI = 1;  // Register Settings reg address 16,  D1 (CAL mode 1)
     _map.r.spi_en.EN_SPI = 1;   // Register Settings reg address 16,  DO (CHIP ENABLE 1)
     flush_one(Register::SPI_EN);
@@ -419,3 +406,5 @@ int8_t MAX2837::temp_sense() {
 }
 
 }  // namespace max2837
+
+#endif  // not PRALINE

firmware/application/hw/max2839.cpp

@@ -19,6 +19,7 @@
  * the Free Software Foundation, Inc., 51 Franklin Street,
  * Boston, MA 02110-1301, USA.
  */
+#ifndef PRALINE  // not praline
 
 #include "max2839.hpp"
 
@@ -26,6 +27,9 @@
 #include "hackrf_gpio.hpp"
 using namespace hackrf::one;
 
+#include "gpio.hpp"
+using namespace gpio_control;
+
 #include "ch.h"
 #include "hal.h"
 
@@ -100,11 +104,6 @@ static int_fast8_t requested_rx_vga_gain = 0;
 void MAX2839::init() {
     set_mode(Mode::Shutdown);
 
-#ifndef PRALINE
-    gpio_max283x_enable.output();
-    gpio_max2839_rxtx.output();
-#endif
-
     _map.r.rxrf_1.MIMOmode = 1; /* enable RXINB */
 
     _map.r.pa_drv.TXVGA_GAIN_SPI_EN = 1;
@@ -154,11 +153,6 @@ void MAX2839::set_tx_LO_iq_phase_calibration(const size_t v) {
     // TX calibration , 2 x Logic pins , ENABLE, RXENABLE = 1,0, (2dec), and  Reg address 16, D1 (CAL mode 1):DO (CHIP ENABLE 1)
     set_mode(Mode::Tx_Calibration);  // write to ram 3 LOGIC Pins .
 
-#ifndef PRALINE
-    gpio_max283x_enable.output();  // max2839 has only 2 x pins + regs to decide mode.
-    gpio_max2839_rxtx.output();    // Here is combined rx & tx pin in one port.
-#endif
-
     _map.r.spi_en.CAL_SPI = 1;  // Register Settings reg address 16,  D1 (CAL mode 1)
     _map.r.spi_en.EN_SPI = 1;   // Register Settings reg address 16,  DO (CHIP ENABLE 1)
     flush_one(Register::SPI_EN);
@@ -207,7 +201,7 @@ void MAX2839::set_mode(const Mode mode) {
     _mode = mode;
 
     Mask mask = mode_mask(mode);
-    gpio_max283x_enable.write(toUType(mask) & toUType(Mask::Enable));
+    max283x_enable.write(toUType(mask) & toUType(Mask::Enable));
     gpio_max2839_rxtx.write(toUType(mask) & toUType(Mask::RxTx));
 }
 
@@ -395,11 +389,6 @@ void MAX2839::set_rx_LO_iq_phase_calibration(const size_t v) {
     // RX calibration , Logic pins , ENABLE, RXENABLE, TXENABLE = 1,1,0 (3dec), and  Reg address 16, D1 (CAL mode 1):DO (CHIP ENABLE 1)
     set_mode(Mode::Rx_Calibration);  // write to ram 3 LOGIC Pins .
 
-#ifndef PRALINE
-    gpio_max283x_enable.output();  // max2839 has only 2 x pins + regs to decide mode.
-    gpio_max2839_rxtx.output();    // Here is combined rx & tx pin in one port.
-#endif
-
     _map.r.spi_en.CAL_SPI = 1;  // Register Settings reg address 16,  D1 (CAL mode 1)
     _map.r.spi_en.EN_SPI = 1;   // Register Settings reg address 16,  DO (CHIP ENABLE 1)
     flush_one(Register::SPI_EN);
@@ -446,4 +435,5 @@ int8_t MAX2839::temp_sense() {
     return std::min(127, (int)(value * 4.31 - 40));  // reg value is 0 to 31; possible return range is -40 C to 127 C
 }
 
-}  // namespace max2839
+}  // namespace max2839
+#endif  // not PRALINE

firmware/application/hw/rffc507x.cpp

@@ -26,9 +26,13 @@
 #include "utility.hpp"
 
 #include "hackrf_hal.hpp"
+
 #include "hackrf_gpio.hpp"
 using namespace hackrf::one;
 
+#include "gpio.hpp"
+using namespace gpio_control;
+
 #include "hal.h"
 
 #ifdef PRALINE
@@ -176,13 +180,11 @@ struct SynthConfig {
 
 void RFFC507x::init() {
 #ifdef PRALINE
-    gpio_control::rf5072_mix_en.setActive();  // RF5072_MIX_EN
+    rf5072_mix_en.setActive();  // RF5072_MIX_EN
 #endif
 
-    gpio_rffc5072_resetx.set();
-#ifndef PRALINE
-    gpio_rffc5072_resetx.output();
-#endif
+    rffc5072_resetx.setInactive();
+
     reset();
 
     _bus.init();
@@ -195,9 +197,9 @@ void RFFC507x::reset() {
     /* TODO: Is RESETB pin ignored if sdi_ctrl.sipin=1? Programming guide
      * description of sdi_ctrl.sipin suggests the pin is not ignored.
      */
-    gpio_rffc5072_resetx.clear();
+    rffc5072_resetx.setActive();
     halPolledDelay(ticks_during_reset);
-    gpio_rffc5072_resetx.set();
+    rffc5072_resetx.setInactive();
     halPolledDelay(ticks_after_reset);
 }
 

firmware/application/hw/rffc507x_spi.cpp

@@ -23,50 +23,44 @@
 
 #include "utility.hpp"
 
-#include "hackrf_gpio.hpp"
-using namespace hackrf::one;
+#include "gpio.hpp"
+using namespace gpio_control;
 
 namespace rffc507x {
 namespace spi {
 
 void SPI::init() {
-    gpio_rffc5072_select.set();
-    gpio_rffc5072_clock.clear();
-
-#ifndef PRALINE
-    gpio_rffc5072_select.output();
-    gpio_rffc5072_clock.output();
-#endif
-    gpio_rffc5072_data.input();
-
-    gpio_rffc5072_data.clear();
+    rffc5072_select.setInactive();
+    rffc5072_clock.setInactive();
+    rffc5072_sdata.input();
+    rffc5072_sdata.setInactive();
 }
 
 inline void SPI::select(const bool active) {
-    gpio_rffc5072_select.write(!active);
+    rffc5072_select.setState(active);
 }
 
 inline void SPI::direction_out() {
-    gpio_rffc5072_data.output();
+    rffc5072_sdata.output();
 }
 
 inline void SPI::direction_in() {
-    gpio_rffc5072_data.input();
+    rffc5072_sdata.input();
 }
 
 inline void SPI::write_bit(const bit_t value) {
-    gpio_rffc5072_data.write(value);
+    rffc5072_sdata.write(value);
 }
 
 inline bit_t SPI::read_bit() {
-    return gpio_rffc5072_data.read() & 1;
+    return rffc5072_sdata.read() & 1;
 }
 
 inline bit_t SPI::transfer_bit(const bit_t bit_out) {
-    gpio_rffc5072_clock.clear();
+    rffc5072_clock.setInactive();
     write_bit(bit_out);
     const bit_t bit_in = read_bit();
-    gpio_rffc5072_clock.set();
+    rffc5072_clock.setActive();
     return bit_in;
 }
 

firmware/application/hw/touch_adc.cpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
- * copyleft 2023 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2023 zxkmm
  * Copyright (C) 2023 u-foka
  *
  * This file is part of PortaPack.

firmware/application/hw/touch_adc.hpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
- * copyleft 2023 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2023 zxkmm
  * Copyright (C) 2023 u-foka
  *
  * This file is part of PortaPack.

firmware/application/portapack.cpp

@@ -57,13 +57,13 @@ using asahi_kasei::ak4951::AK4951;
 #include "battery.hpp"
 
 #include "gpio.hpp"
+using namespace gpio_control;
 
 extern "C" {
 #include "platform_detect.h"
 
 #ifdef PRALINE
 #include "fpga_bridge.h"
-#include "board.h"
 #endif
 }
 
@@ -74,11 +74,9 @@ const char* init_error = nullptr;
 portapack::IO io{
     portapack::gpio_dir,
     portapack::gpio_lcd_rdx,
-    portapack::gpio_lcd_wrx,
     portapack::gpio_io_stbx,
     portapack::gpio_addr,
     portapack::gpio_lcd_te,
-    portapack::gpio_dfu,
 };
 
 portapack::BacklightCAT4004 backlight_cat4004;
@@ -102,8 +100,6 @@ AK4951 audio_codec_ak4951{i2c0, 0x12};
 ReceiverModel receiver_model;
 TransmitterModel transmitter_model;
 
-TemperatureLogger temperature_logger;
-
 bool antenna_bias{false};
 uint32_t bl_tick_counter{0};
 uint16_t touch_threshold{32};

firmware/application/portapack.hpp

@@ -36,7 +36,6 @@
 
 #include "radio.hpp"
 #include "clock_manager.hpp"
-#include "temperature_logger.hpp"
 #include "theme.hpp"
 
 /* TODO: This would be better as a class to add
@@ -69,8 +68,6 @@ extern TransmitterModel transmitter_model;
 extern uint32_t bl_tick_counter;
 extern uint16_t touch_threshold;
 
-extern TemperatureLogger temperature_logger;
-
 /* Get or set the antenna_bias flag.
  * NB: Does not actually update the radio state. */
 void set_antenna_bias(const bool v);

firmware/application/radio.cpp

@@ -76,8 +76,8 @@ static constexpr uint32_t ssp_scr(
 /* MAX2831 uses 9-bit SPI transfers */
 static constexpr SPIConfig ssp_config_max283x = {
     .end_cb = NULL,
-    .ssport = gpio_max283x_select.port(),
-    .sspad = gpio_max283x_select.pad(),
+    .ssport = map_max283x_select.gpio_port,
+    .sspad = map_max283x_select.gpio_pad,
     .cr0 =
         CR0_CLOCKRATE(ssp_scr(ssp1_pclk_f, ssp1_cpsr, max283x_spi_f) + 3) | CR0_FRFSPI | CR0_DSS9BIT,
     .cpsr = ssp1_cpsr,
@@ -95,8 +95,8 @@ void set_rx_buff_vcm(const size_t v) {
 /* MAX2837/MAX2839 use 16-bit SPI transfers */
 static constexpr SPIConfig ssp_config_max283x = {
     .end_cb = NULL,
-    .ssport = gpio_max283x_select.port(),
-    .sspad = gpio_max283x_select.pad(),
+    .ssport = map_max283x_select.gpio_port,
+    .sspad = map_max283x_select.gpio_pad,
     .cr0 =
         CR0_CLOCKRATE(ssp_scr(ssp1_pclk_f, ssp1_cpsr, max283x_spi_f) + 3) | CR0_FRFSPI | CR0_DSS16BIT,
     .cpsr = ssp1_cpsr,

firmware/application/ui/ui_btngrid.cpp

@@ -4,7 +4,7 @@
  * Copyright (C) 2019 Elia Yehuda (z4ziggy)
  * Copyright (C) 2023 Mark Thompson
  * Copyright (C) 2024 u-foka
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/ui/ui_spectrum.cpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
- * copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2025 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/ui/ui_spectrum.hpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
- * copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2025 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/ui_navigation.cpp

@@ -2,7 +2,7 @@
  * Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
  * Copyright (C) 2016 Furrtek
  * Copyright (C) 2024 u-foka
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/application/ui_navigation.hpp

@@ -2,7 +2,7 @@
  * Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
  * Copyright (C) 2016 Furrtek
  * Copyright (C) 2024 u-foka
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *
@@ -374,7 +374,7 @@ class InformationView : public View {
     Image search_icon{
         {2, 0, 16, 16},
         &bitmap_icon_search,
-        Color::yellow(),
+        Theme::getInstance()->fg_light->foreground,
         Theme::getInstance()->bg_darker->background};
 
     Text version{

firmware/application/usb_serial_asyncmsg.cpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  * Copyright (C) 2024 HTotoo
  *
  * This file is part of PortaPack.

firmware/application/usb_serial_asyncmsg.hpp

@@ -1,5 +1,5 @@
 /*
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  * Copyright (C) 2024 HTotoo
  *
  * This file is part of PortaPack.

firmware/baseband/CMakeLists.txt

@@ -785,6 +785,15 @@ set(MODE_CPPSRC
 )
 DeclareTargets(PTSK time_sink)
 
+
+### Tetra Rx
+
+set(MODE_CPPSRC
+	proc_tetra.cpp
+)
+DeclareTargets(PTET tetra_rx)
+
+
 set(MODE_CPPSRC
 	sd_over_usb/proc_sd_over_usb.cpp
 

firmware/baseband/proc_epirb_tx.cpp

@@ -27,6 +27,70 @@
 #include <cstdint>
 #include <cstring>
 
+uint8_t EPIRBTXProcessor::get_frame_bit(uint16_t bit_pos) const {
+    // Skip first 6 bits (padding for 250 bits -> 32 bytes)
+    bit_pos += 6;
+    if (bit_pos >= frame_sgb_bits_len) {
+        return 0;
+    }
+    const uint8_t byte_value = frame_data[bit_pos >> 3];
+    const uint8_t bit_offset = 7 - (bit_pos & 0x07);
+    return (byte_value >> bit_offset) & 0x01;
+}
+
+int8_t EPIRBTXProcessor::compute_sgb_chip_level(SGBChannelState& channel, bool q_channel) {
+    // Table 2.4 behavior: chip = PRN for bit 0, inverted PRN for bit 1.
+    // PRN generator (23-bit LFSR): out = reg[0], feedback = reg[0] XOR reg[18].
+    const uint8_t prn_chip = channel.prn_state & 0x01;
+
+    uint8_t info_bit = 0;
+    const uint32_t bit_in_channel = channel.chip_index / sgb_chips_per_bit;
+    if (bit_in_channel >= sgb_preamble_bits_per_channel) {
+        const uint32_t message_index = bit_in_channel - sgb_preamble_bits_per_channel;
+        if (message_index < (sgb_message_bits / 2)) {
+            const uint16_t frame_bit_pos = q_channel ? (message_index * 2) + 1 : (message_index * 2);
+            info_bit = get_frame_bit(frame_bit_pos);
+        }
+    }
+
+    const uint8_t xor_chip = info_bit ^ prn_chip;
+    const int8_t chip_level = xor_chip ? -sgb_chip_amplitude : sgb_chip_amplitude;
+
+    const uint8_t feedback = prn_chip ^ ((channel.prn_state >> 18) & 0x01);
+    channel.prn_state = (channel.prn_state >> 1) | (uint32_t(feedback) << 22);
+    channel.chip_index++;
+
+    return chip_level;
+}
+
+int8_t EPIRBTXProcessor::sample_sgb_channel(SGBChannelState& channel, bool q_channel) {
+    int8_t level = channel.chip_level;
+
+    if (channel.sample_in_chip == 0) {
+        if (channel.chip_index < sgb_segment_chips) {
+            channel.chip_level = compute_sgb_chip_level(channel, q_channel);
+            level = channel.chip_level;
+        } else {
+            level = 0;
+            channel.chip_level = 0;
+        }
+    }
+
+    channel.sample_in_chip++;
+    if (channel.sample_in_chip >= sgb_samples_per_chip) {
+        channel.sample_in_chip = 0;
+    }
+
+    return level;
+}
+
+void EPIRBTXProcessor::init_sgb_channel(SGBChannelState& channel, uint32_t initial_state) {
+    channel.prn_state = initial_state;
+    channel.chip_index = 0;
+    channel.sample_in_chip = 0;
+    channel.chip_level = 0;
+}
+
 /**
  * Processing method for this processor
  */
@@ -43,75 +107,92 @@ void EPIRBTXProcessor::execute(const buffer_c8_t& buffer) {
             shared_memory.application_queue.push(txprogress_message);
         }
 
-        if (mode_bpsk) {
-            // BPSK Manchester beacon signal
-            if (bpsk_pre_count < config_pre_count) {
-                // Pre-count state: send carrier only during pre-count
-                bpsk_pre_count++;
-                re = i_carrier;
-                im = q_carrier;
-            } else if (bpsk_post_count > 0) {
-                // Post-count: send carrier only during post-count
-                bpsk_post_count++;
-                re = i_carrier;
-                im = q_carrier;
-                if (bpsk_post_count >= config_post_count) {
-                    // End transmission here
-                    byte_index = 0;
-                    bpsk_post_count = 0;
-                    bpsk_pre_count = 0;
+        if (mode_406) {
+            if (mode_sgb) {
+                // 2G SGB DSSS-OQPSK signal
+                const int8_t i_sample = sample_sgb_channel(sgb_i, false);
+                const int8_t q_sample = (sgb_sample_counter < sgb_half_chip_samples)
+                                            ? 0
+                                            : sample_sgb_channel(sgb_q, true);
+
+                re = i_sample;
+                im = q_sample;
+
+                sgb_sample_counter++;
+                if (sgb_sample_counter >= sgb_total_samples) {
+                    sgb_sample_counter = 0;
                     end_of_transmission = true;
                 }
             } else {
-                if (sample_counter == 0 && manchester_half == false) {
-                    if (bit_index == 0) {
-                        // Read current byte
-                        current_byte = frame_data[byte_index];
-                        // Move to next byte
-                        byte_index++;
-                    }
-                    // Get current bit
-                    current_bit = (current_byte >> (7 - bit_index)) & 0x01;
-                }
-
-                // Manchester encoding
-                if (current_bit == 1) {
-                    // 1 = falling signal
-                    if (manchester_half == false) {
-                        re = i_pos;
-                        im = q_pos;
-                    } else {
-                        re = i_neg;
-                        im = q_neg;
+                // 1G BPSK Manchester beacon signal
+                if (bpsk_pre_count < config_pre_count) {
+                    // Pre-count state: send carrier only during pre-count
+                    bpsk_pre_count++;
+                    re = i_carrier;
+                    im = q_carrier;
+                } else if (bpsk_post_count > 0) {
+                    // Post-count: send carrier only during post-count
+                    bpsk_post_count++;
+                    re = i_carrier;
+                    im = q_carrier;
+                    if (bpsk_post_count >= config_post_count) {
+                        // End transmission here
+                        byte_index = 0;
+                        bpsk_post_count = 0;
+                        bpsk_pre_count = 0;
+                        end_of_transmission = true;
                     }
                 } else {
-                    // 0 = rising signal
-                    if (manchester_half == false) {
-                        re = i_neg;
-                        im = q_neg;
-                    } else {
-                        re = i_pos;
-                        im = q_pos;
+                    if (sample_counter == 0 && manchester_half == false) {
+                        if (bit_index == 0) {
+                            // Read current byte
+                            current_byte = frame_data[byte_index];
+                            // Move to next byte
+                            byte_index++;
+                        }
+                        // Get current bit
+                        current_bit = (current_byte >> (7 - bit_index)) & 0x01;
                     }
-                }
-                // Move to next sample
-                sample_counter++;
 
-                if (sample_counter >= samples_per_halfbit) {
-                    // Move to next half-bit
-                    sample_counter = 0;
-                    manchester_half = !manchester_half;
+                    // Manchester encoding
+                    if (current_bit == 1) {
+                        // 1 = falling signal
+                        if (manchester_half == false) {
+                            re = i_pos;
+                            im = q_pos;
+                        } else {
+                            re = i_neg;
+                            im = q_neg;
+                        }
+                    } else {
+                        // 0 = rising signal
+                        if (manchester_half == false) {
+                            re = i_neg;
+                            im = q_neg;
+                        } else {
+                            re = i_pos;
+                            im = q_pos;
+                        }
+                    }
+                    // Move to next sample
+                    sample_counter++;
 
-                    // Next bit after two half bits
-                    if (manchester_half == false) {
-                        // Move to next bit
-                        bit_index++;
-                        if (bit_index >= 8) {
-                            // End of byte
-                            bit_index = 0;
-                            if (byte_index >= frame_data_len) {
-                                // End of frame => move to post-count
-                                bpsk_post_count = 1;
+                    if (sample_counter >= samples_per_halfbit) {
+                        // Move to next half-bit
+                        sample_counter = 0;
+                        manchester_half = !manchester_half;
+
+                        // Next bit after two half bits
+                        if (manchester_half == false) {
+                            // Move to next bit
+                            bit_index++;
+                            if (bit_index >= 8) {
+                                // End of byte
+                                bit_index = 0;
+                                if (byte_index >= frame_data_len) {
+                                    // End of frame => move to post-count
+                                    bpsk_post_count = 1;
+                                }
                             }
                         }
                     }
@@ -154,26 +235,51 @@ void EPIRBTXProcessor::on_message(const Message* const msg) {
         case Message::ID::EPIRBTXData: {
             const auto message = *reinterpret_cast<const EPIRBTXDataMessage*>(msg);
             // Check transmission mode
-            mode_bpsk = message.mode_bpsk;
-            if (mode_bpsk) {
-                // BPSK mode for 406 frame
+            mode_406 = message.mode_406;
+            if (mode_406) {
+                // 406 MHz frame mode:
+                // - FGB if data_len <= 144 bits (i.e. 18 bytes)
+                // - SGB if data_len > 144 bits (actually 250 bits (i.e. 32 bytes))
                 config_pre_count = message.pre_count;
                 config_post_count = message.post_count;
+
+                mode_sgb = message.data_len > frame_data_fgb_max_len;  // SGB if data_len > 18 bytes (144 bits)
                 frame_data_len = message.data_len;
+
+                if (mode_sgb) {
+                    frame_sgb_bits_len = std::min<uint16_t>(((uint16_t)message.data_len) * 8, sgb_message_bits);  // Total bits in the frame
+                    frame_data_len = std::min<uint8_t>(frame_data_len, frame_data_sgb_len);
+                    // Detect self-test mode: bit 5 (1 based index as per specification) of message.data[0]
+                    mode_sgb_selftest = (message.data[0] >> 3) & 0x01;
+                } else {
+                    frame_data_len = std::min<uint8_t>(frame_data_len, frame_data_fgb_max_len);
+                }
+
                 // Get the frame data from the message
-                memcpy(frame_data, message.data, std::min(frame_data_len, EPIRBTXDataMessage::max_len));
-                // Init BPSK sequencer
-                sample_counter = 0;
-                bpsk_pre_count = 0;
-                bpsk_post_count = 0;
-                bit_index = 0;
-                byte_index = 0;
-                current_byte = 0;
-                current_bit = 0;
+                memcpy(frame_data, message.data, frame_data_len);
+
+                if (mode_sgb) {
+                    // Init SGB DSSS-OQPSK sequencer
+                    sgb_sample_counter = 0;
+                    const uint32_t init_i = mode_sgb_selftest ? sgb_init_selftest_i : sgb_init_normal_i;
+                    const uint32_t init_q = mode_sgb_selftest ? sgb_init_selftest_q : sgb_init_normal_q;
+                    init_sgb_channel(sgb_i, init_i);
+                    init_sgb_channel(sgb_q, init_q);
+                } else {
+                    // Init FGB BPSK sequencer
+                    sample_counter = 0;
+                    bpsk_pre_count = 0;
+                    bpsk_post_count = 0;
+                    bit_index = 0;
+                    byte_index = 0;
+                    current_byte = 0;
+                    current_bit = 0;
+                }
             } else {
                 // AM mode for 121.5 signal => init AM sequencer
                 sweep_phase = 0;
                 audio_phase = 0;
+                mode_sgb = false;
             }
             // Tell the processor to start
             configured = true;

firmware/baseband/proc_epirb_tx.hpp

@@ -26,6 +26,7 @@
 #include "baseband_thread.hpp"
 #include "portapack_shared_memory.hpp"
 #include "tonesets.hpp"
+#include <algorithm>
 #include <cmath>
 
 /**
@@ -42,8 +43,12 @@ class EPIRBTXProcessor : public BasebandProcessor {
    private:
     // True when the processor has received a configuration message from the app
     bool configured{false};
-    // True when in BPSK transmission mode, false for AM transmission mode
-    bool mode_bpsk{false};
+    // True when in 406 MHz transmission mode, false for AM transmission mode
+    bool mode_406{false};
+    // True when current 406 frame is a 2nd generation DSSS-OQPSK frame
+    bool mode_sgb{false};
+    // True when in self-test mode (detected from bit 5 of message.data)
+    bool mode_sgb_selftest{true};
 
     // True when the transmission has to be stopped (e.g. at the end of a frame)
     bool end_of_transmission{};
@@ -55,10 +60,15 @@ class EPIRBTXProcessor : public BasebandProcessor {
     // Configured post-count value: used to continue the carrier for config_post_count samples after the end of a frame
     uint32_t config_post_count = 0;
 
-    // Data of the frame to send in BPSK mode
-    uint8_t frame_data[18]{0};
-    // Size of the frame to send in BPSK mode
+    // Data of the frame to send in 406 mode (FGB BPSK or SGB DSSS-OQPSK)
+    static constexpr uint8_t frame_data_max_len = 32;
+    static constexpr uint8_t frame_data_fgb_max_len = 18;
+    static constexpr uint8_t frame_data_sgb_len = 32;  // ceil(250 / 8)
+    uint8_t frame_data[frame_data_max_len]{0};
+    // Size of the frame to send in bytes
     uint8_t frame_data_len = 0;
+    // Size of the frame payload in bits
+    uint16_t frame_sgb_bits_len = 0;
 
     // BPSK parameters: Target phase +/-1.1 RAD as per COSPAS/SARSAT specifications
     static constexpr float phase_rad = 1.1f;
@@ -89,6 +99,40 @@ class EPIRBTXProcessor : public BasebandProcessor {
     // Position in the current manchester bit
     bool manchester_half = false;  // false = first half
 
+    // 2G SGB DSSS-OQPSK parameters
+    static constexpr uint16_t sgb_message_bits = 256;  // 250 bits of data + 6 bits padding
+    static constexpr uint32_t sgb_chip_rate = 38400;
+    static constexpr uint32_t sgb_chips_per_bit = 256;
+    static constexpr uint32_t sgb_preamble_bits_per_channel = 25;
+    static constexpr uint32_t sgb_bits_per_channel = 150;
+    static constexpr uint32_t sgb_segment_chips = 38400;
+    static constexpr uint32_t sgb_samples_per_chip = TONES_SAMPLERATE / sgb_chip_rate;
+    static constexpr uint32_t sgb_half_chip_samples = sgb_samples_per_chip / 2;
+    // SGB burst duration is exactly 1 second.
+    static constexpr uint32_t sgb_total_samples = sgb_segment_chips * sgb_samples_per_chip;
+    static constexpr int8_t sgb_chip_amplitude = 90;
+
+    static constexpr uint32_t sgb_init_normal_i = 0x1;
+    static constexpr uint32_t sgb_init_normal_q = 0x1AC1FC;
+    static constexpr uint32_t sgb_init_selftest_i = 0x52C9F0;
+    static constexpr uint32_t sgb_init_selftest_q = 0x3CE928;
+
+    struct SGBChannelState {
+        uint32_t prn_state = 1;
+        uint32_t chip_index = 0;
+        uint32_t sample_in_chip = 0;
+        int8_t chip_level = 0;
+    };
+
+    SGBChannelState sgb_i{};
+    SGBChannelState sgb_q{};
+    uint32_t sgb_sample_counter = 0;
+
+    uint8_t get_frame_bit(uint16_t bit_pos) const;
+    int8_t compute_sgb_chip_level(SGBChannelState& channel, bool q_channel);
+    int8_t sample_sgb_channel(SGBChannelState& channel, bool q_channel);
+    void init_sgb_channel(SGBChannelState& channel, uint32_t initial_state);
+
     // 127.5 AM signal parameters
     static const uint32_t sweep_rate = 3;  // 3 Hz
     static const uint32_t f_min = 300;     // Sweep min frequency (Hz)

firmware/baseband/proc_tetra.cpp

@@ -0,0 +1,239 @@
+#include "proc_tetra.hpp"
+#include "portapack_shared_memory.hpp"
+#include "sine_table_int8.hpp"
+#include "event_m4.hpp"
+
+#include <algorithm>
+
+TetraProcessor::TetraProcessor() {
+    decim_0.configure(taps_25k0_tetra_decim_0.taps);
+    decim_1.configure(taps_25k0_tetra_decim_1.taps);
+
+    baseband_thread.start();
+    configured = true;
+}
+
+void TetraProcessor::execute(const buffer_c8_t& buffer) {
+    if (!configured) return;
+
+    const auto decim_0_out = decim_0.execute(buffer, dst_buffer_0);
+    const auto channel_out = decim_1.execute(decim_0_out, dst_buffer_1);
+
+    feed_channel_stats(channel_out);
+
+    for (size_t i = 0; i < channel_out.count; i++) {
+        complex16_t sample = channel_out.p[i];
+
+        // Carrier PLL Rotation
+        uint8_t phase_idx = (pll_phase >> 24) & 0xFF;
+        uint8_t cos_idx = (phase_idx + 64) & 0xFF;
+        int16_t rotated_real = (sample.real() * sine_table_i8[cos_idx] - sample.imag() * sine_table_i8[phase_idx]) >> 7;
+        int16_t rotated_imag = (sample.real() * sine_table_i8[phase_idx] + sample.imag() * sine_table_i8[cos_idx]) >> 7;
+        complex16_t rotated_sample = {rotated_real, rotated_imag};
+
+        uint32_t old_phase = symbol_phase;
+        symbol_phase += symbol_phase_inc;
+
+        // Half-symbol timing
+        if ((old_phase < 0x80000000) && (symbol_phase >= 0x80000000)) {
+            mid_sample = rotated_sample;
+        }
+
+        // Full-symbol timing
+        if (symbol_phase < old_phase) {
+            prev_prompt = prompt_sample;
+            prompt_sample = rotated_sample;
+
+            // Gardner Timing Error Detector
+            int32_t err_i = (mid_sample.real() * (prompt_sample.real() - prev_prompt.real()));
+            int32_t err_q = (mid_sample.imag() * (prompt_sample.imag() - prev_prompt.imag()));
+            int32_t timing_error = err_i + err_q;
+
+            const int64_t delta = (timing_error >> 16);
+            int64_t inc = static_cast<int64_t>(symbol_phase_inc) + delta;
+            // CLAMPING: Prevent the NCO from drifting into the noise!
+            if (inc < 1600000000) inc = 1600000000;
+            if (inc > 1620000000) inc = 1620000000;
+            symbol_phase_inc = static_cast<uint32_t>(inc);
+
+            process_symbol(prompt_sample);
+        }
+    }
+}
+
+void TetraProcessor::process_symbol(const complex16_t& current_sample) {
+    // Differential phase demodulation
+    int32_t dot_i = (current_sample.real() * delay_sample.real()) + (current_sample.imag() * delay_sample.imag());
+    int32_t dot_q = (current_sample.imag() * delay_sample.real()) - (current_sample.real() * delay_sample.imag());
+    delay_sample = current_sample;
+
+    // Phase error for Carrier PLL
+    int32_t phase_err = 0;
+    if (dot_i > 0 && dot_q > 0)
+        phase_err = dot_q - dot_i;
+    else if (dot_i < 0 && dot_q > 0)
+        phase_err = dot_q + dot_i;
+    else if (dot_i < 0 && dot_q < 0)
+        phase_err = -dot_q + dot_i;
+    else
+        phase_err = -dot_q - dot_i;
+
+    pll_freq += (phase_err * pll_beta) >> 8;
+
+    // CLAMPING: Prevent frequency tracking from flying away
+    if (pll_freq > 400000000) pll_freq = 400000000;
+    if (pll_freq < -400000000) pll_freq = -400000000;
+
+    pll_phase += ((phase_err * pll_alpha) >> 8) + pll_freq;
+
+    // ETSI EN 300 392-2 pi/4 DQPSK bit mapping
+    uint8_t dibit = 0;
+    if (dot_i > 0 && dot_q > 0)
+        dibit = 0b00;
+    else if (dot_i < 0 && dot_q > 0)
+        dibit = 0b01;
+    else if (dot_i < 0 && dot_q < 0)
+        dibit = 0b11;
+    else
+        dibit = 0b10;
+
+    // Insert bits into history buffer and sync register
+    for (int b = 1; b >= 0; b--) {
+        uint8_t bit_val = (dibit >> b) & 0x01;
+
+        size_t byte_idx = (history_write_idx / 8) % 128;
+        if ((history_write_idx % 8) == 0) bit_history_buffer[byte_idx] = 0;
+
+        bit_history_buffer[byte_idx] |= (bit_val << (7 - (history_write_idx % 8)));
+        history_write_idx = (history_write_idx + 1) % 1024;
+        bit_count++;
+
+        sync_register = ((sync_register << 1) | bit_val);
+
+        uint64_t sync =
+            sync_register & 0x3FFFFFFFFFULL;
+
+        uint32_t err_pos =
+            __builtin_popcountll(sync ^ Y_SYNC);
+
+        uint32_t err_neg =
+            __builtin_popcountll(
+                sync ^
+                (~Y_SYNC & 0x3FFFFFFFFFULL));
+
+        if (!pending_dsb.valid && bit_count >= Y_SYNC_BITS && (err_pos <= 4 || err_neg <= 4)) {
+            const uint64_t sync_start = bit_count - Y_SYNC_BITS;
+
+            if (sync_start >= SYNC_OFFSET) {
+                pending_dsb.valid = true;
+                pending_dsb.burst_start = sync_start - SYNC_OFFSET;
+                pending_dsb.ready_at = pending_dsb.burst_start + BURST_BITS;
+                pending_dsb.inverted = err_neg < err_pos;
+                pending_dsb.errors = std::min(err_pos, err_neg);
+            }
+        }
+
+        if (ENABLE_DNB_MESSAGES) {
+            const uint32_t train_mask = (1UL << DNB_TRAIN_BITS) - 1;
+            const uint32_t train = sync_register & train_mask;
+            const uint32_t n_err_pos = __builtin_popcount(train ^ N_SYNC);
+            const uint32_t n_err_neg = __builtin_popcount(train ^ (~N_SYNC & train_mask));
+            const uint32_t p_err_pos = __builtin_popcount(train ^ P_SYNC);
+            const uint32_t p_err_neg = __builtin_popcount(train ^ (~P_SYNC & train_mask));
+
+            if (!pending_dnb.valid && bit_count >= DNB_TRAIN_BITS && (n_err_pos <= 1 || n_err_neg <= 1 || p_err_pos <= 1 || p_err_neg <= 1)) {
+                const bool p_train = std::min(p_err_pos, p_err_neg) < std::min(n_err_pos, n_err_neg);
+                const uint32_t pos_err = p_train ? p_err_pos : n_err_pos;
+                const uint32_t neg_err = p_train ? p_err_neg : n_err_neg;
+
+                const uint64_t train_start = bit_count - DNB_TRAIN_BITS;
+                const uint64_t block1_start = train_start - 230;
+                const uint64_t block2_start = train_start + 38;
+
+                if (train_start >= 230) {
+                    pending_dnb.valid = true;
+                    pending_dnb.block1_start = block1_start;
+                    pending_dnb.block2_start = block2_start;
+                    pending_dnb.ready_at = block2_start + DNB_BLK_BITS;
+                    pending_dnb.inverted = neg_err < pos_err;
+                    pending_dnb.p_train = p_train;
+                    pending_dnb.errors = std::min(pos_err, neg_err);
+                }
+            }
+
+            if (pending_dnb.valid && bit_count >= pending_dnb.ready_at)
+                push_dnb_to_ui();
+        }
+
+        if (pending_dsb.valid && bit_count >= pending_dsb.ready_at)
+            push_burst_to_ui();
+    }
+}
+
+uint8_t TetraProcessor::history_bit(uint64_t absolute_bit) const {
+    const size_t p = absolute_bit % 1024;
+
+    return (bit_history_buffer[p >> 3] >>
+            (7 - (p & 7))) &
+           1;
+}
+
+void TetraProcessor::push_burst_to_ui() {
+    std::array<uint8_t, 63> burst{};
+
+    for (size_t i = 0; i < BURST_BITS; i++) {
+        uint8_t b = history_bit(pending_dsb.burst_start + i);
+
+        if (pending_dsb.inverted)
+            b ^= 1;
+
+        burst[i >> 3] |=
+            b << (7 - (i & 7));
+    }
+
+    shared_memory.application_queue.push(
+        TetraBurstMessage(
+            burst.data(),
+            pending_dsb.inverted,
+            pending_dsb.errors));
+
+    pending_dsb.valid = false;
+}
+
+void TetraProcessor::push_dnb_to_ui() {
+    std::array<uint8_t, 54> burst{};
+
+    for (size_t i = 0; i < DNB_BLK_BITS; i++) {
+        uint8_t b = history_bit(pending_dnb.block1_start + i);
+        if (pending_dnb.inverted)
+            b ^= 1;
+        burst[i >> 3] |= b << (7 - (i & 7));
+    }
+
+    for (size_t i = 0; i < DNB_BLK_BITS; i++) {
+        uint8_t b = history_bit(pending_dnb.block2_start + i);
+        if (pending_dnb.inverted)
+            b ^= 1;
+        const size_t out_bit = DNB_BLK_BITS + i;
+        burst[out_bit >> 3] |= b << (7 - (out_bit & 7));
+    }
+
+    shared_memory.application_queue.push(
+        TetraDnbMessage(
+            burst.data(),
+            pending_dnb.inverted,
+            pending_dnb.errors,
+            pending_dnb.p_train));
+
+    pending_dnb.valid = false;
+}
+
+void TetraProcessor::on_message(const Message* const msg) {
+    (void)msg;
+}
+
+int main() {
+    EventDispatcher event_dispatcher{std::make_unique<TetraProcessor>()};
+    event_dispatcher.run();
+    return 0;
+}

firmware/baseband/proc_tetra.hpp

@@ -0,0 +1,94 @@
+#ifndef __PROC_TETRA_H__
+#define __PROC_TETRA_H__
+
+#include "baseband_processor.hpp"
+#include "baseband_thread.hpp"
+#include "message.hpp"
+#include "dsp_decimate.hpp"
+#include "dsp_fir_taps.hpp"
+#include "rssi_thread.hpp"
+
+#include <cstdint>
+#include <array>
+#include <memory>
+
+class TetraProcessor : public BasebandProcessor {
+   public:
+    TetraProcessor();
+
+    void execute(const buffer_c8_t& buffer) override;
+    void on_message(const Message* const msg);
+
+   private:
+    static constexpr size_t baseband_fs = 3072000;
+    static constexpr size_t channel_fs = 48000;
+    static constexpr uint32_t symbol_rate = 18000;
+
+    std::array<complex16_t, 512> dst_0{};
+    const buffer_c16_t dst_buffer_0{dst_0.data(), dst_0.size()};
+
+    std::array<complex16_t, 512> dst_1{};
+    const buffer_c16_t dst_buffer_1{dst_1.data(), dst_1.size()};
+
+    dsp::decimate::FIRC8xR16x24FS4Decim8 decim_0{};
+    dsp::decimate::FIRC16xR16x32Decim8 decim_1{};
+
+    // PLL and Timing
+    uint32_t symbol_phase{0};
+    uint32_t symbol_phase_inc{(uint32_t)((symbol_rate * 4294967296.0) / channel_fs)};
+
+    complex16_t prompt_sample{0, 0};
+    complex16_t prev_prompt{0, 0};
+    complex16_t mid_sample{0, 0};
+    complex16_t delay_sample{0, 0};
+    static constexpr uint32_t BURST_BITS = 500;
+    static constexpr uint32_t Y_SYNC_BITS = 38;
+    static constexpr uint32_t SYNC_OFFSET = 214;
+    static constexpr uint64_t Y_SYNC = 0x30673A7067ULL;
+    static constexpr uint32_t DNB_TRAIN_BITS = 22;
+    static constexpr uint32_t DNB_BLK_BITS = 216;
+    static constexpr uint32_t DNB_TRAIN_TO_BLK2 = 22;
+    static constexpr uint32_t DNB_TOTAL_T5_BITS = DNB_BLK_BITS * 2;
+    static constexpr uint32_t N_SYNC = 0x343A74UL;
+    static constexpr uint32_t P_SYNC = 0x1E90DEUL;
+    static constexpr bool ENABLE_DNB_MESSAGES = true;
+
+    uint32_t pll_phase{0};
+    int32_t pll_freq{0};
+    static constexpr int32_t pll_alpha = 150;
+    static constexpr int32_t pll_beta = 2;
+
+    uint64_t sync_register{0};
+    std::array<uint8_t, 128> bit_history_buffer{};
+    size_t history_write_idx{0};
+    uint64_t bit_count{0};
+    bool configured{false};
+
+    struct PendingDnb {
+        bool valid{false};
+        uint64_t block1_start{0};
+        uint64_t block2_start{0};
+        uint64_t ready_at{0};
+        bool inverted{false};
+        bool p_train{false};
+        uint8_t errors{0};
+    } pending_dnb{};
+
+    struct PendingDsb {
+        bool valid{false};
+        uint64_t burst_start{0};
+        uint64_t ready_at{0};
+        bool inverted{false};
+        uint8_t errors{0};
+    } pending_dsb{};
+
+    void process_symbol(const complex16_t& sample);
+    uint8_t history_bit(uint64_t absolute_bit) const;
+    void push_burst_to_ui();
+    void push_dnb_to_ui();
+
+    BasebandThread baseband_thread{baseband_fs, this, baseband::Direction::Receive, false};
+    RSSIThread rssi_thread{};
+};
+
+#endif  // __PROC_TETRA_H__

firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.cpp

@@ -60,8 +60,8 @@ const PALConfig pal_default_config = {
             = boot_bit(p1_ctrl0, 0)      // P2_10: P1_CTRL0, start low
               | boot_bit(clkin_ctrl, 0)  // P1_20: CLKIN_CTRL - start low
 #else
-            = boot_bit(amp_bypass, 1)  // P2_10: AMP_BYPASS
-              | (1 << 15)              // P1_20: CS_XCVR
+            = boot_bit(amp_bypass, 1)        // P2_10: AMP_BYPASS
+              | boot_bit(max283x_select, 1)  // P1_20: !CS_XCVR
 #endif
               | boot_bit(dfu_boot_0, 0)  // P1_1:  10K PU, BOOT0
               | boot_bit(dfu_boot_1, 0)  // P1_2:  10K PD, BOOT1
@@ -83,8 +83,8 @@ const PALConfig pal_default_config = {
             = boot_bit(p1_ctrl0, 1)      // P2_10: P1_CTRL0
               | boot_bit(clkin_ctrl, 1)  // P1_20: CLKIN_CTRL
 #else
-            = boot_bit(amp_bypass, 1)  // P2_10: AMP_BYPASS
-              | (1 << 15)              // P1_20: CS_XCVR
+            = boot_bit(amp_bypass, 1)        // P2_10: AMP_BYPASS
+              | boot_bit(max283x_select, 1)  // P1_20: !CS_XCVR
 #endif
               | boot_bit(dfu_boot_0, 0)  // P1_1:  10K PU, BOOT0
               | boot_bit(dfu_boot_1, 0)  // P1_2:  10K PD, BOOT1
@@ -153,10 +153,9 @@ const PALConfig pal_default_config = {
         },
         {
             // GPIO2
-            .data = (1 << 14)  // P5_5:  MIXER_RESETX, 10K PU
+            .data = boot_bit(rffc5072_resetx, 1)  // P5_5:  !MIXER_RESETX
 #ifdef PRALINE
                     | (0 << 15)             // P5_6:  unused on PRALINE
-                    | (1 << 13)             // P5_4:  RFFC5072 ENX
                     | (0 << 12)             // P5_3:  unused on PRALINE
                     | (0 << 11)             // P5_2:  FPGA_CRESET
                     | (1 << 10)             // P5_1:  FPGA_SPI_CS
@@ -169,9 +168,7 @@ const PALConfig pal_default_config = {
                     | boot_bit(led_rx, 1)   // P4_2:  LED2 (RX)
                     | boot_bit(led_usb, 1)  // P4_1:  LED1 (USB)
 #else
-                    | boot_bit(tx_amp, 0)  // P5_6:  TX_AMP
-
-                    | (1 << 13)               // P5_4:  MIXER_ENX, 10K PU
+                    | boot_bit(tx_amp, 0)     // P5_6:  TX_AMP
                     | boot_bit(rx_mix_bp, 1)  // P5_3:  RX_MIX_BP
                     | boot_bit(tx_mix_bp, 0)  // P5_2:  TX_MIX_BP
                     | boot_bit(lpf, 0)        // P5_1:  LPF
@@ -184,13 +181,13 @@ const PALConfig pal_default_config = {
                     | boot_bit(led_usb, 0)    // P4_1:  LED1 (USB)
 #endif
 
-                    | (1 << 7)  // P5_7:  CS_AD
-                    | (0 << 5)  // P4_5:  RXENABLE
+                    | boot_bit(rffc5072_select, 1)  // P5_4:  !MIXER_ENX
+                    | (1 << 7)                      // P5_7:  CS_AD
+                    | (0 << 5)                      // P4_5:  RXENABLE
             ,
             .dir =
 #ifdef PRALINE
                 (1 << 15)    // P5_6:  unused on PRALINE
-                | (1 << 13)  // P5_4:  RFFC5072 ENX
                 | (1 << 12)  // P5_3:  unused on PRALINE
                 | (1 << 11)  // P5_2:  FPGA_CRESET
                 | (1 << 10)  // P5_1:  FPGA_SPI_CS
@@ -200,22 +197,22 @@ const PALConfig pal_default_config = {
                 | (0 << 3)   // P4_3:  VBUSCTRL input
                 | (0 << 6)   // P4_6:  Input
 #else
-                boot_bit(tx_amp, 1)       // P5_6:  TX_AMP
-                | (1 << 13)               // P5_4:  MIXER_ENX, 10K PU
-                | boot_bit(rx_mix_bp, 1)  // P5_3:  RX_MIX_BP
-                | boot_bit(tx_mix_bp, 1)  // P5_2:  TX_MIX_BP
-                | boot_bit(lpf, 1)        // P5_1:  LPF
-                | (0 << 9)                // P5_0:  Varies by revision
-                | boot_bit(hpf, 1)        // P4_0:  HPF
-                | boot_bit(sgpio_9, 0)    // P4_3:  SGPIO9, HOST_CAPTURE
-                | (1 << 6)                // P4_6:  XCVR_EN, 10K PD
+                boot_bit(tx_amp, 1)            // P5_6:  TX_AMP
+                | boot_bit(rx_mix_bp, 1)       // P5_3:  RX_MIX_BP
+                | boot_bit(tx_mix_bp, 1)       // P5_2:  TX_MIX_BP
+                | boot_bit(lpf, 1)             // P5_1:  LPF
+                | (0 << 9)                     // P5_0:  Varies by revision
+                | boot_bit(hpf, 1)             // P4_0:  HPF
+                | boot_bit(sgpio_9, 0)         // P4_3:  SGPIO9, HOST_CAPTURE
+                | boot_bit(max283x_enable, 1)  // P4_6:  XCVR_EN, 10K PD
 #endif
-                | (1 << 14)             // P5_5:  MIXER_RESETX, 10K PU
-                | boot_bit(led_tx, 1)   // P6_12: LED3 (TX)
-                | (1 << 7)              // P5_7:  CS_AD
-                | (1 << 5)              // P4_5:  RXENABLE
-                | boot_bit(led_rx, 1)   // P4_2:  LED2 (RX)
-                | boot_bit(led_usb, 1)  // P4_1:  LED1 (USB)
+                | boot_bit(rffc5072_select, 1)  // P5_4:  !MIXER_ENX
+                | boot_bit(rffc5072_resetx, 1)  // P5_5:  !MIXER_RESETX
+                | boot_bit(led_tx, 1)           // P6_12: LED3 (TX)
+                | (1 << 7)                      // P5_7:  CS_AD
+                | (1 << 5)                      // P4_5:  RXENABLE
+                | boot_bit(led_rx, 1)           // P4_2:  LED2 (RX)
+                | boot_bit(led_usb, 1)          // P4_1:  LED1 (USB)
         },
         {
             // GPIO3
@@ -233,14 +230,15 @@ const PALConfig pal_default_config = {
                     | (0 << 6)                   // P6_10: unused on PRALINE
                     | boot_bit(p1_ctrl2, 0)      // P6_9:  P1_CTRL2
                     | boot_bit(aux_power_oc, 0)  // P6_11: AUX overcurrent
+                    | boot_bit(sct_clk_in, 0)    // P6_4:  SCT clock input
 #else
-                    | (1 << 4)                 // P6_5:  HackRF CPLD.TMS(I)
-                    | boot_bit(vregmode, 1)    // P6_11: VREGMODE
-                    | (0 << 6)                 // P6_10: Varies by revision
-                    | boot_bit(sgpio_4, 1)     // P6_3:  SGPIO4
-                    | boot_bit(tx_amp_pwr, 1)  // P6_9:  !TX_AMP_PWR, 10K PU
+                    | (1 << 4)                     // P6_5:  HackRF CPLD.TMS(I)
+                    | boot_bit(vregmode, 1)        // P6_11: VREGMODE
+                    | (0 << 6)                     // P6_10: Varies by revision
+                    | boot_bit(sgpio_4, 1)         // P6_3:  SGPIO4
+                    | boot_bit(tx_amp_pwr, 1)      // P6_9:  !TX_AMP_PWR, 10K PU
+                    | boot_bit(rffc5072_sdata, 0)  // P6_4:  MIXER_SDATA
 #endif
-                    | (1 << 3)  // P6_4:  MIXER_SDATA
                     | (1 << 1)  // P6_2:  HackRF CPLD.TDI(I)
                     | (1 << 0)  // P6_1:  HackRF CPLD.TCK(I)
             ,
@@ -258,14 +256,15 @@ const PALConfig pal_default_config = {
                    | boot_bit(mix_bypass, 1)    // P6_3:  MIX_ENABLE_N
                    | (0 << 6)                   // P6_10: unused on PRALINE
                    | boot_bit(p1_ctrl2, 1)      // P6_9:  P1_CTRL2
+                   | boot_bit(sct_clk_in, 0)    // P6_4:  SCT clock input
 #else
-                   | boot_bit(vregmode, 1)    // P6_11: VREGMODE
-                   | (0 << 6)                 // P6_10: Varies by revision
-                   | boot_bit(sgpio_4, 0)     // P6_3:  SGPIO4
-                   | boot_bit(tx_amp_pwr, 1)  // P6_9:  !TX_AMP_PWR, 10K PU
+                   | boot_bit(vregmode, 1)        // P6_11: VREGMODE
+                   | (0 << 6)                     // P6_10: Varies by revision
+                   | boot_bit(sgpio_4, 0)         // P6_3:  SGPIO4
+                   | boot_bit(tx_amp_pwr, 1)      // P6_9:  !TX_AMP_PWR, 10K PU
+                   | boot_bit(rffc5072_sdata, 1)  // P6_4:  MIXER_SDATA
 #endif
                    | (0 << 4)  // P6_5:  HackRF CPLD.TMS(I)
-                   | (0 << 3)  // P6_4:  MIXER_SDATA
                    | (0 << 1)  // P6_2:  HackRF CPLD.TDI(I)
                    | (0 << 0)  // P6_1:  HackRF CPLD.TCK(I)
         },
@@ -274,48 +273,48 @@ const PALConfig pal_default_config = {
             .data =
                 boot_bit(sgpio_8, 0)  // P9_6: SGPIO8, SGPIO_CLK, PRALINE: P8_0
 #ifdef PRALINE
-                | boot_bit(rf_amp_enable, 0)  // PA_2: RF_AMP_EN
-                | boot_bit(lpf, 0)            // PA_1: LPF_EN
-                | boot_bit(en_1v2, 0)         // P8_7: EN_1V2
-                | boot_bit(led_mcu, 1)        // P8_6: LED4
-                | boot_bit(sgpio_10, 1)       // P8_2: SGPIO10, HOST_DISABLE
-                | (0 << 5)                    // P8_5: VIN_IN_EN
-                | (0 << 4)                    // P8_4: VBUS_IN_EN
-                | boot_bit(VAA_en, 1)         // P8_1: !VAA_EN
-                | (0 << 10)                   // PA_3: Output GND
-                | (0 << 11)                   // P9_6: MAX2831 LD
-                | boot_bit(rf5072_mix_en, 0)  // P9_0: RF5072 enable
-                | (0 << 13)                   // P9_1: Output GND
-                | (0 << 14)                   // P9_2: RFFC5072 SDATA
-                | (0 << 3)                    // P8_3: Output GND
-                | boot_bit(sgpio_9, 1)        // P9_3: Capture Input
+                | boot_bit(rf_amp_enable, 0)   // PA_2: RF_AMP_EN
+                | boot_bit(lpf, 0)             // PA_1: LPF_EN
+                | boot_bit(en_1v2, 0)          // P8_7: EN_1V2
+                | boot_bit(led_mcu, 1)         // P8_6: LED4
+                | boot_bit(sgpio_10, 1)        // P8_2: SGPIO10, HOST_DISABLE
+                | (0 << 5)                     // P8_5: VIN_IN_EN
+                | (0 << 4)                     // P8_4: VBUS_IN_EN
+                | boot_bit(VAA_en, 1)          // P8_1: !VAA_EN
+                | (0 << 10)                    // PA_3: Output GND
+                | (0 << 11)                    // P9_6: MAX2831 LD
+                | boot_bit(rf5072_mix_en, 0)   // P9_0: RF5072 enable
+                | (0 << 13)                    // P9_1: Output GND
+                | boot_bit(rffc5072_sdata, 0)  // P9_2: RFFC5072 SDATA
+                | (0 << 3)                     // P8_3: Output GND
+                | boot_bit(sgpio_9, 1)         // P9_3: Capture Input
 #endif
             ,
             .dir =
                 boot_bit(sgpio_8, 0)  // P9_6: SGPIO8, SGPIO_CLK, PRALINE: P8_0
 #ifdef PRALINE
-                | boot_bit(rf_amp_enable, 1)  // PA_2: RF_AMP_EN
-                | boot_bit(lpf, 1)            // PA_1: LPF_EN
-                | boot_bit(en_1v2, 1)         // P8_7: EN_1V2
-                | boot_bit(led_mcu, 1)        // P8_6: LED4
-                | boot_bit(sgpio_10, 0)       // P8_2: SGPIO10, HOST_DISABLE
-                | (1 << 5)                    // P8_5: VIN_IN_EN
-                | (1 << 4)                    // P8_4: VBUS_IN_EN
-                | boot_bit(VAA_en, 1)         // P8_1: !VAA_EN
-                | (1 << 10)                   // PA_3: Output
-                | (0 << 11)                   // P9_6: MAX2831 LD
-                | boot_bit(rf5072_mix_en, 1)  // P9_0: RF5072 enable
-                | (1 << 13)                   // P9_1: Output
-                | (0 << 14)                   // P9_2: RFFC5072 SDATA (Bidirectional)
-                | (1 << 3)                    // P8_3: Output
-                | boot_bit(sgpio_9, 0)        // P9_3: Capture Input
+                | boot_bit(rf_amp_enable, 1)   // PA_2: RF_AMP_EN
+                | boot_bit(lpf, 1)             // PA_1: LPF_EN
+                | boot_bit(en_1v2, 1)          // P8_7: EN_1V2
+                | boot_bit(led_mcu, 1)         // P8_6: LED4
+                | boot_bit(sgpio_10, 0)        // P8_2: SGPIO10, HOST_DISABLE
+                | (1 << 5)                     // P8_5: VIN_IN_EN
+                | (1 << 4)                     // P8_4: VBUS_IN_EN
+                | boot_bit(VAA_en, 1)          // P8_1: !VAA_EN
+                | (1 << 10)                    // PA_3: Output
+                | (0 << 11)                    // P9_6: MAX2831 LD
+                | boot_bit(rf5072_mix_en, 1)   // P9_0: RF5072 enable
+                | (1 << 13)                    // P9_1: Output
+                | boot_bit(rffc5072_sdata, 1)  // P9_2: RFFC5072 SDATA (Bidirectional)
+                | (1 << 3)                     // P8_3: Output
+                | boot_bit(sgpio_9, 0)         // P9_3: Capture Input
 #endif
         },
         {
             // GPIO5
             .data =
 #ifdef PRALINE
-                (0 << 18)                        // P9_5: RFF5072 SCLK
+                boot_bit(rffc5072_clock, 0)      // P9_5: RFF5072 SCLK
                 | boot_bit(trigger_out, 0)       // P2_6: Trigger out
                 | (0 << 14)                      // P4_10: FPGA CDONE
                 | boot_bit(aux_power_enable, 1)  // P6_7: !3V3 AUX_ENABLE
@@ -332,12 +331,12 @@ const PALConfig pal_default_config = {
                 | (0 << 12)                      // P4_8: Output GND
                 | boot_bit(vregmode, 1)          // P4_9: TPS62410 VREGMODE
 #else
-                (1 << 18)                     // P9_5: HackRF CPLD.TDO(O)
-                | (0 << 6)                    // P2_6: MIXER_SCLK
-                | (1 << 14)                   // P4_10: SGPIO15, CPLD (unused)
-                | boot_bit(rx_mix_bypass, 1)  // P6_8: RX MIX BYPASS
-                | (1 << 13)                   // P4_9: SGPIO14, CPLD (unused)
-                | (0 << 12)                   // P4_8: Varies by revision
+                (1 << 18)                      // P9_5: HackRF CPLD.TDO(O)
+                | boot_bit(rffc5072_clock, 0)  // P2_6: MIXER_SCLK
+                | (1 << 14)                    // P4_10: SGPIO15, CPLD (unused)
+                | boot_bit(rx_mix_bypass, 1)   // P6_8: RX MIX BYPASS
+                | (1 << 13)                    // P4_9: SGPIO14, CPLD (unused)
+                | (0 << 12)                    // P4_8: Varies by revision
 #endif
                 | (1 << 11)                // P3_8: SPIFI_CS
                 | (1 << 10)                // P3_7: SPIFI_MOSI
@@ -352,7 +351,7 @@ const PALConfig pal_default_config = {
             ,
             .dir =
 #ifdef PRALINE
-                (1 << 18)                        // P9_5: RFF5072 SCLK
+                boot_bit(rffc5072_clock, 1)      // P9_5: RFF5072 SCLK
                 | boot_bit(trigger_out, 1)       // P2_6: Trigger out
                 | (0 << 14)                      // P4_10: FPGA CDONE
                 | boot_bit(aux_power_enable, 1)  // P6_7: !3V3 AUX_ENABLE
@@ -369,12 +368,12 @@ const PALConfig pal_default_config = {
                 | (1 << 12)                      // P4_8: Output
                 | boot_bit(vregmode, 1)          // P4_9: TPS62410 VREGMODE
 #else
-                (0 << 18)                     // P9_5: HackRF CPLD.TDO(O)
-                | (1 << 6)                    // P2_6: MIXER_SCLK
-                | (0 << 14)                   // P4_10: SGPIO15, CPLD
-                | boot_bit(rx_mix_bypass, 1)  // P6_8: RX MIX BYPASS
-                | (0 << 13)                   // P4_9: SGPIO14, CPLD
-                | (0 << 12)                   // P4_8: Varies by revision
+                (0 << 18)                      // P9_5: HackRF CPLD.TDO(O)
+                | boot_bit(rffc5072_clock, 1)  // P2_6: MIXER_SCLK
+                | (0 << 14)                    // P4_10: SGPIO15, CPLD
+                | boot_bit(rx_mix_bypass, 1)   // P6_8: RX MIX BYPASS
+                | (0 << 13)                    // P4_9: SGPIO14, CPLD
+                | (0 << 12)                    // P4_8: Varies by revision
 #endif
                 | (0 << 11)                // P3_8: SPIFI_CS
                 | (0 << 10)                // P3_7: SPIFI_MOSI
@@ -390,17 +389,17 @@ const PALConfig pal_default_config = {
         {
 // GPIO6
 #ifdef PRALINE
-            .data = (1 << 28)                  // PD_14: MAX2831 chip select
-                    | (0 << 29)                // PD_15: MAX2831 RXHP control RXHP low = 100 Hz HPF
-                    | (1 << 30)                // PD_16: MAX5865 chip select
-                    | (1 << 25)                // PD_11: RFFC5072 Lock Detect
-                    | boot_bit(trigger_in, 0)  // PD_12: TRIGGER IN
+            .data = boot_bit(max283x_select, 1)  // PD_14: !MAX2831 chip select
+                    | boot_bit(max2831_rxhp, 0)  // PD_15: MAX2831 RXHP control RXHP low = 100 Hz HPF
+                    | (1 << 30)                  // PD_16: MAX5865 chip select
+                    | (1 << 25)                  // PD_11: RFFC5072 Lock Detect
+                    | boot_bit(trigger_in, 0)    // PD_12: TRIGGER IN
             ,
-            .dir = (1 << 28)                  // PD_14: MAX2831 chip select
-                   | (1 << 29)                // PD_15: MAX2831 RXHP control
-                   | (1 << 30)                // PD_16: MAX5865 chip select
-                   | (0 << 25)                // PD_11: RFFC5072 Lock Detect
-                   | boot_bit(trigger_in, 0)  // PD_12: TRIGGER IN
+            .dir = boot_bit(max283x_select, 1)  // PD_14: !MAX2831 chip select
+                   | boot_bit(max2831_rxhp, 1)  // PD_15: MAX2831 RXHP control
+                   | (1 << 30)                  // PD_16: MAX5865 chip select
+                   | (0 << 25)                  // PD_11: RFFC5072 Lock Detect
+                   | boot_bit(trigger_in, 0)    // PD_12: TRIGGER IN
 #else
             .data = 0,
             .dir = 0
@@ -409,17 +408,17 @@ const PALConfig pal_default_config = {
         {
 // GPIO7
 #ifdef PRALINE
-            .data = (0 << 0)                 // PE_0: Output
-                    | (0 << 1)               // PE_1: MAX2831 !SHDN
-                    | (0 << 2)               // PE_2: MAX2831 RXTX
-                    | boot_bit(p2_ctrl0, 0)  // PE_3: P2_ctrl0
-                    | boot_bit(p2_ctrl1, 0)  // PE_4: P2_ctrl1
+            .data = (0 << 0)                            // PE_0: Output
+                    | boot_bit(max283x_enable, 0)       // PE_1: MAX2831 !SHDN
+                    | boot_bit(max2831_rxtx_enable, 0)  // PE_2: MAX2831 RXTX
+                    | boot_bit(p2_ctrl0, 0)             // PE_3: P2_ctrl0
+                    | boot_bit(p2_ctrl1, 0)             // PE_4: P2_ctrl1
             ,
-            .dir = (1 << 0)                 // PE_0: Output
-                   | (1 << 1)               // PE_1: MAX2831 !SHDN
-                   | (1 << 2)               // PE_2: MAX2831 RXTX
-                   | boot_bit(p2_ctrl0, 1)  // PE_3: P2_ctrl0
-                   | boot_bit(p2_ctrl1, 1)  // PE_4: P2_ctrl1
+            .dir = (1 << 0)                            // PE_0: Output
+                   | boot_bit(max283x_enable, 1)       // PE_1: MAX2831 !SHDN
+                   | boot_bit(max2831_rxtx_enable, 1)  // PE_2: MAX2831 RXTX
+                   | boot_bit(p2_ctrl0, 1)             // PE_3: P2_ctrl0
+                   | boot_bit(p2_ctrl1, 1)             // PE_4: P2_ctrl1
 #else
             .data = 0,
             .dir = 0
@@ -494,7 +493,7 @@ const PALConfig pal_default_config = {
         {map_sgpio_12.scu_port, map_sgpio_12.scu_pin, scu_config_normal_drive_t{.mode = map_sgpio_12.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // SGPIO12: HOST_INVERT(I)
 #ifdef PRALINE
 
-        {6, 4, scu_config_normal_drive_t{.mode = 1, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 1}},                                                                       // P6_4: SCT_CLK IN (Fast clock input, Mode 1)
+        {map_sct_clk_in.scu_port, map_sct_clk_in.scu_pin, scu_config_normal_drive_t{.mode = map_sct_clk_in.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 1}},     // P6_4: SCT_CLK IN (Fast clock input, Mode 1)
         {4, 10, scu_config_normal_drive_t{.mode = 7, .epd = 1, .epun = 1, .ehs = 0, .ezi = 1, .zif = 0}},                                                                      // P4_10: FPGA Config Done (Input GND)
         {map_trigger_in.scu_port, map_trigger_in.scu_pin, scu_config_normal_drive_t{.mode = map_trigger_in.gpio_mode, .epd = 1, .epun = 1, .ehs = 0, .ezi = 1, .zif = 0}},     // PD_12: TRIGGER IN (Input GND, Mode 4)
         {map_trigger_out.scu_port, map_trigger_out.scu_pin, scu_config_normal_drive_t{.mode = map_trigger_out.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},  // P2_6: TRIGGER
@@ -504,10 +503,7 @@ const PALConfig pal_default_config = {
 
         {4, 9, scu_config_normal_drive_t{.mode = 7, .epd = 0, .epun = 0, .ehs = 0, .ezi = 0, .zif = 0}},                                                                    // SGPIO14/BANK2F3M4: CPLD_P81
         {4, 10, scu_config_normal_drive_t{.mode = 7, .epd = 0, .epun = 0, .ehs = 0, .ezi = 0, .zif = 0}},                                                                   // SGPIO15/BANK2F3M6: CPLD_P78
-        {2, 6, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 1}},                                                                    // MIXER_SCLK/P31: 33pF, RFFC5072.SCLK(I)
         {4, 5, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                                                    // RXENABLE
-        {4, 6, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                                                    // XCVR_EN: 10K PD
-        {1, 20, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                                                   // P1_20 CS_XCVR: MAX2837.CS(I)
         {map_hpf.scu_port, map_hpf.scu_pin, scu_config_normal_drive_t{.mode = map_hpf.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                       // P4_0 HPF
         {map_rx_amp.scu_port, map_rx_amp.scu_pin, scu_config_normal_drive_t{.mode = map_rx_amp.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},              // P2_11 RX_AMP
         {map_rx_amp_pwr.scu_port, map_rx_amp_pwr.scu_pin, scu_config_normal_drive_t{.mode = map_rx_amp_pwr.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P2_12 !RX_AMP_PWR
@@ -515,43 +511,44 @@ const PALConfig pal_default_config = {
 #endif
 
         // RADIO & RF PATH (MAX2831, RFFC5072, Mixers, Switches, Amps)
-        {1, 3, scu_config_normal_drive_t{.mode = 5, .epd = 0, .epun = 0, .ehs = 0, .ezi = 1, .zif = 0}},                                               // P1_3 SSP1_MISO: MAX2837.DOUT(O)
-        {1, 4, scu_config_normal_drive_t{.mode = 5, .epd = 0, .epun = 0, .ehs = 0, .ezi = 0, .zif = 0}},                                               // P1_4 SSP1_MOSI: MAX2837.DIN(I)
-        {1, 19, scu_config_normal_drive_t{.mode = 1, .epd = 0, .epun = 0, .ehs = 0, .ezi = 1, .zif = 1}},                                              // P1_19 SSP1_SCK: MAX2837.SCLK(I)
-        {map_lpf.scu_port, map_lpf.scu_pin, scu_config_normal_drive_t{.mode = map_lpf.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P5_1 LPF
+        {1, 3, scu_config_normal_drive_t{.mode = 5, .epd = 0, .epun = 0, .ehs = 0, .ezi = 1, .zif = 0}},                                                                                // P1_3 SSP1_MISO: MAX2837.DOUT(O)
+        {1, 4, scu_config_normal_drive_t{.mode = 5, .epd = 0, .epun = 0, .ehs = 0, .ezi = 0, .zif = 0}},                                                                                // P1_4 SSP1_MOSI: MAX2837.DIN(I)
+        {1, 19, scu_config_normal_drive_t{.mode = 1, .epd = 0, .epun = 0, .ehs = 0, .ezi = 1, .zif = 1}},                                                                               // P1_19 SSP1_SCK: MAX2837.SCLK(I)
+        {map_lpf.scu_port, map_lpf.scu_pin, scu_config_normal_drive_t{.mode = map_lpf.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                   // P5_1 LPF
+        {map_rffc5072_clock.scu_port, map_rffc5072_clock.scu_pin, scu_config_normal_drive_t{.mode = map_rffc5072_clock.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 1}},  // P2_6: MIXER_SCLK/P31: 33pF, RFFC5072.SCLK(I) PRALINE: P9_5: RFFC5072 SCLK
+        {map_max283x_select.scu_port, map_max283x_select.scu_pin, scu_config_normal_drive_t{.mode = map_max283x_select.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},  // P1_20 CS_XCVR: MAX2837.CS(I), PRALINE: PD_14: MAX2831 CS
+        {map_max283x_enable.scu_port, map_max283x_enable.scu_pin, scu_config_normal_drive_t{.mode = map_max283x_enable.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},  // P4_6 max283x enable, PRALINE: PE_1: MAX2831 !SHDN
+
 #ifdef PRALINE
-        {5, 4, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 0, .ehs = 0, .ezi = 0, .zif = 0}},                                                                             // P5_4: RFFC ENX
-        {5, 5, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 0, .ehs = 0, .ezi = 0, .zif = 0}},                                                                             // P5_5: RFFC RESETX
-        {9, 5, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 1}},                                                                             // P9_5: RFFC5072 SCLK
-        {9, 2, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 0, .ehs = 1, .ezi = 1, .zif = 0}},                                                                             // P9_2: RFFC5072 DATA (Bidirectional)
-        {13, 11, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 0, .ehs = 0, .ezi = 1, .zif = 0}},                                                                           // PD_11: RFFC Lock Detect
-        {13, 14, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                                                           // PD_14: MAX2831 CS
-        {13, 15, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 1}},                                                                           // PD_15: MAX2831 RXHP
-        {13, 16, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                                                           // PD_16: MAX5864 CS
-        {14, 1, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                                                            // PE_1: MAX2831 !SHDN
-        {14, 2, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 1}},                                                                            // PE_2: MAX2831 RXTX
-        {map_p1_ctrl1.scu_port, map_p1_ctrl1.scu_pin, scu_config_normal_drive_t{.mode = map_p1_ctrl1.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                 // P6_8 P1_CTRL1 (Output GND, Mode 4)
-        {map_aa_en.scu_port, map_aa_en.scu_pin, scu_config_normal_drive_t{.mode = map_aa_en.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 0}},                          // P1_14: AA_EN
-        {map_rf5072_mix_en.scu_port, map_rf5072_mix_en.scu_pin, scu_config_normal_drive_t{.mode = map_rf5072_mix_en.gpio_mode, .epd = 1, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P9_0: RF5072 MIX EN
-        {9, 6, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 0, .ehs = 0, .ezi = 0, .zif = 0}},                                                                             // P9_6: MAX2831 LD Input
-        {map_tx_enable.scu_port, map_tx_enable.scu_pin, scu_config_normal_drive_t{.mode = map_tx_enable.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},              // P6_5: TX enable
-        {10, 1, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                                                            // PA_1: LPF enable
-        {10, 2, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                                                            // PA_2: RF amp enable
-        {map_mix_bypass.scu_port, map_mix_bypass.scu_pin, scu_config_normal_drive_t{.mode = map_mix_bypass.gpio_mode, .epd = 0, .epun = 0, .ehs = 1, .ezi = 0, .zif = 0}},           // P6_3: MIX_ENABLE_N
-        {map_rf_amp_enable.scu_port, map_rf_amp_enable.scu_pin, scu_config_normal_drive_t{.mode = map_rf_amp_enable.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // PA_2 RF_AMP_EN
+        {13, 11, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 0, .ehs = 0, .ezi = 1, .zif = 0}},                                                                                             // PD_11: RFFC Lock Detect
+        {map_max2831_rxhp.scu_port, map_max2831_rxhp.scu_pin, scu_config_normal_drive_t{.mode = map_max2831_rxhp.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 1}},                       // PD_15: MAX2831 RXHP
+        {13, 16, scu_config_normal_drive_t{.mode = 4, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                                                                             // PD_16: MAX5864 CS
+        {map_max2831_rxtx_enable.scu_port, map_max2831_rxtx_enable.scu_pin, scu_config_normal_drive_t{.mode = map_max2831_rxtx_enable.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 1}},  // PE_2: MAX2831 RXTX
+        {map_p1_ctrl1.scu_port, map_p1_ctrl1.scu_pin, scu_config_normal_drive_t{.mode = map_p1_ctrl1.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                   // P6_8 P1_CTRL1 (Output GND, Mode 4)
+        {map_aa_en.scu_port, map_aa_en.scu_pin, scu_config_normal_drive_t{.mode = map_aa_en.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 1, .zif = 0}},                                            // P1_14: AA_EN
+        {map_rf5072_mix_en.scu_port, map_rf5072_mix_en.scu_pin, scu_config_normal_drive_t{.mode = map_rf5072_mix_en.gpio_mode, .epd = 1, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                    // P9_0: RF5072 MIX EN
+        {9, 6, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 0, .ehs = 0, .ezi = 0, .zif = 0}},                                                                                               // P9_6: MAX2831 LD Input
+        {map_tx_enable.scu_port, map_tx_enable.scu_pin, scu_config_normal_drive_t{.mode = map_tx_enable.gpio_mode, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                // P6_5: TX enable
+        {10, 1, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                                                                              // PA_1: LPF enable
+        {10, 2, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 1, .ezi = 0, .zif = 0}},                                                                                              // PA_2: RF amp enable
+        {map_mix_bypass.scu_port, map_mix_bypass.scu_pin, scu_config_normal_drive_t{.mode = map_mix_bypass.gpio_mode, .epd = 0, .epun = 0, .ehs = 1, .ezi = 0, .zif = 0}},                             // P6_3: MIX_ENABLE_N
+        {map_rf_amp_enable.scu_port, map_rf_amp_enable.scu_pin, scu_config_normal_drive_t{.mode = map_rf_amp_enable.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                    // PA_2 RF_AMP_EN
 #else
-        {map_rx_mix_bp.scu_port, map_rx_mix_bp.scu_pin, scu_config_normal_drive_t{.mode = map_rx_mix_bp.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},              // P5_3 RX_MIX_BP
-        {5, 4, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                                                             // MIXER_ENX
-        {map_tx_amp.scu_port, map_tx_amp.scu_pin, scu_config_normal_drive_t{.mode = map_tx_amp.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                       // P5_6 TX_AMP
-        {5, 7, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                                                             // P5_7 CS_AD, PRALINE: RFFC5072 CS
-        {5, 5, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                                                             // MIXER_RESETX
-        {6, 4, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 0, .ehs = 0, .ezi = 1, .zif = 0}},                                                                             // MIXER_SDATA
+        {map_rx_mix_bp.scu_port, map_rx_mix_bp.scu_pin, scu_config_normal_drive_t{.mode = map_rx_mix_bp.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P5_3 RX_MIX_BP
+
+        {map_tx_amp.scu_port, map_tx_amp.scu_pin, scu_config_normal_drive_t{.mode = map_tx_amp.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P5_6 TX_AMP
+        {5, 7, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                                                        // P5_7 CS_AD, PRALINE: RFFC5072 CS
+
         {map_tx_mix_bypass.scu_port, map_tx_mix_bypass.scu_pin, scu_config_normal_drive_t{.mode = map_tx_mix_bypass.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P6_8 !TX MIX BYPASS
         {map_amp_bypass.scu_port, map_amp_bypass.scu_pin, scu_config_normal_drive_t{.mode = map_amp_bypass.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},           // P2_10 AMP_BYPASS
         {map_tx_amp_pwr.scu_port, map_tx_amp_pwr.scu_pin, scu_config_normal_drive_t{.mode = map_tx_amp_pwr.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},           // !TX_AMP_PWR
         {map_rx_mix_bypass.scu_port, map_rx_mix_bypass.scu_pin, scu_config_normal_drive_t{.mode = map_rx_mix_bypass.gpio_mode, .epd = 0, .epun = 0, .ehs = 1, .ezi = 0, .zif = 0}},  // P6_8 RX MIX BYPASS
 #endif
 
+        {map_rffc5072_select.scu_port, map_rffc5072_select.scu_pin, scu_config_normal_drive_t{.mode = map_rffc5072_select.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P5_4: MIXER_ENX
+        {map_rffc5072_resetx.scu_port, map_rffc5072_resetx.scu_pin, scu_config_normal_drive_t{.mode = map_rffc5072_resetx.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // MIXER_RESETX
+        {map_rffc5072_sdata.scu_port, map_rffc5072_sdata.scu_pin, scu_config_normal_drive_t{.mode = map_rffc5072_sdata.gpio_mode, .epd = 0, .epun = 0, .ehs = 1, .ezi = 1, .zif = 0}},     // P6_4: RFFC5072 DATA (Bidirectional) PRALINE P9_2
+
 // SAFE TERMINATION (Unused pins grounded to prevent noise & save power)
 
 #ifdef PRALINE
@@ -584,7 +581,7 @@ const PALConfig pal_default_config = {
         {map_isp.scu_port, map_isp.scu_pin, scu_config_normal_drive_t{.mode = map_isp.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},                       // P2_7: ISP: 10K PU, Unused
         {map_dfu_boot_0.scu_port, map_dfu_boot_0.scu_pin, scu_config_normal_drive_t{.mode = map_dfu_boot_0.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P1_1: 10K PU, BOOT0
         {map_dfu_boot_1.scu_port, map_dfu_boot_1.scu_pin, scu_config_normal_drive_t{.mode = map_dfu_boot_1.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}},  // P1_2: 10K PD, BOOT1
-        {map_dfu_button.scu_port, map_dfu_button.scu_pin, scu_config_normal_drive_t{.mode = map_dfu_button.gpio_mode, .epd = 1, .epun = 1, .ehs = 0, .ezi = 1, .zif = 1}},  // P2_8: BOOT2, DFU button
+        {map_dfu_button.scu_port, map_dfu_button.scu_pin, scu_config_normal_drive_t{.mode = map_dfu_button.gpio_mode, .epd = 1, .epun = 1, .ehs = 0, .ezi = 1, .zif = 1}},  // P2_8: 10K PD, BOOT2, DFU button
         {map_lcd_wrx.scu_port, map_lcd_wrx.scu_pin, scu_config_normal_drive_t{.mode = map_lcd_wrx.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 1, .zif = 0}},           // P2_9: 10K PD, BOOT3, PortaPack LCD_WRX
 
     }};

firmware/common/dsp_fir_taps.hpp

@@ -2070,4 +2070,20 @@ static constexpr fir_taps_complex<63> taps_1k5_LSB_channel = {
     }},
 };
 
+// TETRA 25kHz filters
+// IFIR wideband pre-filter: fs=3072000, pass=90000, decim=8, fout=384000
+constexpr fir_taps_real<24> taps_25k0_tetra_decim_0 = {
+    .low_frequency_normalized = -90000.0f / 3072000.0f,
+    .high_frequency_normalized = 90000.0f / 3072000.0f,
+    .transition_normalized = 160000.0f / 3072000.0f,
+    .taps = {{55, 122, 244, 424, 666, 965, 1308, 1669, 2019, 2321, 2544, 2663, 2663, 2544, 2321, 2019, 1669, 1308, 965, 666, 424, 244, 122, 55}},
+};
+// IFIR channel filter: fs=384000, pass=15000, decim=8, fout=48000
+constexpr fir_taps_real<32> taps_25k0_tetra_decim_1 = {
+    .low_frequency_normalized = -15000.0f / 384000.0f,
+    .high_frequency_normalized = 15000.0f / 384000.0f,
+    .transition_normalized = 25000.0f / 384000.0f,
+    .taps = {{2, -18, -60, -124, -198, -259, -267, -177, 53, 448, 1003, 1677, 2398, 3068, 3585, 3868, 3868, 3585, 3068, 2398, 1677, 1003, 448, 53, -177, -267, -259, -198, -124, -60, -18, 2}},
+};
+
 #endif /*__DSP_FIR_TAPS_H__*/

firmware/common/gpio.hpp

@@ -394,6 +394,17 @@ constexpr PinMap map_lpf{10, 1, 4, 8, 4};
 constexpr PinMap map_tx_enable{6, 5, 3, 4, 0};
 constexpr PinMap map_rf_amp_enable{10, 2, 4, 9, 0};
 constexpr PinMap map_pps_in_out{2, 5, 5, 5, 4};
+
+constexpr PinMap map_rffc5072_clock{9, 5, 5, 18, 4};
+constexpr PinMap map_rffc5072_sdata{9, 2, 4, 14, 0};
+
+constexpr PinMap map_sct_clk_in{6, 4, 3, 3, 1};
+
+constexpr PinMap map_max283x_select{13, 14, 6, 28, 4};
+constexpr PinMap map_max283x_enable{14, 1, 7, 1, 4};
+constexpr PinMap map_max2831_rxtx_enable{14, 2, 7, 2, 4};
+constexpr PinMap map_max2831_rxhp{13, 15, 6, 29, 4};
+
 // constexpr PinMap map_unused_1{2, 7, 0, 7, 0};
 
 #else
@@ -425,6 +436,13 @@ constexpr PinMap map_ant_bias{4, 4, 2, 4, 0};
 constexpr PinMap map_r9_mcu_clk_en{1, 1, 0, 8, 0};
 constexpr PinMap map_r9_clkout_en{1, 2, 0, 9, 0};
 constexpr PinMap map_r9_clkin_en{6, 7, 5, 15, 4};
+
+constexpr PinMap map_rffc5072_clock{2, 6, 5, 6, 4};
+constexpr PinMap map_rffc5072_sdata{6, 4, 3, 3, 0};
+
+constexpr PinMap map_max283x_select{1, 20, 0, 15, 0};
+constexpr PinMap map_max283x_enable{4, 6, 2, 6, 0};
+
 #endif
 
 constexpr PinMap map_sgpio_0{0, 0, 0, 0, 3};
@@ -445,6 +463,10 @@ constexpr PinMap map_dfu_boot_1{1, 2, 0, 9, 0};
 constexpr PinMap map_dfu_button{2, 8, 5, 7, 4};
 constexpr PinMap map_lcd_wrx{2, 9, 1, 10, 0};
 constexpr PinMap map_isp{2, 7, 0, 7, 0};
+
+constexpr PinMap map_rffc5072_select{5, 4, 2, 13, 0};
+constexpr PinMap map_rffc5072_resetx{5, 5, 2, 14, 0};
+
 #ifdef PRALINE
 
 // P1 Multiplexer control pins
@@ -522,6 +544,15 @@ constexpr GPIO ant_bias_oc{pin_ant_bias_oc, map_ant_bias_oc.gpio_port, map_ant_b
 constexpr Pin pin_pps_in_out{map_pps_in_out.scu_port, map_pps_in_out.scu_pin};                                           // SCU: P2_5
 constexpr GPIO pps_in_out{pin_pps_in_out, map_pps_in_out.gpio_port, map_pps_in_out.gpio_pad, map_pps_in_out.gpio_mode};  // GPIO[5]5
 
+constexpr Pin pin_sct_clk_in{map_sct_clk_in.scu_port, map_sct_clk_in.scu_pin};                                           // SCU: P6_4
+constexpr GPIO sct_clk_in{pin_sct_clk_in, map_sct_clk_in.gpio_port, map_sct_clk_in.gpio_pad, map_sct_clk_in.gpio_mode};  // GPIO[3]3
+
+constexpr Pin pin_max2831_rxtx_enable{map_max2831_rxtx_enable.scu_port, map_max2831_rxtx_enable.scu_pin};                                                             // SCU: PE_2
+constexpr GPIO max2831_rxtx_enable{pin_max2831_rxtx_enable, map_max2831_rxtx_enable.gpio_port, map_max2831_rxtx_enable.gpio_pad, map_max2831_rxtx_enable.gpio_mode};  // GPIO[7]2
+
+constexpr Pin pin_max2831_rxhp{map_max2831_rxhp.scu_port, map_max2831_rxhp.scu_pin};                                               // SCU: PD_15
+constexpr GPIO max2831_rxhp{pin_max2831_rxhp, map_max2831_rxhp.gpio_port, map_max2831_rxhp.gpio_pad, map_max2831_rxhp.gpio_mode};  // GPIO[6]29
+
 #else
 constexpr Pin pin_sgpio_13{map_sgpio_13.scu_port, map_sgpio_13.scu_pin};                                       // SCU: P4_8
 constexpr GPIO sgpio_13{pin_sgpio_13, map_sgpio_13.gpio_port, map_sgpio_13.gpio_pad, map_sgpio_13.gpio_mode};  // GPIO[5]12
@@ -671,6 +702,24 @@ constexpr GPIO lcd_wrx{pin_lcd_wrx, map_lcd_wrx.gpio_port, map_lcd_wrx.gpio_pad,
 constexpr Pin pin_isp{map_isp.scu_port, map_isp.scu_pin};                                 // SCU: P2_7
 constexpr GPIO dfu_isp{pin_isp, map_isp.gpio_port, map_isp.gpio_pad, map_isp.gpio_mode};  // GPIO[0]7
 
+constexpr Pin pin_rffc5072_clock{map_rffc5072_clock.scu_port, map_rffc5072_clock.scu_pin};                                                   // SCU: P2_6, PRALINE: P9_5
+constexpr GPIO rffc5072_clock{pin_rffc5072_clock, map_rffc5072_clock.gpio_port, map_rffc5072_clock.gpio_pad, map_rffc5072_clock.gpio_mode};  // GPIO[5]6, PRALINE: GPIO[5]18
+
+constexpr Pin pin_rffc5072_sdata{map_rffc5072_sdata.scu_port, map_rffc5072_sdata.scu_pin};                                                   // SCU: P6_4, PRALINE: P9_2
+constexpr GPIO rffc5072_sdata{pin_rffc5072_sdata, map_rffc5072_sdata.gpio_port, map_rffc5072_sdata.gpio_pad, map_rffc5072_sdata.gpio_mode};  // GPIO[3]3, PRALINE: GPIO[4]14
+
+constexpr Pin pin_rffc5072_select{map_rffc5072_select.scu_port, map_rffc5072_select.scu_pin};                                                                          // SCU: P5_4
+constexpr GPIO rffc5072_select{pin_rffc5072_select, map_rffc5072_select.gpio_port, map_rffc5072_select.gpio_pad, map_rffc5072_select.gpio_mode, Polarity::ActiveLow};  // GPIO[2]13
+
+constexpr Pin pin_rffc5072_resetx{map_rffc5072_resetx.scu_port, map_rffc5072_resetx.scu_pin};                                                                          // SCU: P5_5
+constexpr GPIO rffc5072_resetx{pin_rffc5072_resetx, map_rffc5072_resetx.gpio_port, map_rffc5072_resetx.gpio_pad, map_rffc5072_resetx.gpio_mode, Polarity::ActiveLow};  // GPIO[2]14
+
+constexpr Pin pin_max283x_select{map_max283x_select.scu_port, map_max283x_select.scu_pin};                                                                        // SCU: P1_20, PRALINE: PD_14
+constexpr GPIO max283x_select{pin_max283x_select, map_max283x_select.gpio_port, map_max283x_select.gpio_pad, map_max283x_select.gpio_mode, Polarity::ActiveLow};  // GPIO[0]15, PRALINE: GPIO[6]28
+
+constexpr Pin pin_max283x_enable{map_max283x_enable.scu_port, map_max283x_enable.scu_pin};                                                   // SCU: P4_6, PRALINE: PE_1
+constexpr GPIO max283x_enable{pin_max283x_enable, map_max283x_enable.gpio_port, map_max283x_enable.gpio_pad, map_max283x_enable.gpio_mode};  // GPIO[2]6, PRALINE: GPIO[7]1
+
 }  // namespace gpio_control
 
 namespace power_control {

firmware/common/hackrf_gpio.hpp

@@ -34,41 +34,11 @@ namespace one {
 /* GPIO */
 
 #ifdef PRALINE
-// PRALINE: GPIO2[13] is SPI CS only, FPGA controls ENX/RESETX
-constexpr GPIO gpio_rffc5072_select = gpio[GPIO2_13];  // P5_4: SPI CS (ENX)
-constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14];  // P5_5: LPC43xx controls directly
-#else
-constexpr GPIO gpio_rffc5072_select = gpio[GPIO2_13];
-constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14];
-#endif
 
-#ifdef PRALINE
-constexpr GPIO gpio_rffc5072_clock = gpio[GPIO5_18];
-constexpr GPIO gpio_rffc5072_data = gpio[GPIO4_14];
-#else
-constexpr GPIO gpio_rffc5072_clock = gpio[GPIO5_6];
-constexpr GPIO gpio_rffc5072_data = gpio[GPIO3_3];
-#endif
-
-#ifdef PRALINE
-constexpr GPIO gpio_max283x_select = gpio[GPIO6_28];
-#else
-constexpr GPIO gpio_max283x_select = gpio[GPIO0_15];
-#endif
-
-#ifdef PRALINE
-// PRALINE uses MAX2831 transceiver with different control pins
-constexpr GPIO gpio_max283x_enable = gpio[GPIO7_1];  // MAX2831 ENABLE (PE_1)
-// constexpr GPIO gpio_max2831_enable = gpio[GPIO7_1];     // Alias
-constexpr GPIO gpio_max2831_rx_enable = gpio[GPIO7_2];  // MAX2831 RX_ENABLE (PE_2)
-// constexpr GPIO gpio_max2831_rxhp = gpio[GPIO6_29];      // MAX2831 RXHP (PD_15)
 constexpr GPIO gpio_max2831_ld = gpio[GPIO4_11];  // MAX2831 Lock Detect (P9_6)
-// Legacy aliases for code compatibility
-constexpr GPIO gpio_max2837_rxenable = gpio[GPIO7_2];
-constexpr GPIO gpio_max2837_txenable = gpio[GPIO7_2];  // MAX2831 uses single RX/TX control
-constexpr GPIO gpio_max2839_rxtx = gpio[GPIO7_2];
+
 #else
-constexpr GPIO gpio_max283x_enable = gpio[GPIO2_6];
+
 constexpr GPIO gpio_max2837_rxenable = gpio[GPIO2_5];
 constexpr GPIO gpio_max2837_txenable = gpio[GPIO2_4];
 constexpr GPIO gpio_max2839_rxtx = gpio[GPIO2_5];

firmware/common/lcd_ili9341.cpp

@@ -1,7 +1,7 @@
 /*
  * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
  * Copyright (C) 2016 Furrtek
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/common/message.hpp

@@ -168,6 +168,8 @@ class Message {
         HunterConfig = 110,
         HunterTrigger = 111,
         HunterStop = 112,
+        TetraBsch = 113,
+        TetraDnb = 114,
         MAX
     };
 
@@ -1134,11 +1136,11 @@ class SigGenToneMessage : public Message {
 
 class EPIRBTXDataMessage : public Message {
    public:
-    static constexpr uint8_t max_len = 18;
+    static constexpr uint8_t max_len = 32;
     constexpr EPIRBTXDataMessage()
         : Message{ID::EPIRBTXData} {
     }
-    bool mode_bpsk = true;
+    bool mode_406 = true;
     uint8_t data[max_len]{0};
     uint8_t data_len = 0;
     uint32_t pre_count = 0;
@@ -2009,4 +2011,46 @@ class HunterStopMessage : public Message {
         : Message{ID::HunterStop} {}
 };
 
+struct TetraBurstMessage : public Message {
+    constexpr TetraBurstMessage(
+        const uint8_t* bits,
+        bool inv,
+        uint8_t err)
+        : Message(Message::ID::TetraBsch),
+          inverted(inv),
+          sync_errors(err),
+          payload{} {
+        for (size_t i = 0; i < 63; i++)
+            payload[i] = bits[i];
+    }
+
+    bool inverted;
+    uint8_t sync_errors;
+
+    // 500 bit
+    std::array<uint8_t, 63> payload;
+};
+
+struct TetraDnbMessage : public Message {
+    constexpr TetraDnbMessage(
+        const uint8_t* bits,
+        bool inv,
+        uint8_t err,
+        bool p_train)
+        : Message(Message::ID::TetraDnb),
+          inverted(inv),
+          train_errors(err),
+          is_p_train(p_train),
+          payload{} {
+        for (size_t i = 0; i < 54; i++)
+            payload[i] = bits[i];
+    }
+
+    bool inverted;
+    uint8_t train_errors;
+    bool is_p_train;
+
+    // 432 TCH type-5 bits: 216 bits before the training sequence + 216 bits after.
+    std::array<uint8_t, 54> payload;
+};
 #endif /*__MESSAGE_H__*/

firmware/common/portapack_hal.hpp

@@ -33,13 +33,11 @@ namespace portapack {
 
 /* TODO: Make these GPIOs private and expose via appropriate functions. */
 
-constexpr GPIO gpio_io_stbx = gpio[GPIO5_0];  /* P2_0 */
-constexpr GPIO gpio_addr = gpio[GPIO5_1];     /* P2_1 */
-constexpr GPIO gpio_lcd_te = gpio[GPIO5_3];   /* P2_3 */
-constexpr GPIO gpio_dfu = gpio[GPIO5_7];      /* P2_8 */
-constexpr GPIO gpio_lcd_rdx = gpio[GPIO5_4];  /* P2_4 */
-constexpr GPIO gpio_lcd_wrx = gpio[GPIO1_10]; /* P2_9 */
-constexpr GPIO gpio_dir = gpio[GPIO1_13];     /* P2_13 */
+constexpr GPIO gpio_io_stbx = gpio[GPIO5_0]; /* P2_0 */
+constexpr GPIO gpio_addr = gpio[GPIO5_1];    /* P2_1 */
+constexpr GPIO gpio_lcd_te = gpio[GPIO5_3];  /* P2_3 */
+constexpr GPIO gpio_lcd_rdx = gpio[GPIO5_4]; /* P2_4 */
+constexpr GPIO gpio_dir = gpio[GPIO1_13];    /* P2_13 */
 constexpr std::array<GPIO, 8> gpios_data{
     gpio[GPIO3_8],
     gpio[GPIO3_9],

firmware/common/portapack_io.cpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *
@@ -82,11 +82,9 @@ void IO::init() {
 
     gpio_dir.output();
     gpio_lcd_rdx.output();
-    gpio_lcd_wrx.output();
     gpio_io_stbx.output();
     gpio_addr.output();
     gpio_rot_a.input();
-    gpio_rot_b.input();
 }
 
 void IO::lcd_backlight(const bool value) {
@@ -166,7 +164,7 @@ uint32_t IO::io_update(const TouchPinsConfig write_value) {
     }
     gpio_addr.write(addr);
 
-    auto dfu_btn = portapack::io.dfu_read() & 0x01;
+    uint32_t dfu_btn = gpio_control::dfu_button.read();
     return (switches_raw & 0x7f) | (dfu_btn << 7);
 }
 

firmware/common/portapack_io.hpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  * Copyright (C) 2024 u-foka
  * Copyright (C) 2024 Mark Thompson
  *
@@ -33,6 +33,8 @@
 #include "gpio.hpp"
 #include "ui.hpp"
 
+#include "gpio.hpp"
+
 // #include "portapack_persistent_memory.hpp"
 
 // Darkened pixel bit mask for each possible shift value.
@@ -108,18 +110,14 @@ class IO {
     constexpr IO(
         GPIO gpio_dir,
         GPIO gpio_lcd_rdx,
-        GPIO gpio_lcd_wrx,
         GPIO gpio_io_stbx,
         GPIO gpio_addr,
-        GPIO gpio_rot_a,
-        GPIO gpio_rot_b)
+        GPIO gpio_rot_a)
         : gpio_dir{gpio_dir},
           gpio_lcd_rdx{gpio_lcd_rdx},
-          gpio_lcd_wrx{gpio_lcd_wrx},
           gpio_io_stbx{gpio_io_stbx},
           gpio_addr{gpio_addr},
-          gpio_rot_a{gpio_rot_a},
-          gpio_rot_b{gpio_rot_b} {};
+          gpio_rot_a{gpio_rot_a} {};
 
     void init();
 
@@ -270,18 +268,12 @@ class IO {
         return gpio_rot_a.read();
     }
 
-    uint32_t dfu_read() {
-        return gpio_rot_b.read();
-    }
-
    private:
     const GPIO gpio_dir;
     const GPIO gpio_lcd_rdx;
-    const GPIO gpio_lcd_wrx;
     const GPIO gpio_io_stbx;
     const GPIO gpio_addr;
     const GPIO gpio_rot_a;
-    const GPIO gpio_rot_b;
 
     static constexpr ioportid_t gpio_data_port_id = 3;
     static constexpr size_t gpio_data_shift = 8;
@@ -298,11 +290,11 @@ class IO {
     }
 
     void lcd_wr_assert() {
-        gpio_lcd_wrx.clear();
+        gpio_control::lcd_wrx.setInactive();
     }
 
     void lcd_wr_deassert() {
-        gpio_lcd_wrx.set();
+        gpio_control::lcd_wrx.setActive();
     }
 
     void io_stb_assert() {

firmware/common/spi_image.hpp

@@ -134,6 +134,7 @@ constexpr image_tag_t image_tag_vor_rx{'P', 'V', 'R', 'X'};
 constexpr image_tag_t image_tag_rttyrx{'P', 'R', 'T', 'R'};
 constexpr image_tag_t image_tag_rttytx{'P', 'R', 'T', 'T'};
 constexpr image_tag_t image_tag_tonedetect{'P', 'T', 'N', 'E'};
+constexpr image_tag_t image_tag_tetrarx{'P', 'T', 'E', 'T'};
 
 constexpr image_tag_t image_tag_noop{'P', 'N', 'O', 'P'};
 

firmware/common/ui_painter.cpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/common/ui_painter.hpp

@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
- * copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+ * copyleft 2024 zxkmm
  *
  * This file is part of PortaPack.
  *

firmware/tools/bitmap_tools/bitmap_arr_reverse_decode.py

@@ -1,7 +1,7 @@
 #!/usr/bin/env python3
 
 #
-# copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+# copyleft 2024 zxkmm
 #
 # This file is part of PortaPack.
 #

firmware/tools/bitmap_tools/pp_png2hpp.py

@@ -4,7 +4,7 @@
 #  make_bitmap.py - Copyright (C) 2016 Furrtek
 # Convert bitmap.hpp to icons inspired by
 #  bitmap_arr_reverse_decode.py - Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
-#  bitmap_arr_reverse_decode.py - copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+#  bitmap_arr_reverse_decode.py - copyleft 2024 zxkmm
 # Copysomething (c) 2024 LupusE with the license, needed by the PortaPack project
 # 
 # This program is free software; you can redistribute it and/or modify

firmware/tools/bmp_tools/bmp_to_hex_cpp_arr.py

@@ -1,4 +1,4 @@
-# copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+# copyleft 2024 zxkmm
 
 import os
 import sys

firmware/tools/bmp_tools/hex_cpp_arr_to_bmp.py

@@ -1,4 +1,4 @@
-# copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+# copyleft 2024 zxkmm
 
 import sys
 import re

firmware/tools/check_external_app_linker_script_correct.py

@@ -1,7 +1,7 @@
 #!/usr/bin/env python3
 
 #
-# copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+# copyleft 2025 zxkmm
 #
 # This file is part of PortaPack.
 #

firmware/tools/check_gcc_version_from_elf.py

@@ -1,7 +1,7 @@
 #!/usr/bin/env python3
 
 #
-# copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+# copyleft 2024 zxkmm
 #
 # This file is part of PortaPack.
 #

firmware/tools/fast_flash_pp_and_copy_apps.py

@@ -1,4 +1,4 @@
-# copyleft 2024 zxkmm AKA zix aka sommermorgentraum
+# copyleft 2024 zxkmm
 #
 # This file is part of PortaPack.
 #

firmware/tools/make_spi_image.py

@@ -3,7 +3,7 @@
 #
 # Copyright (C) 2015 Jared Boone, ShareBrained Technology, Inc.
 # Copyright (C) 2024 Mark Thompson
-# copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+# copyleft 2025 zxkmm
 #
 # This file is part of PortaPack.
 #

firmware/tools/widget_preview.py

@@ -1,5 +1,5 @@
 #
-# copyleft 2025 zxkmm AKA zix aka sommermorgentraum
+# copyleft 2025 zxkmm
 #
 # This file is part of PortaPack.
 #

mbt

@@ -185,6 +185,7 @@ Usage:
                                  Download/setup ARM toolchain only
   ./mbt doctor                   Validate host setup and report gaps
   ./mbt shell [options]          Open a shell with toolchain exported for this session
+  ./mbt benchmark [options]      Benchmark clean-build time across generators and ccache modes
 
 Build options:
   -d, --device <name>            Device: hackrf-one | hackrf-pro | portarf
@@ -199,18 +200,30 @@ Build options:
   -G, --generator <name>         CMake generator (default: Ninja)
   -j, --jobs <n>                 Build parallelism (default: host CPU count)
   --target <name>                Build a specific target
-    --clean                        Remove build directory, run libopencm3 clean, and exit
+  --clean                        Remove build directory, run libopencm3 clean, and exit
   --cmake-arg <arg>              Extra CMake configure arg (repeatable)
   --build-arg <arg>              Extra cmake --build arg (repeatable)
   -y, --non-interactive          Fail instead of prompting when required input is missing
   -h, --help                     Show this help
 
+Benchmark options (in addition to -d/--device, -j/--jobs, --target, -B, --cmake-arg):
+  --bench-generators <list>      Comma list of generators to test: ninja,make (default: all installed)
+  --bench-ccache <list>          Comma list of ccache modes: off,cold,warm (default: off,cold,warm)
+                                   off  = ccache disabled (baseline)
+                                   cold = ccache on, empty cache (first-build/populate cost)
+                                   warm = ccache on, pre-populated cache (the ccache speedup)
+                                 Each cell is a full clean build in a dedicated dir (default: ./build-bench),
+                                 using an isolated CCACHE_DIR so your real ccache is never touched.
+
 Examples:
   ./mbt
   ./mbt build --device hackrf-one
   ./mbt build --device hackrf-pro --no-submodule-sync
   ./mbt build --device portarf --no-toolchain --no-deps
   ./mbt build --device hackrf-one --cmake-arg=-DVERSION_STRING=my-build
+  ./mbt benchmark --device hackrf-one --no-deps --no-submodule-sync
+  ./mbt benchmark --device hackrf-one --bench-generators ninja --bench-ccache off,cold,warm
+  ./mbt benchmark --device hackrf-one --bench-generators ninja,make --bench-ccache off
 EOF
 }
 
@@ -308,9 +321,28 @@ mbt_detect_cached_device() {
     return 0
 }
 
+# libopencm3 builds in-source (inside the submodule tree), so deleting the CMake
+# build dir alone does NOT rebuild it. Clean it explicitly for a true clean build.
+# Set quiet=1 to suppress make output (used by the benchmark).
+mbt_clean_libopencm3() {
+    local quiet="${1:-0}"
+    local libopencm3_dir="$SCRIPT_PATH/hackrf/firmware/libopencm3"
+
+    if [[ ! -d "$libopencm3_dir" ]]; then
+        mbt_error "libopencm3 directory not found: $libopencm3_dir"
+        return 1
+    fi
+
+    if [[ "$quiet" -eq 1 ]]; then
+        make -C "$libopencm3_dir" clean >/dev/null 2>&1
+    else
+        mbt_log "cleaning libopencm3: $libopencm3_dir"
+        make -C "$libopencm3_dir" clean
+    fi
+}
+
 mbt_clean() {
     local build_dir="$1"
-    local libopencm3_dir="$SCRIPT_PATH/hackrf/firmware/libopencm3"
 
     mbt_log "cleaning build directory: $build_dir"
     if ! rm -rf "$build_dir"; then
@@ -318,19 +350,63 @@ mbt_clean() {
         return 1
     fi
 
-    if [[ -d "$libopencm3_dir" ]]; then
-        mbt_log "cleaning libopencm3: $libopencm3_dir"
-        make -C "$libopencm3_dir" clean
-    else
-        mbt_error "libopencm3 directory not found: $libopencm3_dir"
-        return 1
-    fi
+    mbt_clean_libopencm3 0
 }
 
 mbt_report_build_error() {
     printf '%s\n' 'Build error happened. Try to fix your code, or run ./mbt --clean and try again' >&2
 }
 
+# Print the device-specific CMake args, one per line (empty for hackrf-one).
+mbt_device_args() {
+    case "$1" in
+    hackrf-one)
+        : # no extra args
+        ;;
+    hackrf-pro)
+        printf '%s\n' "-DBOARD=PRALINE"
+        ;;
+    portarf)
+        printf '%s\n' "-DFLASH_MB_SIZE=2" "-DFLASH_MB_LIMIT_SIZE=2"
+        ;;
+    *)
+        return 1
+        ;;
+    esac
+}
+
+# Normalize a user-supplied generator name to a canonical CMake generator name.
+mbt_resolve_generator() {
+    local raw
+    raw="$(printf "%s" "$1" | tr '[:upper:]' '[:lower:]')"
+    case "$raw" in
+    ninja)
+        printf "Ninja"
+        ;;
+    make|makefiles|unixmakefiles|"unix makefiles")
+        printf "Unix Makefiles"
+        ;;
+    *)
+        printf "%s" "$1"
+        ;;
+    esac
+}
+
+# Print the command required by a canonical CMake generator (empty if unknown).
+mbt_generator_command() {
+    case "$1" in
+    Ninja)
+        printf "ninja"
+        ;;
+    "Unix Makefiles")
+        printf "make"
+        ;;
+    *)
+        printf ""
+        ;;
+    esac
+}
+
 mbt_build() {
     local build_dir="$1"
     local generator="$2"
@@ -372,20 +448,8 @@ mbt_build() {
     mkdir -p "$build_dir"
 
     device_args=()
-    case "$device" in
-    hackrf-one)
-        device_args+=()
-        ;;
-    hackrf-pro)
-        device_args+=("-DBOARD=PRALINE")
-        ;;
-    portarf)
-        device_args+=("-DFLASH_MB_SIZE=2" "-DFLASH_MB_LIMIT_SIZE=2")
-        ;;
-    *)
-        mbt_die "unsupported device preset: $device"
-        ;;
-    esac
+    mbt_device_args "$device" >/dev/null || mbt_die "unsupported device preset: $device"
+    mapfile -t device_args < <(mbt_device_args "$device")
 
     if [[ "$generator" == "Ninja" ]] && ! mbt_command_exists ninja; then
         if mbt_command_exists make; then
@@ -430,6 +494,258 @@ mbt_build() {
     # have to hard code the name here cuz it's too expensive to read cmake for just a file name.
 }
 
+# Compute elapsed wall-clock seconds (with 2 decimals) between two `date +%s.%N` stamps.
+mbt_elapsed() {
+    awk -v s="$1" -v e="$2" 'BEGIN { printf "%.2f", e - s }'
+}
+
+# Format seconds as a human-friendly "MmSS.ss" (or "SS.ss" under a minute).
+mbt_format_seconds() {
+    awk -v t="$1" 'BEGIN {
+        if (t < 0) t = 0
+        m = int(t / 60)
+        s = t - m * 60
+        if (m > 0) printf "%dm%05.2fs", m, s
+        else printf "%.2fs", s
+    }'
+}
+
+# Run one full clean build and print elapsed seconds on stdout.
+# All progress/logging goes to stderr; build output is captured to a per-cell log.
+# Args: cell_dir generator use_ccache device jobs target ccache_dir log_file  cmake_extra_array_name
+mbt_bench_cell() {
+    local cell_dir="$1" generator="$2" use_ccache="$3" device="$4" jobs="$5"
+    local target="$6" ccache_dir="$7" log_file="$8"
+    shift 8
+    local -n cmake_extra_ref="$1"
+    local -a cmake_extra_args=("${cmake_extra_ref[@]}")
+    local -a device_args cmake_args build_args
+    local start end status=0
+
+    rm -rf "$cell_dir"
+    mkdir -p "$cell_dir"
+
+    # libopencm3 builds in-source, so it survives `rm -rf "$cell_dir"`. Without
+    # this, only the first cell would pay its compile cost and every later cell
+    # would look artificially fast, biasing the whole comparison.
+    mbt_clean_libopencm3 1 || true
+
+    mapfile -t device_args < <(mbt_device_args "$device")
+
+    cmake_args=(
+        -S "$SCRIPT_PATH"
+        -B "$cell_dir"
+        -G "$generator"
+        "-DUSE_CCACHE=$use_ccache"
+    )
+    cmake_args+=("${device_args[@]}")
+    cmake_args+=("${cmake_extra_args[@]}")
+
+    build_args=(--build "$cell_dir" --parallel "$jobs")
+    if [[ -n "$target" ]]; then
+        build_args+=(--target "$target")
+    fi
+
+    start="$(date +%s.%N)"
+    (
+        if [[ -n "$ccache_dir" ]]; then
+            export CCACHE_DIR="$ccache_dir"
+        fi
+        cmake "${cmake_args[@]}" && cmake "${build_args[@]}"
+    ) >"$log_file" 2>&1 || status=$?
+    end="$(date +%s.%N)"
+
+    if [[ "$status" -ne 0 ]]; then
+        printf "FAILED"
+        return "$status"
+    fi
+
+    mbt_elapsed "$start" "$end"
+}
+
+# Populate a ccache directory without timing (used when a warm run is requested
+# but no cold run precedes it to fill the cache).
+mbt_bench_populate() {
+    local cell_dir="$1" generator="$2" device="$3" jobs="$4" target="$5"
+    local ccache_dir="$6" log_file="$7"
+    shift 7
+    mbt_bench_cell "$cell_dir" "$generator" "ON" "$device" "$jobs" "$target" \
+        "$ccache_dir" "$log_file" "$1" >/dev/null
+}
+
+mbt_benchmark() {
+    local base_dir="$1" device="$2" jobs="$3" target="$4"
+    local generators_csv="$5" ccache_csv="$6"
+    shift 6
+    local -n bench_cmake_extra_ref="$1"
+    local -a bench_extra_args=("${bench_cmake_extra_ref[@]}")
+
+    local -a want_generators=() generators=() modes=()
+    local raw g cmd mode
+
+    # Resolve requested generators (auto = every generator whose tool is present).
+    if [[ -z "$generators_csv" || "$generators_csv" == "auto" ]]; then
+        want_generators=("Ninja" "Unix Makefiles")
+    else
+        IFS=',' read -ra raw_gens <<< "$generators_csv"
+        for raw in "${raw_gens[@]}"; do
+            [[ -z "$raw" ]] && continue
+            want_generators+=("$(mbt_resolve_generator "$raw")")
+        done
+    fi
+
+    for g in "${want_generators[@]}"; do
+        cmd="$(mbt_generator_command "$g")"
+        if [[ -z "$cmd" ]]; then
+            mbt_error "skipping unknown generator: $g"
+            continue
+        fi
+        if ! mbt_command_exists "$cmd"; then
+            mbt_error "skipping generator '$g' ($cmd not installed)."
+            continue
+        fi
+        generators+=("$g")
+    done
+
+    if [[ "${#generators[@]}" -eq 0 ]]; then
+        mbt_die "no usable generators for benchmark (need ninja and/or make)."
+    fi
+
+    # Resolve ccache modes: off | cold | warm.
+    if [[ -z "$ccache_csv" ]]; then
+        ccache_csv="off,cold,warm"
+    fi
+    local -A mode_seen=()
+    IFS=',' read -ra raw_modes <<< "$ccache_csv"
+    for mode in "${raw_modes[@]}"; do
+        mode="$(printf "%s" "$mode" | tr '[:upper:]' '[:lower:]')"
+        [[ -z "$mode" ]] && continue
+        case "$mode" in
+        off | cold | warm) ;;
+        on) mode="cold" ;; # treat plain "on" as a cold measurement
+        *) mbt_die "unknown ccache mode: $mode (use off, cold, warm)" ;;
+        esac
+        if [[ -z "${mode_seen[$mode]:-}" ]]; then
+            modes+=("$mode")
+            mode_seen[$mode]=1
+        fi
+    done
+    [[ "${#modes[@]}" -eq 0 ]] && mbt_die "no ccache modes selected."
+
+    local needs_ccache=0
+    for mode in "${modes[@]}"; do
+        [[ "$mode" != "off" ]] && needs_ccache=1
+    done
+    if [[ "$needs_ccache" -eq 1 ]] && ! mbt_command_exists ccache; then
+        mbt_die "ccache modes requested but ccache is not installed. Install it or use --bench-ccache off."
+    fi
+
+    mkdir -p "$base_dir"
+    local log_dir="$base_dir/logs"
+    mkdir -p "$log_dir"
+
+    mbt_log "benchmark: device=$device jobs=$jobs generators=[${generators[*]}] ccache=[${modes[*]}]"
+    [[ -n "$target" ]] && mbt_log "benchmark: target=$target"
+    mbt_log "benchmark: results and per-cell logs under $base_dir"
+    mbt_log "benchmark: each cell is a full clean build; this can take a while."
+
+    # Parallel result arrays.
+    local -a r_gen=() r_mode=() r_secs=() r_ok=()
+    local cell_dir ccache_dir log_file secs cell_status label
+
+    for g in "${generators[@]}"; do
+        # Per-generator, isolated ccache dir so "cold" is truly cold and the
+        # user's real cache is never touched. Cache keys are generator-agnostic,
+        # so each generator needs its own fresh dir.
+        ccache_dir=""
+        if [[ "$needs_ccache" -eq 1 ]]; then
+            ccache_dir="$base_dir/ccache-$(printf "%s" "$g" | tr ' ' '-')"
+            rm -rf "$ccache_dir"
+            mkdir -p "$ccache_dir"
+        fi
+
+        local cold_done=0
+        for mode in "${modes[@]}"; do
+            label="$g / ccache=$mode"
+            log_file="$log_dir/$(printf "%s" "$g" | tr ' ' '-')-$mode.log"
+
+            case "$mode" in
+            off)
+                mbt_log "running: $label"
+                secs="$(mbt_bench_cell "$base_dir/cell" "$g" "OFF" "$device" \
+                    "$jobs" "$target" "" "$log_file" bench_extra_args)" && cell_status=0 || cell_status=$?
+                ;;
+            cold)
+                rm -rf "$ccache_dir" && mkdir -p "$ccache_dir"
+                mbt_log "running: $label (empty cache)"
+                secs="$(mbt_bench_cell "$base_dir/cell" "$g" "ON" "$device" \
+                    "$jobs" "$target" "$ccache_dir" "$log_file" bench_extra_args)" && cell_status=0 || cell_status=$?
+                [[ "$cell_status" -eq 0 ]] && cold_done=1
+                ;;
+            warm)
+                if [[ "$cold_done" -eq 0 ]]; then
+                    mbt_log "priming cache for: $label (untimed)"
+                    rm -rf "$ccache_dir" && mkdir -p "$ccache_dir"
+                    if ! mbt_bench_populate "$base_dir/cell" "$g" "$device" \
+                        "$jobs" "$target" "$ccache_dir" "$log_dir/$(printf "%s" "$g" | tr ' ' '-')-prime.log" bench_extra_args; then
+                        mbt_error "cache priming failed for $label; skipping."
+                        r_gen+=("$g"); r_mode+=("$mode"); r_secs+=("0"); r_ok+=("0")
+                        continue
+                    fi
+                fi
+                mbt_log "running: $label (populated cache)"
+                secs="$(mbt_bench_cell "$base_dir/cell" "$g" "ON" "$device" \
+                    "$jobs" "$target" "$ccache_dir" "$log_file" bench_extra_args)" && cell_status=0 || cell_status=$?
+                ;;
+            esac
+
+            if [[ "$cell_status" -ne 0 ]]; then
+                mbt_error "cell failed: $label (see $log_file)"
+                r_gen+=("$g"); r_mode+=("$mode"); r_secs+=("0"); r_ok+=("0")
+            else
+                mbt_log "  -> $(mbt_format_seconds "$secs") ($secs s)"
+                r_gen+=("$g"); r_mode+=("$mode"); r_secs+=("$secs"); r_ok+=("1")
+            fi
+        done
+    done
+
+    rm -rf "$base_dir/cell"
+
+    # Summary table.
+    printf "\n"
+    mbt_log "benchmark summary (device=$device, jobs=$jobs)"
+    printf "  %-16s %-8s %12s %10s\n" "generator" "ccache" "time" "vs off"
+    printf "  %-16s %-8s %12s %10s\n" "---------" "------" "----" "------"
+
+    local i baseline speedup
+    for ((i = 0; i < ${#r_gen[@]}; i++)); do
+        # Find the "off" baseline for the same generator, if measured.
+        baseline=""
+        local j
+        for ((j = 0; j < ${#r_gen[@]}; j++)); do
+            if [[ "${r_gen[$j]}" == "${r_gen[$i]}" && "${r_mode[$j]}" == "off" && "${r_ok[$j]}" == "1" ]]; then
+                baseline="${r_secs[$j]}"
+                break
+            fi
+        done
+
+        if [[ "${r_ok[$i]}" != "1" ]]; then
+            printf "  %-16s %-8s %12s %10s\n" "${r_gen[$i]}" "${r_mode[$i]}" "FAILED" "-"
+            continue
+        fi
+
+        if [[ -n "$baseline" && "${r_mode[$i]}" != "off" ]]; then
+            speedup="$(awk -v b="$baseline" -v t="${r_secs[$i]}" 'BEGIN { if (t > 0) printf "%.2fx", b / t; else printf "-" }')"
+        else
+            speedup="-"
+        fi
+        printf "  %-16s %-8s %12s %10s\n" "${r_gen[$i]}" "${r_mode[$i]}" "$(mbt_format_seconds "${r_secs[$i]}")" "$speedup"
+    done
+    printf "\n"
+    mbt_log "'vs off' > 1x means faster than the same generator's ccache=off build."
+    mbt_log "cold = empty cache (populate cost); warm = pre-populated cache (the ccache win)."
+}
+
 main() {
     local command="build"
     local quickstart=0
@@ -439,11 +755,14 @@ main() {
     local with_submodule_sync=1
     local with_toolchain=1
     local build_dir="$SCRIPT_PATH/build"
+    local build_dir_explicit=0
     local generator="Ninja"
     local jobs
     local target=""
     local clean_build=0
     local non_interactive=0
+    local benchmark_generators=""
+    local benchmark_ccache=""
     local -a cmake_extra_args=()
     local -a build_extra_args=()
 
@@ -457,7 +776,7 @@ main() {
 
     if [[ "$#" -gt 0 ]]; then
         case "$1" in
-        build|deps|toolchain|doctor|shell)
+        build|deps|toolchain|doctor|shell|benchmark)
             command="$1"
             shift
             ;;
@@ -515,8 +834,27 @@ main() {
         -B|--build-dir)
             [[ "$#" -ge 2 ]] || mbt_die "$1 requires a value"
             build_dir="$2"
+            build_dir_explicit=1
             shift 2
             ;;
+        --bench-generators)
+            [[ "$#" -ge 2 ]] || mbt_die "$1 requires a value"
+            benchmark_generators="$2"
+            shift 2
+            ;;
+        --bench-generators=*)
+            benchmark_generators="${1#*=}"
+            shift
+            ;;
+        --bench-ccache)
+            [[ "$#" -ge 2 ]] || mbt_die "$1 requires a value"
+            benchmark_ccache="$2"
+            shift 2
+            ;;
+        --bench-ccache=*)
+            benchmark_ccache="${1#*=}"
+            shift
+            ;;
         -G|--generator)
             [[ "$#" -ge 2 ]] || mbt_die "$1 requires a value"
             generator="$2"
@@ -598,6 +936,13 @@ main() {
         ;;
     build)
         ;;
+    benchmark)
+        # Never benchmark into the user's working ./build dir; a benchmark
+        # wipes its build dir between cells. Use a dedicated dir by default.
+        if [[ "$build_dir_explicit" -eq 0 ]]; then
+            build_dir="$SCRIPT_PATH/build-bench"
+        fi
+        ;;
     *)
         mbt_die "unsupported command: $command"
         ;;
@@ -640,6 +985,12 @@ main() {
         mbt_log "quickstart mode enabled."
     fi
 
+    if [[ "$command" == "benchmark" ]]; then
+        mbt_benchmark "$build_dir" "$device" "$jobs" "$target" \
+            "$benchmark_generators" "$benchmark_ccache" cmake_extra_args
+        exit $?
+    fi
+
     mbt_build "$build_dir" "$generator" "$use_ccache" "$device" "$jobs" "$target" "$clean_build" \
         cmake_extra_args[@] build_extra_args[@]
 }

sdcard/EPIRB/BEACONS.TXT

@@ -1,7 +1,7 @@
 #Title; Description; Frame (Hex format : 18 Bytes / 36 Hex char)
 Selftest; Serial user Location Protocol; FFFED0D6E6202820000C29FF51041775302D
 Standard Test; ADRASEC02 30/11/2014 N49d16m32s/E3d16m32s; FFFED08e3e0425a8318074fe44b735cd7b46
-User protocol KO; Radio call sign (wrong BCH1); FFFED03EF613523F81FE0
+User protocol KO; Radio call sign (wrong BCH1); FFFED03EF613523F81FE00
 User protocol OK; Radio call sign (valid BCH1); FFFED056E6804002202009655250
 RLS Location; RLS Location; FFFED08E0D0990014710021963C85C7009F5
 PLB Location; PLB Location: National Location; FFFED08E3B15F1DFC0FF07FD1F769F3C0672
@@ -24,11 +24,13 @@ RLS Location; RLS Location Protocol; FFFED096ED09900149D4D467EE0851A3B2E8
 Orbitography; Orbitography Protocol (from Toulouse FMCC's LUT); FFFE2FCE3000000000000DBD0E4022417500
 ELT 24 2; ELT 24 bits; FFFED08DB345B146202DDF3C71F59BAB7072
 Selftest BCH1 ERR; Serial user Location Protocol; FFFED0D7E6202820000C29FF51041775302D
-Selftest BCH2 ERR; Serial user Location Protocol; FFFED0D6E6202820000C29FF51041765302D
-Selftest BCH12 ERR; Serial user Location Protocol; FFFED0D7E6202820000C29FF51041765302D
+#Selftest BCH2 ERR; Serial user Location Protocol; FFFED0D6E6202820000C29FF51041765302D
+#Selftest BCH12 ERR; Serial user Location Protocol; FFFED0D7E6202820000C29FF51041765302D
+Selftest BCH12 3+2 ERR; Serial user Location Protocol; FFFED0D7D6202820000C29FF51041745302D
 Emergency Cap;EPIRB Emergency Capsizing;FFFED056E68040022021A4CDC675
 Emergency No Mar.;Emergency non maritime;FFFED056EE8040022021A5623CFE
 Emergency PLB;Emergency PLB no fire+med+dis;FFFED056E7804002202123F39E36
 Emergency PLB fire;Emergency PLB fire;FFFED056E7804002202123F39E39
 EPIRB Sinking;Emergency EPIRB Sinking;FFFED056E58040022021342FAD76
 EPIRB Call Sign Col.;EPIRB Radio Call Sign Emergency collision;FFFED056ED80400220217185E933
+SGB;2nd Generation Beacon;BFFFE1A738C95C7BE00BD8BE00000000001FFFF0FFFF7FFFEF0470404A448FD