* Cleaned up #ifndef PRALINE and updated logic to being with #ifdef PRALINE entries where possible to make logic flow for PRALINE code execution pipeline clearer. Cleaned up compiletime warnings for PRALINE related codebase updates.
* Addressed comments provided by copilot during PR review. Combed through frequency definitions for consistency between PLL A and PLL B register definitions for CLKs 0-7. Ensured CLK3/LK6 <- SMA PORTs and CLK7 <- not utiliized are disabled during core development phase to support root cause analysis of any spectral artifacts. Updated MCU frequency to 40MHz to ensure audio harmonics are outside FM radio band range (< 80 MHz, >120MHz) and added comments clarifying choice of 40 over 10 MHz for potential future root cause analysis in other bands where audio may be expected as needed. Added CLK6 and CLK7 to Clocks Status View Debug display. Moved CLK defintions and PLL instantiations for components that are most RF sensitive to PLL A. Left others in PLL B. That is move FPGA CLK1 to PLL B, while moving CLK2, CLK4, and CLK5 to PLL A.
* Cleaned up PLL A and B XTAL reference checks relative to 800 MHz.
* Updated harckrf_gpio methods to more closely reflect hackrf_usb. Added some ui debug updates to RFFC5072 Status View.
* Updated tuning tables for tuning.cpp. Remnoved 15MHz lower limit in max2831.cpp since lower bandwidths don't seem to be causing lower band issues. Added more opportunities for clocks to stabalize at startup in board.cpp. Added/amended UI to help with addresssing low band tuning issues. Cleaned up stale comments in radio.cpp.
* Ran format-code.sh
* Updated to remove commented lines as part of clean up addressing review comments.
* Fixed clock_manager.cpp configruation for praline. Praline hackrf pro should have: CLK4: 6mA, Invert RFFC5072 40MHz ref and CLK5: 4mA, Invert MAX2831 40MHz ref. Improvements should be visible in the watefall at 2.4GHz, and between 2.311 and 2.599GHz.
* After reviewin clock config, updated values to reflect: CLK0 MAX5864 (ADC) 40 MHz 4mA Normal Integer Minimizes sampling jitter for SNR. CLK1 iCE40 FPGA 40 MHz 6mA Normal Integer Stable timing for the SPI bridge. CLK2 LPC43xx MCU 40 MHz 4mA Normal Integer Standard reference for MCU PLL. CLK3 SMA Port P1 10 MHz 8mA Normal Integer Cleanest square wave for Ext Ref. CLK4 RFFC5072 (Mixer) 40 MHz 6mA Inverted Integer Crucial for PLL Lock stability. CLK5 MAX2831 (TRX) 40 MHz 4mA Inverted Integer Reduces phase noise in the 2.4GHz LO. CLK6 SMA Port P2 10 MHz 8mA Normal Integer Sync output for external gear. CLK7 Reserved Off N/A N/A N/A Disabled to save power/reduce EMI.
* Ran format-code.sh
* Moved fpga_brdige_init to portapack.cpp. This more closely resembles how hackrf_usb starts initializes the fpga, and allows time for the clocks to stabilize and facilitate locking to support low band tuning.
* Ran format-code.sh
* Added ProRadio Debug display to check for / debug locking.
* Moved fpga_bridge_init before radio_init in portapack.cpp
* Low band can now see signals. Updated clock_manager, rffc507 and portapack.cpp to ensure fpga intialized correctly. Ensures rffc507x.cpp has correct 40MHz reference frequency, prescaler, and synth configuration.
* Updated radio to add q-invert on, dc-block on, and deimation=3 (8x, for 20 -> 2.5 MHz decimation for testing cleaner low band signals.
* Ran format-code.sh
* Initial commit and pr for HackRF Pro (praline) arch-port to mayhem-firmware. Please see https://github.com/portapack-mayhem/mayhem-firmware/issues/2957. Added flash specifics for -DBOARD=PRALINE. This firmware only builds with toolchain v9.2.1 if hackrf codebase has -B arm in firmware/hackrf_usb/CMakeLists.txt.
* Updated CMakeLists.txt per coordination with @HtoToo. For -DBOARD=PRALINE FLASH_MB_SIZE and FLASH_MB_LIMIT_SIZE are now 4. Removed praline specific variable for FLASH limits.
* Updated chibios-portapack's board.cpp to support initialization of the HachRF-Pro (praline) FPGA. Added append_fpga_bitstream.py tool to ensure that praline_fgpa.bin bitstream can be appended to -DBOARD=PRALINE produced firmware. In order to ensure successful execution of append_fpga_bitstream.py to append the fpga bitstream we should expect that the bistsream will be located at 0x180000 in flash. This requires that FLASH_MB_LIMIT_SIZE must be 1.5, and FLASH_BYTES_LIMIT_SIZE must be 1535 * 1024. If we want to allow more or less space for the base firmware image sans the fpga bitstream the location of the bistream must be moved to a location other than 0x180000.
* Updated location of praline_fpga.bin bitstream to 0x380000 to allow more room for firmware. Firmware now has 3.5MB, or 2MB more available than before as coordinated with @HTotoo.
* Expanded #ifndef PRALINE to include og and r9 gpio and pin setup as coordinated with @HTotoo.
* Added note for PRALINE FLASH_MB_LIMIT_SIZE and FLASH_BYTES_LIMIT_SIZE to explain why we are using the 3.5 and 3584 values respectively as coordinated with @HTotoo.
* Next round of modifications derived heavily, if not entirely from work done by @banandana at https://github.com/Banandana/mayhem-firmware. This commit should power on the HackRF Pro (praline) display, power on the fpga, and enable gpio, and provide debug utilties. There is still a lot of work to be done to fully enable the new praline board with this build and firmware architectural porting effort. However, hackrf-one boards do not seem to be adversely impacted by the #ifdef PRALINE statements, and CMakeLists updates, as far as I have been able to test.
* Ran format-code.sh. Updates for this commit are only due to formatting. Tested builds and they seem to work as exptected.
* Addressed fixes in firmware/application and firmware/baseband. Stream now flows to capture and looking glass. Issues were related to thread management. Issues were originally addressed by @banandana.
* Ran format-code.sh to allow for consistency with autoamted clang checks.
* Update hackrf ref repo to mayhem-portapack-hackrf next from https://github.com/portapack-mayhem/hackrf
* Addressed format edits necessary to pass clang-format check.
* Starting addressing Si5351 Clocks for radio sampling. These updates correctly set the Si5351 clock at start up. There appears to be an issue during runtime when testing with RX Test Init, Capture and Looking glass.
* Updated clock_manager.cpp to restore correct function introduced by @banandana when testing with Rx Test Init.
* Switched to using decimation for setting the sample rate without changing the Si5351 clock. This assumes that for the praline board Si5351 CLK0 runs at fixed 8 MHz (constant) and the FPGA decimates to get the desired sample rate. For example, for a 1 MHz sample rate -> Si5351 outputs 8 MHz, FPGA decimates by 8. There is still more work needed here, and potential verification that this is the correct way to operate with this new archteitecture.
* After deliberating on hackrf_usb hackrf_core.c and radio.c, and reviewing firmware/application/hw/si5351.cpp the original approach of using the aproach detailed in hackrf_core.c sample_rate_frac_set() lines 580-582, via the implementation in firmware/application/hw/si5351.cpp seems like the best place to continue testing efforts.
* Tested at ~2.4GHz (2.3 - 2.5) with lookgin glass and was able to receive signals. Added a Signal Path debug app to test gains, and readio mode (receive/transmit).
* Added two debug apps for the RFFC507x. Status View and Tuning View. This helped debug some of the potential issues with tuning.
* update submodule
* format code
* Small touch up merging latest next and ensuring build for HackRF One.
* Reverted edits to re: firmware/baseband/sd_over_usb/scsi.c and firmware/application/portapack.cpp. Source now builds, had to pull latest hackrf submodule.
* Skipped detect hardware for praline board to avoid backscreen in HackRF Pro praline board.
---------
Co-authored-by: gullradriel <gullradriel@users.noreply.github.com>
* gui
* worked but slow
* not do the auto detect
* worked
* remove debug thing
* format
* remove uneeded thing
* fix hackrf submodule bump
* clean up
* format
* format
* format
* remve batt
* add hint text and eta
* code clean up by @HTotoo
* work around to resolve not clear enough
* correct comments
* message on dev list change
* dc detect
* added sht3x sensor.
* separete environment data from light
* max17055 moved to i2c dev
* sht fix, goterror detection fix
* fix ext sensor app display for a lot of devices.
* added bh1750 driver
* autoscan on main view
* added devlist mutex
* better timing
* fix h2 sw8 on poweron by usb
* WIP
* WIP
* WIP
* Corrected name
* WIP
* WIP
* WIP
* WIP
* Added new calc
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* Added debug serial lines
* WIP
* Fixed issue
* Fixed calculation issue
* Added voltage to performance DFU menu
* Added padding function and added voltage to perf menu
* Clean up
* Refactor
* Fixed linting
* Hides voltage if PP does not conatin IC
* WIP showing battery %
* made the percentage a int
* Added % to header
* Removed test UI
* Removed comment
* Added fix for precision too large
* Added fix for precision too large
* Linting
* Don't disable DAC when other audio output is using it
* Persistent audio mute revisions
* Moved persistent audio mute code to audio.cpp
* Make "Disable AK speaker amp" take effect immediately
* reset config when holding down select durring boot
it still need to be tripple checked if adc or control init really doesnt use any pmem
* one less magic number :)
* dual key action left+right for pmem reset
---------
Co-authored-by: Eisenberger Tamas <e.tamas@iwstudio.hu>
* Use receiver/transmitter models everywhere
* Run formatter
* Fix a copy-paste bug, make transmitter_model actually set tx_gain.
---------
Co-authored-by: kallanreed <kallanreed@outlook.com>
* Make default constructor for touch calibration
* Add persistent memory check value and access abstraction.
* Add persistent data_t default constructor with reasonable defaults.
* serial_format_t default constructor.
* Tidy up backlight timeout type.
* Add persistent data struct version/checking.
* Make range_t functions constexpr.
* Move ui_config and functions into class.
* Add backlight_config_t struct, separate enable and time settings.
* Got SD card mounting during boot
* Cleaned up comments
* Now loads settings from SD as backup
* Now loads settings from SD as backup
* linting
* refactoring
stafur
jLynx
E.T.
gullradriel
sommermorgentraum
Totoo
jLynx
Bernd Herzog
Mark Thompson
Kyle Reed
phil-stumpy
Jared Boone