mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2026-09-10 00:29:33 +00:00
Gpio modify (#3229)
* Refactor GPIO configuration for PRALINE and non-PRALINE setups - Updated PinMap structure to include gpio_mode for better flexibility. - Added new GPIO mappings for SGPIO pins with appropriate configurations. - Commented out unused GPIO definitions in hackrf_gpio.hpp to improve code clarity. - Adjusted GPIO initialization for control pins to utilize the new PinMap structure. - Ensured compatibility for both PRALINE and non-PRALINE configurations by using preprocessor directives. * Refactor GPIO handling and remove LED abstraction - Updated GPIO class to support logical polarity, enabling/disabling features based on their configured state. - Replaced direct GPIO manipulation in power control functions with new GPIO methods for better readability and maintainability. - Removed the LED class and its associated functionality, as it was deemed unnecessary for the current implementation. - Adjusted GPIO initialization for various components, ensuring correct polarity settings for VAA and power enable pins. - Cleaned up unused includes and commented-out code in hackrf_gpio.hpp. * Refactor GPIO LED control methods to use setActive() and setInactive() for improved clarity * Refactor GPIO control methods to use setActive() and setInactive() for improved clarity and consistency * copilot * Update GPIO control logic and pin definitions for clarity and consistency * Refactor GPIO methods for improved naming consistency and clarity
This commit is contained in:
Pezsma
GitHub
+221
-52
@@ -28,7 +28,7 @@
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#include "ch.h"
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#include "hal.h"
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#include "pal.h"
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#include "pal_lld.h"
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struct PinConfig {
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const uint32_t mode;
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@@ -200,6 +200,12 @@ struct Pin {
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uint8_t _pin_pad;
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};
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// Defines the logical polarity of the GPIO pin
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enum class Polarity {
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ActiveHigh, // High physical state means the function is ON (default)
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ActiveLow // Low physical state means the function is ON (inverted)
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};
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struct GPIO {
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// GPIO() = delete;
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// GPIO(const GPIO& gpio) = delete;
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@@ -209,22 +215,15 @@ struct GPIO {
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const Pin& pin,
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const ioportid_t gpio_port,
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const iopadid_t gpio_pad,
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const uint16_t gpio_mode)
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const uint16_t gpio_mode,
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const Polarity polarity = Polarity::ActiveHigh) // Default parameter ensures backward compatibility
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: _pin{pin},
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_gpio_port{gpio_port},
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_gpio_pad{gpio_pad},
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_gpio_mode{gpio_mode} {
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_gpio_mode{gpio_mode},
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_polarity{polarity} {
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}
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/*
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constexpr GPIO(
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const GPIO& gpio
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) : _pin { gpio._pin },
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_gpio_port { gpio._gpio_port },
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_gpio_pad { gpio._gpio_pad },
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_gpio_mode { gpio._gpio_mode }
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{
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}
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*/
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constexpr ioportid_t port() const {
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return _gpio_port;
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}
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@@ -237,6 +236,11 @@ struct GPIO {
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return _pin;
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}
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// Returns the configured polarity of the pin
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constexpr Polarity polarity() const {
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return _polarity;
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}
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void configure() const {
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_pin.mode(_gpio_mode);
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}
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@@ -245,6 +249,8 @@ struct GPIO {
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return _gpio_mode;
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}
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// Physical Level Operations
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void set() const {
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palSetPad(_gpio_port, _gpio_pad);
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}
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@@ -273,6 +279,39 @@ struct GPIO {
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return palReadPad(_gpio_port, _gpio_pad);
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}
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// Turns the feature ON based on its polarity
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void setActive() const {
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if (_polarity == Polarity::ActiveHigh) {
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set();
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} else {
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clear();
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}
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}
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// Turns the feature OFF based on its polarity
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void setInactive() const {
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if (_polarity == Polarity::ActiveHigh) {
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clear();
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} else {
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set();
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}
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}
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// Sets the logical state of the feature
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void setState(const bool active) const {
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if (active) {
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setActive();
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} else {
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setInactive();
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}
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}
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// Returns true if the feature is logically active/enabled
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bool isEnabled() const {
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const bool physical_state = read();
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return (_polarity == Polarity::ActiveHigh) ? physical_state : !physical_state;
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}
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bool operator!=(const GPIO& other) const {
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return (port() != other.port()) || (pad() != other.pad());
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}
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@@ -281,6 +320,7 @@ struct GPIO {
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const ioportid_t _gpio_port;
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const iopadid_t _gpio_pad;
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const uint16_t _gpio_mode;
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const Polarity _polarity;
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};
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constexpr uint32_t boot_bit(const GPIO& pin, bool state) {
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@@ -306,7 +346,6 @@ inline void setup_pins(const std::array<scu_setup_t, N>& pins_setup) {
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}
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}
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#ifdef PRALINE
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namespace gpio_control {
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struct PinMap {
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@@ -314,55 +353,195 @@ struct PinMap {
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uint8_t scu_pin;
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uint8_t gpio_port;
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uint8_t gpio_pad;
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uint8_t gpio_mode;
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};
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constexpr PinMap map_p1_ctrl0{2, 10, 0, 14}; // SCU: 2, 10 | GPIO: 0, 14
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constexpr PinMap map_p1_ctrl1{6, 8, 5, 16};
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constexpr PinMap map_p1_ctrl2{6, 9, 3, 5};
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constexpr PinMap map_p2_ctrl0{8, 3, 7, 3};
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constexpr PinMap map_p2_ctrl1{8, 4, 7, 4};
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constexpr PinMap map_trigger_out{2, 6, 5, 6};
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constexpr PinMap map_trigger_in{13, 12, 6, 26};
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#ifdef PRALINE
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constexpr PinMap map_p1_ctrl0{2, 10, 0, 14, 0}; // SCU: 2, 10 | GPIO: 0, 14
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constexpr PinMap map_p1_ctrl1{6, 8, 5, 16, 4};
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constexpr PinMap map_p1_ctrl2{6, 9, 3, 5, 0};
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constexpr PinMap map_rf5072_mix_en{9, 0, 4, 12};
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constexpr PinMap map_p2_ctrl0{8, 3, 7, 3, 4};
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constexpr PinMap map_p2_ctrl1{8, 4, 7, 4, 4};
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constexpr PinMap map_aa_en{1, 14, 1, 7}; // Anti-Aliasing filter
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constexpr PinMap map_trigger_out{2, 6, 5, 6, 4};
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constexpr PinMap map_trigger_in{13, 12, 6, 26, 4};
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constexpr PinMap map_clkin_ctrl{1, 20, 0, 15, 0};
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constexpr PinMap map_rf5072_mix_en{9, 0, 4, 12, 0};
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constexpr PinMap map_aa_en{1, 14, 1, 7, 0}; // Anti-Aliasing filter
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constexpr PinMap map_sgpio_4{9, 4, 5, 17, 6};
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constexpr PinMap map_sgpio_8{8, 0, 4, 0, 4};
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constexpr PinMap map_sgpio_9{9, 3, 4, 15, 6};
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constexpr PinMap map_sgpio_10{8, 2, 4, 2, 4};
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constexpr PinMap map_en_1v2{8, 7, 4, 7, 0};
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constexpr PinMap map_vregmode{4, 9, 5, 13, 4};
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constexpr PinMap map_VAA_en{8, 1, 4, 1, 0};
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constexpr PinMap map_led_mcu{8, 6, 4, 6, 0};
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#else
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constexpr PinMap map_sgpio_4{6, 3, 3, 2, 2};
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constexpr PinMap map_sgpio_8{9, 6, 4, 11, 6};
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constexpr PinMap map_sgpio_9{4, 3, 2, 3, 7};
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constexpr PinMap map_sgpio_10{1, 14, 1, 7, 6};
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constexpr PinMap map_sgpio_13{4, 8, 5, 12, 4};
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constexpr PinMap map_og_1v8_en{6, 10, 3, 6, 0};
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constexpr PinMap map_r9_1v8_en{5, 0, 2, 9, 0};
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constexpr PinMap map_vregmode{6, 11, 3, 7, 0};
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constexpr PinMap map_og_VAA_en{5, 0, 2, 9, 0};
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constexpr PinMap map_r9_VAA_en{6, 10, 3, 6, 0};
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#endif
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constexpr PinMap map_sgpio_0{0, 0, 0, 0, 3};
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constexpr PinMap map_sgpio_1{0, 1, 0, 1, 3};
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constexpr PinMap map_sgpio_2{1, 15, 0, 2, 2};
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constexpr PinMap map_sgpio_3{1, 16, 0, 3, 2};
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constexpr PinMap map_sgpio_5{6, 6, 0, 5, 2};
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constexpr PinMap map_sgpio_6{2, 2, 5, 2, 0};
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constexpr PinMap map_sgpio_7{1, 0, 0, 4, 6};
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constexpr PinMap map_sgpio_11{1, 17, 0, 12, 6};
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constexpr PinMap map_sgpio_12{1, 18, 0, 13, 0};
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constexpr PinMap map_led_usb{4, 1, 2, 1, 0};
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constexpr PinMap map_led_rx{4, 2, 2, 2, 0};
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constexpr PinMap map_led_tx{6, 12, 2, 8, 0};
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#ifdef PRALINE
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// P1 Multiplexer control pins
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constexpr Pin pin_p1_ctrl0{map_p1_ctrl0.scu_port, map_p1_ctrl0.scu_pin}; // SCU: P2_10
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constexpr GPIO p1_ctrl0{pin_p1_ctrl0, map_p1_ctrl0.gpio_port, map_p1_ctrl0.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[0]14
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constexpr Pin pin_p1_ctrl0{map_p1_ctrl0.scu_port, map_p1_ctrl0.scu_pin}; // SCU: P2_10
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constexpr GPIO p1_ctrl0{pin_p1_ctrl0, map_p1_ctrl0.gpio_port, map_p1_ctrl0.gpio_pad, map_p1_ctrl0.gpio_mode}; // GPIO[0]14
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constexpr Pin pin_p1_ctrl1{map_p1_ctrl1.scu_port, map_p1_ctrl1.scu_pin}; // SCU: P6_8
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constexpr GPIO p1_ctrl1{pin_p1_ctrl1, map_p1_ctrl1.gpio_port, map_p1_ctrl1.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[5]16
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constexpr Pin pin_p1_ctrl1{map_p1_ctrl1.scu_port, map_p1_ctrl1.scu_pin}; // SCU: P6_8
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constexpr GPIO p1_ctrl1{pin_p1_ctrl1, map_p1_ctrl1.gpio_port, map_p1_ctrl1.gpio_pad, map_p1_ctrl1.gpio_mode}; // GPIO[5]16
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constexpr Pin pin_p1_ctrl2{map_p1_ctrl2.scu_port, map_p1_ctrl2.scu_pin}; // SCU: P6_9
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constexpr GPIO p1_ctrl2{pin_p1_ctrl2, map_p1_ctrl2.gpio_port, map_p1_ctrl2.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[3]5
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constexpr Pin pin_p1_ctrl2{map_p1_ctrl2.scu_port, map_p1_ctrl2.scu_pin}; // SCU: P6_9
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constexpr GPIO p1_ctrl2{pin_p1_ctrl2, map_p1_ctrl2.gpio_port, map_p1_ctrl2.gpio_pad, map_p1_ctrl2.gpio_mode}; // GPIO[3]5
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// P2 Multiplexer control pins
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constexpr Pin pin_p2_ctrl0{map_p2_ctrl0.scu_port, map_p2_ctrl0.scu_pin}; // SCU: PE_3
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constexpr GPIO p2_ctrl0{pin_p2_ctrl0, map_p2_ctrl0.gpio_port, map_p2_ctrl0.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[7]3
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constexpr Pin pin_p2_ctrl0{map_p2_ctrl0.scu_port, map_p2_ctrl0.scu_pin}; // SCU: PE_3
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constexpr GPIO p2_ctrl0{pin_p2_ctrl0, map_p2_ctrl0.gpio_port, map_p2_ctrl0.gpio_pad, map_p2_ctrl0.gpio_mode}; // GPIO[7]3
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constexpr Pin pin_p2_ctrl1{map_p2_ctrl1.scu_port, map_p2_ctrl1.scu_pin}; // SCU: PE_4
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constexpr GPIO p2_ctrl1{pin_p2_ctrl1, map_p2_ctrl1.gpio_port, map_p2_ctrl1.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[7]4
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constexpr Pin pin_p2_ctrl1{map_p2_ctrl1.scu_port, map_p2_ctrl1.scu_pin}; // SCU: PE_4
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constexpr GPIO p2_ctrl1{pin_p2_ctrl1, map_p2_ctrl1.gpio_port, map_p2_ctrl1.gpio_pad, map_p2_ctrl1.gpio_mode}; // GPIO[7]4
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// Trigger pins
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constexpr Pin trigger_out_pin{map_trigger_out.scu_port, map_trigger_out.scu_pin}; // SCU: P2_6
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constexpr GPIO trigger_out{trigger_out_pin, map_trigger_out.gpio_port, map_trigger_out.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[5]6
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constexpr Pin trigger_out_pin{map_trigger_out.scu_port, map_trigger_out.scu_pin}; // SCU: P2_6
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constexpr GPIO trigger_out{trigger_out_pin, map_trigger_out.gpio_port, map_trigger_out.gpio_pad, map_trigger_out.gpio_mode}; // GPIO[5]6
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constexpr Pin trigger_in_pin{map_trigger_in.scu_port, map_trigger_in.scu_pin}; // SCU: PD_12
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constexpr GPIO trigger_in{trigger_in_pin, map_trigger_in.gpio_port, map_trigger_in.gpio_pad, PAL_MODE_INPUT}; // GPIO[6]26
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constexpr Pin trigger_in_pin{map_trigger_in.scu_port, map_trigger_in.scu_pin}; // SCU: PD_12
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constexpr GPIO trigger_in{trigger_in_pin, map_trigger_in.gpio_port, map_trigger_in.gpio_pad, map_trigger_in.gpio_mode}; // GPIO[6]26
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// Clock input control
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constexpr Pin pin_clkin_ctrl{map_clkin_ctrl.scu_port, map_clkin_ctrl.scu_pin}; // SCU: P1_20
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constexpr GPIO clkin_ctrl{pin_clkin_ctrl, map_clkin_ctrl.gpio_port, map_clkin_ctrl.gpio_pad, map_clkin_ctrl.gpio_mode}; // GPIO[0]15
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// RF507x
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constexpr Pin pin_rf5072_mix_en{map_rf5072_mix_en.scu_port, map_rf5072_mix_en.scu_pin};
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constexpr GPIO rf5072_mix_en{pin_rf5072_mix_en, map_rf5072_mix_en.gpio_port, map_rf5072_mix_en.gpio_pad, 0};
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constexpr Pin pin_rf5072_mix_en{map_rf5072_mix_en.scu_port, map_rf5072_mix_en.scu_pin}; // SCU: P9_0
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constexpr GPIO rf5072_mix_en{pin_rf5072_mix_en, map_rf5072_mix_en.gpio_port, map_rf5072_mix_en.gpio_pad, map_rf5072_mix_en.gpio_mode}; // GPIO[4]12
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// Anti-Aliasing filter
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constexpr Pin pin_aa_en{map_aa_en.scu_port, map_aa_en.scu_pin};
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constexpr GPIO aa_en{pin_aa_en, map_aa_en.gpio_port, map_aa_en.gpio_pad, 0};
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constexpr Pin pin_aa_en{map_aa_en.scu_port, map_aa_en.scu_pin}; // SCU: P1_14
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constexpr GPIO aa_en{pin_aa_en, map_aa_en.gpio_port, map_aa_en.gpio_pad, map_aa_en.gpio_mode}; // GPIO[1]7
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constexpr Pin pin_en_1v2{map_en_1v2.scu_port, map_en_1v2.scu_pin}; // SCU: P8_7
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constexpr GPIO en_1v2{pin_en_1v2, map_en_1v2.gpio_port, map_en_1v2.gpio_pad, map_en_1v2.gpio_mode}; // GPIO[4]7
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constexpr Pin pin_VAA_en{map_VAA_en.scu_port, map_VAA_en.scu_pin}; // SCU: P8_1
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constexpr GPIO VAA_en{pin_VAA_en, map_VAA_en.gpio_port, map_VAA_en.gpio_pad, map_VAA_en.gpio_mode, Polarity::ActiveLow}; // GPIO[4]1
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constexpr Pin pin_led_usb{map_led_usb.scu_port, map_led_usb.scu_pin}; // SCU: P4_1
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constexpr GPIO led_usb{pin_led_usb, map_led_usb.gpio_port, map_led_usb.gpio_pad, map_led_usb.gpio_mode, Polarity::ActiveLow}; // GPIO[2]1
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constexpr Pin pin_led_rx{map_led_rx.scu_port, map_led_rx.scu_pin}; // SCU: P4_2
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constexpr GPIO led_rx{pin_led_rx, map_led_rx.gpio_port, map_led_rx.gpio_pad, map_led_rx.gpio_mode, Polarity::ActiveLow}; // GPIO[2]2
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constexpr Pin pin_led_tx{map_led_tx.scu_port, map_led_tx.scu_pin}; // SCU: P6_12
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constexpr GPIO led_tx{pin_led_tx, map_led_tx.gpio_port, map_led_tx.gpio_pad, map_led_tx.gpio_mode, Polarity::ActiveLow}; // GPIO[2]8
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constexpr Pin pin_led_mcu{map_led_mcu.scu_port, map_led_mcu.scu_pin}; // SCU: P8_6
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constexpr GPIO led_mcu{pin_led_mcu, map_led_mcu.gpio_port, map_led_mcu.gpio_pad, map_led_mcu.gpio_mode, Polarity::ActiveLow}; // GPIO[4]6
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#else
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constexpr Pin pin_sgpio_13{map_sgpio_13.scu_port, map_sgpio_13.scu_pin}; // SCU: P4_8
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constexpr GPIO sgpio_13{pin_sgpio_13, map_sgpio_13.gpio_port, map_sgpio_13.gpio_pad, map_sgpio_13.gpio_mode}; // GPIO[5]12
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constexpr Pin pin_og_1v8_en{map_og_1v8_en.scu_port, map_og_1v8_en.scu_pin}; // SCU: P6_10
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constexpr GPIO og_1v8_en{pin_og_1v8_en, map_og_1v8_en.gpio_port, map_og_1v8_en.gpio_pad, map_og_1v8_en.gpio_mode}; // GPIO[3]6
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constexpr Pin pin_r9_1v8_en{map_r9_1v8_en.scu_port, map_r9_1v8_en.scu_pin}; // SCU: P5_0
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constexpr GPIO r9_1v8_en{pin_r9_1v8_en, map_r9_1v8_en.gpio_port, map_r9_1v8_en.gpio_pad, map_r9_1v8_en.gpio_mode}; // GPIO[2]9
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constexpr Pin pin_og_VAA_en{map_og_VAA_en.scu_port, map_og_VAA_en.scu_pin}; // SCU: P5_0
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constexpr GPIO og_VAA_en{pin_og_VAA_en, map_og_VAA_en.gpio_port, map_og_VAA_en.gpio_pad, map_og_VAA_en.gpio_mode, Polarity::ActiveLow}; // GPIO[2]9
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constexpr Pin pin_r9_VAA_en{map_r9_VAA_en.scu_port, map_r9_VAA_en.scu_pin}; // SCU: P6_10
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constexpr GPIO r9_VAA_en{pin_r9_VAA_en, map_r9_VAA_en.gpio_port, map_r9_VAA_en.gpio_pad, map_r9_VAA_en.gpio_mode, Polarity::ActiveLow}; // GPIO[3]6
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constexpr Pin pin_led_usb{map_led_usb.scu_port, map_led_usb.scu_pin}; // SCU: P4_1
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constexpr GPIO led_usb{pin_led_usb, map_led_usb.gpio_port, map_led_usb.gpio_pad, map_led_usb.gpio_mode}; // GPIO[2]1
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constexpr Pin pin_led_rx{map_led_rx.scu_port, map_led_rx.scu_pin}; // SCU: P4_2
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constexpr GPIO led_rx{pin_led_rx, map_led_rx.gpio_port, map_led_rx.gpio_pad, map_led_rx.gpio_mode}; // GPIO[2]2
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constexpr Pin pin_led_tx{map_led_tx.scu_port, map_led_tx.scu_pin}; // SCU: P6_12
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constexpr GPIO led_tx{pin_led_tx, map_led_tx.gpio_port, map_led_tx.gpio_pad, map_led_tx.gpio_mode}; // GPIO[2]8
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static const motocon_pwm_resources_t motocon_pwm_resources = {
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.base = {.clk = &LPC_CGU->BASE_APB1_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 1)},
|
||||
.branch = {.cfg = &LPC_CCU1->CLK_APB1_MOTOCON_PWM_CFG, .stat = &LPC_CCU1->CLK_APB1_MOTOCON_PWM_STAT},
|
||||
.reset = {.output_index = 38},
|
||||
};
|
||||
|
||||
static const scu_setup_t pin_setup_vaa_enablex_pwm = {5, 0, scu_config_normal_drive_t{.mode = 1, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
static const scu_setup_t pin_setup_vaa_enablex_gpio_og = {map_og_VAA_en.scu_port, map_og_VAA_en.scu_pin, scu_config_normal_drive_t{.mode = map_og_VAA_en.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
static const scu_setup_t pin_setup_vaa_enablex_gpio_r9 = {map_r9_VAA_en.scu_port, map_r9_VAA_en.scu_pin, scu_config_normal_drive_t{.mode = map_r9_VAA_en.gpio_mode, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
|
||||
} // namespace gpio_control
|
||||
#endif
|
||||
|
||||
// SGPIO
|
||||
constexpr Pin pin_sgpio_0{map_sgpio_0.scu_port, map_sgpio_0.scu_pin}; // SCU: P0_0
|
||||
constexpr GPIO sgpio_0{pin_sgpio_0, map_sgpio_0.gpio_port, map_sgpio_0.gpio_pad, map_sgpio_0.gpio_mode}; // GPIO[0]0
|
||||
|
||||
constexpr Pin pin_sgpio_1{map_sgpio_1.scu_port, map_sgpio_1.scu_pin}; // SCU: P0_1
|
||||
constexpr GPIO sgpio_1{pin_sgpio_1, map_sgpio_1.gpio_port, map_sgpio_1.gpio_pad, map_sgpio_1.gpio_mode}; // GPIO[0]1
|
||||
|
||||
constexpr Pin pin_sgpio_2{map_sgpio_2.scu_port, map_sgpio_2.scu_pin}; // SCU: P1_15
|
||||
constexpr GPIO sgpio_2{pin_sgpio_2, map_sgpio_2.gpio_port, map_sgpio_2.gpio_pad, map_sgpio_2.gpio_mode}; // GPIO[0]2
|
||||
|
||||
constexpr Pin pin_sgpio_3{map_sgpio_3.scu_port, map_sgpio_3.scu_pin}; // SCU: P1_16
|
||||
constexpr GPIO sgpio_3{pin_sgpio_3, map_sgpio_3.gpio_port, map_sgpio_3.gpio_pad, map_sgpio_3.gpio_mode}; // GPIO[0]3
|
||||
|
||||
constexpr Pin pin_sgpio_4{map_sgpio_4.scu_port, map_sgpio_4.scu_pin}; // SCU: P6_3, PRALINE: P9_4
|
||||
constexpr GPIO sgpio_4{pin_sgpio_4, map_sgpio_4.gpio_port, map_sgpio_4.gpio_pad, map_sgpio_4.gpio_mode}; // GPIO[6]3 PRALINE: GPIO[5]17
|
||||
|
||||
constexpr Pin pin_sgpio_5{map_sgpio_5.scu_port, map_sgpio_5.scu_pin}; // SCU: P6_6
|
||||
constexpr GPIO sgpio_5{pin_sgpio_5, map_sgpio_5.gpio_port, map_sgpio_5.gpio_pad, map_sgpio_5.gpio_mode}; // GPIO[0]5
|
||||
|
||||
constexpr Pin pin_sgpio_6{map_sgpio_6.scu_port, map_sgpio_6.scu_pin}; // SCU: P2_2
|
||||
constexpr GPIO sgpio_6{pin_sgpio_6, map_sgpio_6.gpio_port, map_sgpio_6.gpio_pad, map_sgpio_6.gpio_mode}; // GPIO[5]2
|
||||
|
||||
constexpr Pin pin_sgpio_7{map_sgpio_7.scu_port, map_sgpio_7.scu_pin}; // SCU: P1_0
|
||||
constexpr GPIO sgpio_7{pin_sgpio_7, map_sgpio_7.gpio_port, map_sgpio_7.gpio_pad, map_sgpio_7.gpio_mode}; // GPIO[0]4
|
||||
|
||||
constexpr Pin pin_sgpio_8{map_sgpio_8.scu_port, map_sgpio_8.scu_pin}; // SCU: P9_6, PRALINE: P8_0
|
||||
constexpr GPIO sgpio_8{pin_sgpio_8, map_sgpio_8.gpio_port, map_sgpio_8.gpio_pad, map_sgpio_8.gpio_mode}; // GPIO[4]11, PRALINE: GPIO[4]0
|
||||
|
||||
constexpr Pin pin_sgpio_9{map_sgpio_9.scu_port, map_sgpio_9.scu_pin}; // SCU: P4_3, PRALINE: P9_3
|
||||
constexpr GPIO sgpio_9{pin_sgpio_9, map_sgpio_9.gpio_port, map_sgpio_9.gpio_pad, map_sgpio_9.gpio_mode}; // GPIO[2]3, PRALINE: GPIO[4]12
|
||||
|
||||
constexpr Pin pin_sgpio_10{map_sgpio_10.scu_port, map_sgpio_10.scu_pin}; // SCU: P1_14, PRALINE: P8_2
|
||||
constexpr GPIO sgpio_10{pin_sgpio_10, map_sgpio_10.gpio_port, map_sgpio_10.gpio_pad, map_sgpio_10.gpio_mode}; // GPIO[1]7, PRALINE: GPIO[4]2
|
||||
|
||||
constexpr Pin pin_sgpio_11{map_sgpio_11.scu_port, map_sgpio_11.scu_pin}; // SCU: P1_17
|
||||
constexpr GPIO sgpio_11{pin_sgpio_11, map_sgpio_11.gpio_port, map_sgpio_11.gpio_pad, map_sgpio_11.gpio_mode}; // GPIO[0]17
|
||||
|
||||
constexpr Pin pin_sgpio_12{map_sgpio_12.scu_port, map_sgpio_12.scu_pin}; // SCU: P1_18
|
||||
constexpr GPIO sgpio_12{pin_sgpio_12, map_sgpio_12.gpio_port, map_sgpio_12.gpio_pad, map_sgpio_12.gpio_mode}; // GPIO[0]13
|
||||
|
||||
constexpr Pin pin_vregmode{map_vregmode.scu_port, map_vregmode.scu_pin}; // SCU: P6_11, PRALINE: P4_9
|
||||
constexpr GPIO vregmode{pin_vregmode, map_vregmode.gpio_port, map_vregmode.gpio_pad, map_vregmode.gpio_mode}; // GPIO[3]7, PRALINE: GPIO[5]13
|
||||
} // namespace gpio_control
|
||||
|
||||
namespace power_control {
|
||||
|
||||
void vaa_power_on(void);
|
||||
@@ -376,16 +555,6 @@ void aux_power_off(void);
|
||||
void core_power_on(void);
|
||||
void core_power_off(void);
|
||||
|
||||
static const motocon_pwm_resources_t motocon_pwm_resources = {
|
||||
.base = {.clk = &LPC_CGU->BASE_APB1_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 1)},
|
||||
.branch = {.cfg = &LPC_CCU1->CLK_APB1_MOTOCON_PWM_CFG, .stat = &LPC_CCU1->CLK_APB1_MOTOCON_PWM_STAT},
|
||||
.reset = {.output_index = 38},
|
||||
};
|
||||
|
||||
static const scu_setup_t pin_setup_vaa_enablex_pwm = {5, 0, scu_config_normal_drive_t{.mode = 1, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
static const scu_setup_t pin_setup_vaa_enablex_gpio_og = {5, 0, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
static const scu_setup_t pin_setup_vaa_enablex_gpio_r9 = {6, 10, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
|
||||
} // namespace power_control
|
||||
|
||||
#endif /*__GPIO_H__*/
|
||||
|
||||
Reference in New Issue
Block a user