Addressed clock inversion and fractional/interger states for 3.072 MHz sampling rate (#3057)

* Addressed clock inversion and fractiona/interger states. Created ui_debug display that checks expected clock frequencies for expected 3.072 MHz sampling frequency commonly utilizaed in portapack apps.

* Ran format-code.sh
This commit is contained in:
stafur
2026-03-01 15:28:36 -05:00
committed by GitHub
parent 3a54b112ec
commit b8ca356ce3
4 changed files with 330 additions and 4 deletions
@@ -274,7 +274,6 @@ AnalogAudioView::AnalogAudioView(
&button_pro
#else
&waterfall
#endif
});