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Addressed clock inversion and fractional/interger states for 3.072 MHz sampling rate (#3057)
* Addressed clock inversion and fractiona/interger states. Created ui_debug display that checks expected clock frequencies for expected 3.072 MHz sampling frequency commonly utilizaed in portapack apps. * Ran format-code.sh
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@@ -274,7 +274,6 @@ AnalogAudioView::AnalogAudioView(
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&button_pro
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#else
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&waterfall
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#endif
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});
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