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cfd74c2954
* Add STM32G0B1 target support Introduce support for STM32G0B1 microcontrollers, including target-specific JSON files, linker scripts, and runtime initialization. This update adds hardware support for GPIO, UART, SPI, I2C, timers, and additional board-specific configurations like Nucleo-G0B1RE. * Update STM32G0 clock initialization to 64MHz and adjust related configurations Reconfigure STM32G0 to use a 64MHz system clock via PLL with HSI16 as the source. Update flash latency, prescaler settings, and I2C timing values to reflect the new frequency. * Cleanup * Cleanup * Add STM32G0-specific UART implementation Introduce a new UART implementation for the STM32G0 series with chip-specific setup and configuration methods. Update the generic STM32 UART code to exclude STM32G0. * Refactor STM32G0 runtime and machine code to utilize chip-specific register access functions Simplify and standardize register operations with dedicated setter methods in the STM32G0 runtime and machine code and cleanup redundant syntax. * Remove redundant commented-out APBENR1 register operations in STM32G0 machine code * Introduce FDCAN support for STM32G0B1 series Add FDCAN peripheral implementation targeting STM32G0B1, including support for standard, extended identifiers, and bit rate configuration. Update board files to include FDCAN pins, instances, and clock configuration for Nucleo-G0B1RE and Amken Trio boards.
86 lines
1.8 KiB
Go
86 lines
1.8 KiB
Go
//go:build stm32g0
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package machine
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// SPI on STM32G0 uses 16-bit registers
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import (
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"device/stm32"
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"unsafe"
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)
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// SPIConfig is used to store config info for SPI.
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type SPIConfig struct {
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Frequency uint32
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SCK Pin
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SDO Pin
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SDI Pin
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LSBFirst bool
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Mode uint8
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}
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// Configure is intended to setup the STM32 SPI peripheral
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func (spi *SPI) Configure(config SPIConfig) error {
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// enable clock for SPI
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enableAltFuncClock(unsafe.Pointer(spi.Bus))
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// Get SPI baud rate divisor
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conf := spi.getBaudRate(config)
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// set polarity and phase on the SPI interface
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switch config.Mode {
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case Mode1:
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conf |= stm32.SPI_CR1_CPHA
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case Mode2:
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conf |= stm32.SPI_CR1_CPOL
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case Mode3:
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conf |= stm32.SPI_CR1_CPOL | stm32.SPI_CR1_CPHA
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}
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// set bit transfer order
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if config.LSBFirst {
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conf |= stm32.SPI_CR1_LSBFIRST
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}
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// set SPI master
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conf |= stm32.SPI_CR1_MSTR | stm32.SPI_CR1_SSI
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// enable the SPI interface
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conf |= stm32.SPI_CR1_SPE
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// use software CS (GPIO) by default
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conf |= stm32.SPI_CR1_SSM
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// now set the configuration (note: STM32G0 uses 16-bit SPI registers)
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spi.Bus.CR1.Set(uint16(conf))
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// Series-specific configuration to set 8-bit transfer mode
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spi.config8Bits()
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// enable SPI
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spi.Bus.CR1.SetBits(stm32.SPI_CR1_SPE)
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return nil
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}
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// Transfer writes/reads a single byte using the SPI interface.
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func (spi *SPI) Transfer(w byte) (byte, error) {
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// Write data to be transmitted to the SPI data register
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spi.Bus.DR.Set(uint16(w))
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// Wait until transmit complete
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for !spi.Bus.SR.HasBits(stm32.SPI_SR_TXE) {
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}
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// Wait until receive complete
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for !spi.Bus.SR.HasBits(stm32.SPI_SR_RXNE) {
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}
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// Wait until SPI is not busy
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for spi.Bus.SR.HasBits(stm32.SPI_SR_BSY) {
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}
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// Return received data from SPI data register
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return byte(spi.Bus.DR.Get()), nil
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}
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