mirror of
https://github.com/tinygo-org/tinygo.git
synced 2026-08-06 20:13:40 +00:00
Ayke van Laethem
b67351babe
Previously, the machine.UART0 object had two meanings:
- it was the first UART on the chip
- it was the default output for println
These two meanings conflict, and resulted in workarounds like:
- Defining UART0 to refer to the USB-CDC interface (atsamd21,
atsamd51, nrf52840), even though that clearly isn't an UART.
- Defining NRF_UART0 to avoid a conflict with UART0 (which was
redefined as a USB-CDC interface).
- Defining aliases like UART0 = UART1, which refer to the same
hardware peripheral (stm32).
This commit changes this to use a new machine.Serial object for the
default serial port. It might refer to the first or second UART
depending on the board, or even to the USB-CDC interface. Also, UART0
now really refers to the first UART on the chip, no longer to a USB-CDC
interface.
The changes in the runtime package are all just search+replace. The
changes in the machine package are a mixture of search+replace and
manual modifications.
This commit does not affect binary size, in fact it doesn't affect the
resulting binary at all.
85 lines
2.2 KiB
Go
85 lines
2.2 KiB
Go
// +build stm32l0
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package runtime
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import (
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"device/stm32"
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"machine"
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)
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const (
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RCC_SYSCLK_DIV1 = 0 // Needs SVD update (should be stm32.RCC_SYSCLK_DIV1)
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)
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type arrtype = uint16
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func putchar(c byte) {
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machine.Serial.WriteByte(c)
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}
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func initCLK() {
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// Set Power Regulator to enable max performance (1.8V)
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stm32.PWR.CR.ReplaceBits(1<<stm32.PWR_CR_VOS_Pos, stm32.PWR_CR_VOS_Msk, 0)
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// Calibration (default 0x10)
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stm32.RCC.ICSCR.ReplaceBits(0x10<<stm32.RCC_ICSCR_HSI16TRIM_Pos, stm32.RCC_ICSCR_HSI16TRIM_Msk, 0)
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// Enable the HSI16 oscillator, since the L0 series boots to the MSI one.
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stm32.RCC.CR.ReplaceBits(stm32.RCC_CR_HSI16ON, stm32.RCC_CR_HSI16ON_Msk|stm32.RCC_CR_HSI16DIVEN_Msk, 0)
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// Wait for HSI16 to be ready
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for !stm32.RCC.CR.HasBits(stm32.RCC_CR_HSI16RDYF) {
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}
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// Disable PLL
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stm32.RCC.CR.ClearBits(stm32.RCC_CR_PLLON)
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// Wait for PLL to be disabled
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for stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) {
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}
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// Configure the PLL to use HSI16 with a PLLDIV of 2 and PLLMUL of 4.
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stm32.RCC.CFGR.ReplaceBits(
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(stm32.RCC_CFGR_PLLSRC_HSI16<<stm32.RCC_CFGR_PLLSRC_Pos)|
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(stm32.RCC_CFGR_PLLMUL_Mul4<<stm32.RCC_CFGR_PLLMUL_Pos)|
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(stm32.RCC_CFGR_PLLDIV_Div2<<stm32.RCC_CFGR_PLLDIV_Pos),
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stm32.RCC_CFGR_PLLSRC_Msk|
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stm32.RCC_CFGR_PLLMUL_Msk|
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stm32.RCC_CFGR_PLLDIV_Msk,
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0)
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// Enable PLL
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stm32.RCC.CR.SetBits(stm32.RCC_CR_PLLON)
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// Wait for PLL to be ready
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for !stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) {
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}
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// Adjust flash latency
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if FlashLatency > getFlashLatency() {
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setFlashLatency(FlashLatency)
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for getFlashLatency() != FlashLatency {
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}
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}
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// HCLK
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stm32.RCC.CFGR.ReplaceBits(RCC_SYSCLK_DIV1, stm32.RCC_CFGR_HPRE_Msk, 0)
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// Use PLL As System clock
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stm32.RCC.CFGR.ReplaceBits(stm32.RCC_CFGR_SWS_PLL, stm32.RCC_CFGR_SW_Msk, 0)
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for stm32.RCC.CFGR.Get()&stm32.RCC_CFGR_SW_Msk != stm32.RCC_CFGR_SWS_PLL {
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}
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// Set prescalers so half system clock (PCLKx = HCLK/2)
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stm32.RCC.CFGR.SetBits(stm32.RCC_CFGR_PPRE1_Div2 << stm32.RCC_CFGR_PPRE1_Pos)
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stm32.RCC.CFGR.SetBits(stm32.RCC_CFGR_PPRE2_Div2 << stm32.RCC_CFGR_PPRE2_Pos)
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}
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func getFlashLatency() uint32 {
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return stm32.FLASH.ACR.Get() & stm32.Flash_ACR_LATENCY_Msk
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}
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func setFlashLatency(l uint32) {
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stm32.FLASH.ACR.ReplaceBits(l, stm32.Flash_ACR_LATENCY_Msk, 0)
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}
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