mirror of
https://github.com/tinygo-org/tinygo.git
synced 2026-08-07 20:43:40 +00:00
Ayke van Laethem
8cd2a462b9
There is no reason to specialize this per chip as it is only ever used for JavaScript. Not only that, it is causing confusion and is yet another quirk to learn when porting the runtime to a new microcontroller.
261 lines
6.6 KiB
Go
261 lines
6.6 KiB
Go
// +build stm32,stm32l4x2
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package runtime
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import (
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"device/stm32"
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"machine"
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)
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/*
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clock settings
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+-------------+-----------+
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| LSE | 32.768khz |
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| SYSCLK | 80mhz |
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| HCLK | 80mhz |
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| APB1(PCLK1) | 80mhz |
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| APB2(PCLK2) | 80mhz |
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+-------------+-----------+
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*/
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const (
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HSE_STARTUP_TIMEOUT = 0x0500
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PLL_M = 1
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PLL_N = 40
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PLL_P = RCC_PLLP_DIV7
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PLL_Q = RCC_PLLQ_DIV2
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PLL_R = RCC_PLLR_DIV2
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MSIRANGE = stm32.RCC_CR_MSIRANGE_Range4M
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PWR_CR1_VOS_0 = 1 << stm32.PWR_CR1_VOS_Pos
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PWR_CR1_VOS_1 = 2 << stm32.PWR_CR1_VOS_Pos
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PWR_REGULATOR_VOLTAGE_SCALE1 = PWR_CR1_VOS_0
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PWR_REGULATOR_VOLTAGE_SCALE2 = PWR_CR1_VOS_1
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FLASH_LATENCY_0 = 0
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FLASH_LATENCY_1 = 1
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FLASH_LATENCY_2 = 2
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FLASH_LATENCY_3 = 3
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FLASH_LATENCY_4 = 4
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RCC_PLLP_DIV7 = 7
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RCC_PLLQ_DIV2 = 2
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RCC_PLLR_DIV2 = 2
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RCC_CFGR_SWS_MSI = 0x0
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RCC_CFGR_SWS_PLL = 0xC
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RCC_PLLSOURCE_MSI = 1
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RCC_PLL_SYSCLK = stm32.RCC_PLLCFGR_PLLREN
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)
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/*
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timer settings used for tick and sleep.
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note: TICK_TIMER_FREQ and SLEEP_TIMER_FREQ are controlled by PLL / clock
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settings above, so must be kept in sync if the clock settings are changed.
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*/
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const (
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TICK_RATE = 1000 // 1 KHz
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TICK_TIMER_IRQ = stm32.IRQ_TIM1_UP_TIM16
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TICK_TIMER_FREQ = 80000000 // 80 MHz
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SLEEP_TIMER_IRQ = stm32.IRQ_TIM1_BRK_TIM15
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SLEEP_TIMER_FREQ = 80000000 // 84 MHz
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)
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type arrtype = uint32
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func init() {
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initCLK()
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initSleepTimer(&timerInfo{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM15EN,
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Device: stm32.TIM15,
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})
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machine.UART0.Configure(machine.UARTConfig{})
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initTickTimer(&timerInfo{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM16EN,
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Device: stm32.TIM16,
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})
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}
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func putchar(c byte) {
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machine.UART0.WriteByte(c)
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}
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func initCLK() {
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// PWR_CLK_ENABLE
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_PWREN)
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_ = stm32.RCC.APB1ENR1.Get()
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// Disable Backup domain protection
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if !stm32.PWR.CR1.HasBits(stm32.PWR_CR1_DBP) {
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stm32.PWR.CR1.SetBits(stm32.PWR_CR1_DBP)
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for !stm32.PWR.CR1.HasBits(stm32.PWR_CR1_DBP) {
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}
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}
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// Set LSE Drive to LOW
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stm32.RCC.BDCR.ReplaceBits(0, stm32.RCC_BDCR_LSEDRV_Msk, 0)
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// Initialize the High-Speed External Oscillator
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initOsc()
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// PWR_VOLTAGESCALING_CONFIG
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stm32.PWR.CR1.ReplaceBits(0, stm32.PWR_CR1_VOS_Msk, 0)
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_ = stm32.PWR.CR1.Get()
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// Set flash wait states (min 5 latency units) based on clock
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if (stm32.FLASH.ACR.Get() & 0xF) < 5 {
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stm32.FLASH.ACR.ReplaceBits(5, 0xF, 0)
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}
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// Ensure HCLK does not exceed max during transition
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stm32.RCC.CFGR.ReplaceBits(8<<stm32.RCC_CFGR_HPRE_Pos, stm32.RCC_CFGR_HPRE_Msk, 0)
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// Set SYSCLK source and wait
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// (3 = RCC_SYSCLKSOURCE_PLLCLK, 2=RCC_CFGR_SWS_Pos)
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stm32.RCC.CFGR.ReplaceBits(3, stm32.RCC_CFGR_SW_Msk, 0)
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for stm32.RCC.CFGR.Get()&(3<<2) != (3 << 2) {
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}
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// Set HCLK
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// (0 = RCC_SYSCLKSOURCE_PLLCLK)
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stm32.RCC.CFGR.ReplaceBits(0, stm32.RCC_CFGR_HPRE_Msk, 0)
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// Set flash wait states (max 5 latency units) based on clock
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if (stm32.FLASH.ACR.Get() & 0xF) > 5 {
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stm32.FLASH.ACR.ReplaceBits(5, 0xF, 0)
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}
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// Set APB1 and APB2 clocks (0 = DIV1)
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stm32.RCC.CFGR.ReplaceBits(0, stm32.RCC_CFGR_PPRE1_Msk, 0)
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stm32.RCC.CFGR.ReplaceBits(0, stm32.RCC_CFGR_PPRE2_Msk, 0)
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}
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func initOsc() {
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sysclkSource := stm32.RCC.CFGR.Get() & stm32.RCC_CFGR_SWS_Msk
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pllConfig := stm32.RCC.PLLCFGR.Get() & stm32.RCC_PLLCFGR_PLLSRC_Msk
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// Enable MSI, adjusting flash latency
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if sysclkSource == RCC_CFGR_SWS_MSI ||
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(sysclkSource == RCC_CFGR_SWS_PLL && pllConfig == RCC_PLLSOURCE_MSI) {
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if MSIRANGE > getMSIRange() {
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setFlashLatencyFromMSIRange(MSIRANGE)
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setMSIFreq(MSIRANGE, 0)
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} else {
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setMSIFreq(MSIRANGE, 0)
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if sysclkSource == RCC_CFGR_SWS_MSI {
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setFlashLatencyFromMSIRange(MSIRANGE)
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}
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}
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} else {
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stm32.RCC.CR.SetBits(stm32.RCC_CR_MSION)
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for !stm32.RCC.CR.HasBits(stm32.RCC_CR_MSIRDY) {
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}
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setMSIFreq(MSIRANGE, 0)
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}
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// Enable LSE, wait until ready
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stm32.RCC.BDCR.SetBits(stm32.RCC_BDCR_LSEON)
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for !stm32.RCC.BDCR.HasBits(stm32.RCC_BDCR_LSEON) {
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}
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// Disable the PLL, wait until disabled
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stm32.RCC.CR.ClearBits(stm32.RCC_CR_PLLON)
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for stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) {
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}
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// Configure the PLL
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stm32.RCC.PLLCFGR.ReplaceBits(
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(1)| // 1 = RCC_PLLSOURCE_MSI
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(PLL_M-1)<<stm32.RCC_PLLCFGR_PLLM_Pos|
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(PLL_N<<stm32.RCC_PLLCFGR_PLLN_Pos)|
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(((PLL_Q>>1)-1)<<stm32.RCC_PLLCFGR_PLLQ_Pos)|
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(((PLL_R>>1)-1)<<stm32.RCC_PLLCFGR_PLLR_Pos)|
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(PLL_P<<stm32.RCC_PLLCFGR_PLLPDIV_Pos),
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stm32.RCC_PLLCFGR_PLLSRC_Msk|stm32.RCC_PLLCFGR_PLLM_Msk|
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stm32.RCC_PLLCFGR_PLLN_Msk|stm32.RCC_PLLCFGR_PLLP_Msk|
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stm32.RCC_PLLCFGR_PLLR_Msk|stm32.RCC_PLLCFGR_PLLPDIV_Msk,
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0)
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// Enable the PLL and PLL System Clock Output, wait until ready
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stm32.RCC.CR.SetBits(stm32.RCC_CR_PLLON)
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stm32.RCC.PLLCFGR.SetBits(stm32.RCC_PLLCFGR_PLLREN) // = RCC_PLL_SYSCLK
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for !stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) {
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}
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// Enable system clock output
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stm32.RCC.PLLCFGR.SetBits(RCC_PLL_SYSCLK)
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}
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func getMSIRange() uint32 {
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if stm32.RCC.CR.HasBits(stm32.RCC_CR_MSIRGSEL) {
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return (stm32.RCC.CR.Get() & stm32.RCC_CR_MSIRANGE_Msk) >> stm32.RCC_CR_MSIRANGE_Pos
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}
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return (stm32.RCC.CSR.Get() & stm32.RCC_CSR_MSISRANGE_Msk) >> stm32.RCC_CSR_MSISRANGE_Pos
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}
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func setMSIFreq(r uint32, calibration uint32) {
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stm32.RCC.CR.SetBits(stm32.RCC_CR_MSIRGSEL)
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stm32.RCC.CR.ReplaceBits(r<<stm32.RCC_CR_MSIRANGE_Pos, stm32.RCC_CR_MSIRANGE_Msk, 0)
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stm32.RCC.ICSCR.ReplaceBits(calibration<<stm32.RCC_ICSCR_MSITRIM_Pos, stm32.RCC_ICSCR_MSITRIM_Msk, 0)
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}
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func setFlashLatencyFromMSIRange(r uint32) {
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var vos uint32
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if pwrIsClkEnabled() {
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vos = pwrExGetVoltageRange()
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} else {
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pwrClkEnable()
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vos = pwrExGetVoltageRange()
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pwrClkDisable()
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}
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latency := uint32(FLASH_LATENCY_0)
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if vos == PWR_REGULATOR_VOLTAGE_SCALE1 {
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if r > stm32.RCC_CR_MSIRANGE_Range16M {
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if r > stm32.RCC_CR_MSIRANGE_Range32M {
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latency = FLASH_LATENCY_2
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} else {
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latency = FLASH_LATENCY_1
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}
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}
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} else if r > stm32.RCC_CR_MSIRANGE_Range16M {
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latency = FLASH_LATENCY_3
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} else {
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if r == stm32.RCC_CR_MSIRANGE_Range16M {
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latency = FLASH_LATENCY_2
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} else if r == stm32.RCC_CR_MSIRANGE_Range8M {
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latency = FLASH_LATENCY_1
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}
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}
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stm32.FLASH.ACR.ReplaceBits(latency, stm32.Flash_ACR_LATENCY_Msk, 0)
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}
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func pwrIsClkEnabled() bool {
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return stm32.RCC.APB1ENR1.HasBits(stm32.RCC_APB1ENR1_PWREN)
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}
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func pwrClkEnable() {
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_PWREN)
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}
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func pwrClkDisable() {
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stm32.RCC.APB1ENR1.ClearBits(stm32.RCC_APB1ENR1_PWREN)
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}
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func pwrExGetVoltageRange() uint32 {
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return stm32.PWR.CR1.Get() & stm32.PWR_CR1_VOS_Msk
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}
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