mirror of
https://github.com/tinygo-org/tinygo.git
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Ayke van Laethem
8cd2a462b9
There is no reason to specialize this per chip as it is only ever used for JavaScript. Not only that, it is causing confusion and is yet another quirk to learn when porting the runtime to a new microcontroller.
129 lines
3.3 KiB
Go
129 lines
3.3 KiB
Go
// +build stm32,stm32f7x2
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package runtime
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import (
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"device/stm32"
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"machine"
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)
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/*
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clock settings
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+-------------+--------+
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| HSE | 8mhz |
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| SYSCLK | 216mhz |
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| HCLK | 216mhz |
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| APB1(PCLK1) | 27mhz |
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| APB2(PCLK2) | 108mhz |
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+-------------+--------+
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*/
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const (
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HSE_STARTUP_TIMEOUT = 0x0500
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PLL_M = 4
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PLL_N = 216
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PLL_P = 2
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PLL_Q = 2
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)
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/*
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timer settings used for tick and sleep.
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note: TICK_TIMER_FREQ and SLEEP_TIMER_FREQ are controlled by PLL / clock
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settings above, so must be kept in sync if the clock settings are changed.
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*/
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const (
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TICK_RATE = 1000 // 1 KHz
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SLEEP_TIMER_IRQ = stm32.IRQ_TIM3
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SLEEP_TIMER_FREQ = 54000000 // 54 MHz (2x APB1)
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TICK_TIMER_IRQ = stm32.IRQ_TIM7
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TICK_TIMER_FREQ = 54000000 // 54 MHz (2x APB1)
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)
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type arrtype = uint32
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func init() {
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initCLK()
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initSleepTimer(&timerInfo{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM3EN,
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Device: stm32.TIM3,
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})
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machine.UART0.Configure(machine.UARTConfig{})
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initTickTimer(&timerInfo{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM7EN,
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Device: stm32.TIM7,
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})
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}
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func putchar(c byte) {
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machine.UART0.WriteByte(c)
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}
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func initCLK() {
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// PWR_CLK_ENABLE
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_PWREN)
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_ = stm32.RCC.APB1ENR.Get()
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// PWR_VOLTAGESCALING_CONFIG
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stm32.PWR.CR1.ReplaceBits(0x3<<stm32.PWR_CR1_VOS_Pos, stm32.PWR_CR1_VOS_Msk, 0)
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_ = stm32.PWR.CR1.Get()
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// Initialize the High-Speed External Oscillator
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initOsc()
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// Set flash wait states (min 7 latency units) based on clock
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if (stm32.FLASH.ACR.Get() & stm32.FLASH_ACR_LATENCY_Msk) < 7 {
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stm32.FLASH.ACR.ReplaceBits(7, stm32.FLASH_ACR_LATENCY_Msk, 0)
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}
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// HCLK (0x1C00 = DIV_16, 0x0 = RCC_SYSCLK_DIV1) - ensure timers remain
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// within spec as the SYSCLK source changes.
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stm32.RCC.CFGR.ReplaceBits(0x00001C00, stm32.RCC_CFGR_PPRE1_Msk, 0)
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stm32.RCC.CFGR.ReplaceBits(0x00001C00<<3, stm32.RCC_CFGR_PPRE2_Msk, 0)
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stm32.RCC.CFGR.ReplaceBits(0, stm32.RCC_CFGR_HPRE_Msk, 0)
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// Set SYSCLK source and wait
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// (2 = PLLCLK, 3 = RCC_CFGR_SW mask, 3 << 3 = RCC_CFGR_SWS mask)
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stm32.RCC.CFGR.ReplaceBits(2, 3, 0)
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for stm32.RCC.CFGR.Get()&(3<<2) != (2 << 2) {
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}
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// Set flash wait states (max 7 latency units) based on clock
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if (stm32.FLASH.ACR.Get() & stm32.FLASH_ACR_LATENCY_Msk) > 7 {
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stm32.FLASH.ACR.ReplaceBits(7, stm32.FLASH_ACR_LATENCY_Msk, 0)
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}
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// Set APB1 and APB2 clocks (0x1800 = DIV8, 0x1000 = DIV2)
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stm32.RCC.CFGR.ReplaceBits(0x1800, stm32.RCC_CFGR_PPRE1_Msk, 0)
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stm32.RCC.CFGR.ReplaceBits(0x1000<<3, stm32.RCC_CFGR_PPRE2_Msk, 0)
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}
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func initOsc() {
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// Enable HSE, wait until ready
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stm32.RCC.CR.SetBits(stm32.RCC_CR_HSEON)
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for !stm32.RCC.CR.HasBits(stm32.RCC_CR_HSERDY) {
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}
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// Disable the PLL, wait until disabled
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stm32.RCC.CR.ClearBits(stm32.RCC_CR_PLLON)
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for stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) {
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}
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// Configure the PLL
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stm32.RCC.PLLCFGR.Set(0x20000000 |
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(1 << stm32.RCC_PLLCFGR_PLLSRC_Pos) | // 1 = HSE
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PLL_M |
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(PLL_N << stm32.RCC_PLLCFGR_PLLN_Pos) |
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(((PLL_P >> 1) - 1) << stm32.RCC_PLLCFGR_PLLP_Pos) |
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(PLL_Q << stm32.RCC_PLLCFGR_PLLQ_Pos))
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// Enable the PLL, wait until ready
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stm32.RCC.CR.SetBits(stm32.RCC_CR_PLLON)
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for !stm32.RCC.CR.HasBits(stm32.RCC_CR_PLLRDY) {
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}
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}
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