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8cd2a462b9
There is no reason to specialize this per chip as it is only ever used for JavaScript. Not only that, it is causing confusion and is yet another quirk to learn when porting the runtime to a new microcontroller.
139 lines
3.1 KiB
Go
139 lines
3.1 KiB
Go
// +build mimxrt1062
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package runtime
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import (
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"device/arm"
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"device/nxp"
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"machine"
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"math/bits"
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"unsafe"
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)
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//go:extern _svectors
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var _svectors [0]byte
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//go:extern _flexram_cfg
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var _flexram_cfg [0]byte
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func postinit() {}
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//export Reset_Handler
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func main() {
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// disable interrupts
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irq := arm.DisableInterrupts()
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// initialize FPU and VTOR, reset watchdogs
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initSystem()
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// configure core and peripheral clocks/PLLs/PFDs
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initClocks()
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// copy data/bss sections from flash to RAM
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preinit()
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// initialize cache and MPU
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initCache()
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// enable SysTick, GPIO, and peripherals
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initPeripherals()
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// reenable interrupts
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arm.EnableInterrupts(irq)
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run()
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abort()
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}
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func getRamSizeConfig(itcmKB, dtcmKB uint32) uint32 {
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const minKB, disabled = uint32(4), uint32(0)
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if itcmKB < minKB {
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itcmKB = disabled
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}
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if dtcmKB < minKB {
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dtcmKB = disabled
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}
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itcmKB = uint32(bits.Len(uint(itcmKB))) << nxp.IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_Pos
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dtcmKB = uint32(bits.Len(uint(dtcmKB))) << nxp.IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_Pos
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return (itcmKB & nxp.IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_Msk) |
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(dtcmKB & nxp.IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_Msk)
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}
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func initSystem() {
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// configure SRAM capacity (512K for both ITCM and DTCM)
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ramc := uintptr(unsafe.Pointer(&_flexram_cfg))
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nxp.IOMUXC_GPR.GPR17.Set(uint32(ramc))
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nxp.IOMUXC_GPR.GPR16.Set(0x00200007)
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nxp.IOMUXC_GPR.GPR14.Set(getRamSizeConfig(512, 512))
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// from Teensyduino
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nxp.PMU.MISC0_SET.Set(nxp.PMU_MISC0_REFTOP_SELFBIASOFF)
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// install vector table (TODO: initialize interrupt/exception table?)
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vtor := uintptr(unsafe.Pointer(&_svectors))
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nxp.SystemControl.VTOR.Set(uint32(vtor))
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const wdogUpdateKey = 0xD928C520
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// disable watchdog powerdown counter
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nxp.WDOG1.WMCR.ClearBits(nxp.WDOG_WMCR_PDE_Msk)
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nxp.WDOG2.WMCR.ClearBits(nxp.WDOG_WMCR_PDE_Msk)
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// disable watchdog
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if nxp.WDOG1.WCR.HasBits(nxp.WDOG_WCR_WDE_Msk) {
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nxp.WDOG1.WCR.ClearBits(nxp.WDOG_WCR_WDE_Msk)
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}
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if nxp.WDOG2.WCR.HasBits(nxp.WDOG_WCR_WDE_Msk) {
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nxp.WDOG2.WCR.ClearBits(nxp.WDOG_WCR_WDE_Msk)
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}
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if nxp.RTWDOG.CS.HasBits(nxp.RTWDOG_CS_CMD32EN_Msk) {
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nxp.RTWDOG.CNT.Set(wdogUpdateKey)
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} else {
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nxp.RTWDOG.CNT.Set((wdogUpdateKey >> 0) & 0xFFFF)
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nxp.RTWDOG.CNT.Set((wdogUpdateKey >> 16) & 0xFFFF)
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}
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nxp.RTWDOG.TOVAL.Set(0xFFFF)
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nxp.RTWDOG.CS.Set((nxp.RTWDOG.CS.Get() & ^uint32(nxp.RTWDOG_CS_EN_Msk)) | nxp.RTWDOG_CS_UPDATE_Msk)
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}
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func initPeripherals() {
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enableTimerClocks() // activate GPT/PIT clock gates
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initSysTick() // enable SysTick
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initRTC() // enable real-time clock
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enablePinClocks() // activate IOMUXC(_GPR)/GPIO clock gates
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initPins() // configure GPIO
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enablePeripheralClocks() // activate peripheral clock gates
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initUART() // configure UART (initialized first for debugging)
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}
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func initPins() {
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// use fast GPIO for all pins (GPIO6-9)
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nxp.IOMUXC_GPR.GPR26.Set(0xFFFFFFFF)
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nxp.IOMUXC_GPR.GPR27.Set(0xFFFFFFFF)
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nxp.IOMUXC_GPR.GPR28.Set(0xFFFFFFFF)
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nxp.IOMUXC_GPR.GPR29.Set(0xFFFFFFFF)
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}
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func initUART() {
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machine.UART1.Configure(machine.UARTConfig{})
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}
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func putchar(c byte) {
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machine.UART1.WriteByte(c)
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}
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func abort() {
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for {
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arm.Asm("wfe")
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}
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}
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func waitForEvents() {
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arm.Asm("wfe")
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}
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