mirror of
https://github.com/tinygo-org/tinygo.git
synced 2026-08-16 10:43:29 +00:00
Ayke van Laethem
cf32607306
This should make it more maintainable. Another big advantage that generation time (including gofmt) is now 3 times faster. No real attempt at refactoring has been made, that will need to be done at a later time.
89 lines
2.3 KiB
Go
89 lines
2.3 KiB
Go
// Hand created file. DO NOT DELETE.
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// STM32F103XX bitfield definitions that are not auto-generated by gen-device-svd.go
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// +build stm32,stm32f103xx
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package stm32
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const (
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// Flash Access Control Register flag values.
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FLASH_ACR_LATENCY_0 = 0x00000001
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FLASH_ACR_LATENCY_1 = 0x00000002
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FLASH_ACR_LATENCY_2 = 0x00000004
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// Reset and Clock Control Control Register flag values.
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// System Clock source
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RCC_CFGR_SW_HSI = 0
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RCC_CFGR_SW_HSE = 1
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RCC_CFGR_SW_PLL = 2
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// Flags for when System Clock source is set.
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RCC_CFGR_SWS_HSI = 0x00000000
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RCC_CFGR_SWS_HSE = 0x00000004
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RCC_CFGR_SWS_PLL = 0x00000008
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// Sets PCLK1
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RCC_CFGR_PPRE1_DIV_NONE = 0x00000000
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RCC_CFGR_PPRE1_DIV_2 = 0x00000400
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RCC_CFGR_PPRE1_DIV_4 = 0x00000500
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RCC_CFGR_PPRE1_DIV_8 = 0x00000600
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RCC_CFGR_PPRE1_DIV_16 = 0x00000700
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// Sets PCLK2
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RCC_CFGR_PPRE2_DIV_NONE = 0x00000000
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RCC_CFGR_PPRE2_DIV_2 = 0x00002000
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RCC_CFGR_PPRE2_DIV_4 = 0x00002800
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RCC_CFGR_PPRE2_DIV_8 = 0x00003000
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RCC_CFGR_PPRE2_DIV_16 = 0x00003800
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// Sets PLL multiplier
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RCC_CFGR_PLLMUL_2 = 0x00000000
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RCC_CFGR_PLLMUL_3 = 0x00040000
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RCC_CFGR_PLLMUL_4 = 0x00080000
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RCC_CFGR_PLLMUL_5 = 0x000C0000
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RCC_CFGR_PLLMUL_6 = 0x00100000
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RCC_CFGR_PLLMUL_7 = 0x00140000
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RCC_CFGR_PLLMUL_8 = 0x00180000
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RCC_CFGR_PLLMUL_9 = 0x001C0000
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RCC_CFGR_PLLMUL_10 = 0x00200000
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RCC_CFGR_PLLMUL_11 = 0x00240000
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RCC_CFGR_PLLMUL_12 = 0x00280000
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RCC_CFGR_PLLMUL_13 = 0x002C0000
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RCC_CFGR_PLLMUL_14 = 0x00300000
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RCC_CFGR_PLLMUL_15 = 0x00340000
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RCC_CFGR_PLLMUL_16 = 0x00380000
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// RTC clock source
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RCC_RTCCLKSource_LSE = 0x00000100
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RCC_RTCCLKSource_LSI = 0x00000200
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RCC_RTCCLKSource_HSE_Div128 = 0x00000300
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// SPI settings
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SPI_FirstBit_MSB = 0x0000
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SPI_FirstBit_LSB = 0x0080
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SPI_BaudRatePrescaler_2 = 0x0000
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SPI_BaudRatePrescaler_4 = 0x0008
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SPI_BaudRatePrescaler_8 = 0x0010
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SPI_BaudRatePrescaler_16 = 0x0018
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SPI_BaudRatePrescaler_32 = 0x0020
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SPI_BaudRatePrescaler_64 = 0x0028
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SPI_BaudRatePrescaler_128 = 0x0030
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SPI_BaudRatePrescaler_256 = 0x0038
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SPI_Direction_2Lines_FullDuplex = 0x0000
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SPI_Direction_2Lines_RxOnly = 0x0400
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SPI_Direction_1Line_Rx = 0x8000
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SPI_Direction_1Line_Tx = 0xC000
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SPI_Mode_Master = 0x0104
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SPI_Mode_Slave = 0x0000
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SPI_NSS_Soft = 0x0200
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SPI_NSS_Hard = 0x0000
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SPI_NSSInternalSoft_Set = 0x0100
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SPI_NSSInternalSoft_Reset = 0xFEFF
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)
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