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cfd74c2954
* Add STM32G0B1 target support Introduce support for STM32G0B1 microcontrollers, including target-specific JSON files, linker scripts, and runtime initialization. This update adds hardware support for GPIO, UART, SPI, I2C, timers, and additional board-specific configurations like Nucleo-G0B1RE. * Update STM32G0 clock initialization to 64MHz and adjust related configurations Reconfigure STM32G0 to use a 64MHz system clock via PLL with HSI16 as the source. Update flash latency, prescaler settings, and I2C timing values to reflect the new frequency. * Cleanup * Cleanup * Add STM32G0-specific UART implementation Introduce a new UART implementation for the STM32G0 series with chip-specific setup and configuration methods. Update the generic STM32 UART code to exclude STM32G0. * Refactor STM32G0 runtime and machine code to utilize chip-specific register access functions Simplify and standardize register operations with dedicated setter methods in the STM32G0 runtime and machine code and cleanup redundant syntax. * Remove redundant commented-out APBENR1 register operations in STM32G0 machine code * Introduce FDCAN support for STM32G0B1 series Add FDCAN peripheral implementation targeting STM32G0B1, including support for standard, extended identifiers, and bit rate configuration. Update board files to include FDCAN pins, instances, and clock configuration for Nucleo-G0B1RE and Amken Trio boards.
10 lines
170 B
Plaintext
10 lines
170 B
Plaintext
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MEMORY
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{
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FLASH_TEXT (rw) : ORIGIN = 0x08000000, LENGTH = 512K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 144K
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}
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_stack_size = 4K;
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INCLUDE "targets/arm.ld" |