// +build stm32f4 package machine // Peripheral abstraction layer for the stm32f4 import ( "device/stm32" "unsafe" ) const ( PA0 = portA + 0 PA1 = portA + 1 PA2 = portA + 2 PA3 = portA + 3 PA4 = portA + 4 PA5 = portA + 5 PA6 = portA + 6 PA7 = portA + 7 PA8 = portA + 8 PA9 = portA + 9 PA10 = portA + 10 PA11 = portA + 11 PA12 = portA + 12 PA13 = portA + 13 PA14 = portA + 14 PA15 = portA + 15 PB0 = portB + 0 PB1 = portB + 1 PB2 = portB + 2 PB3 = portB + 3 PB4 = portB + 4 PB5 = portB + 5 PB6 = portB + 6 PB7 = portB + 7 PB8 = portB + 8 PB9 = portB + 9 PB10 = portB + 10 PB11 = portB + 11 PB12 = portB + 12 PB13 = portB + 13 PB14 = portB + 14 PB15 = portB + 15 PC0 = portC + 0 PC1 = portC + 1 PC2 = portC + 2 PC3 = portC + 3 PC4 = portC + 4 PC5 = portC + 5 PC6 = portC + 6 PC7 = portC + 7 PC8 = portC + 8 PC9 = portC + 9 PC10 = portC + 10 PC11 = portC + 11 PC12 = portC + 12 PC13 = portC + 13 PC14 = portC + 14 PC15 = portC + 15 PD0 = portD + 0 PD1 = portD + 1 PD2 = portD + 2 PD3 = portD + 3 PD4 = portD + 4 PD5 = portD + 5 PD6 = portD + 6 PD7 = portD + 7 PD8 = portD + 8 PD9 = portD + 9 PD10 = portD + 10 PD11 = portD + 11 PD12 = portD + 12 PD13 = portD + 13 PD14 = portD + 14 PD15 = portD + 15 PE0 = portE + 0 PE1 = portE + 1 PE2 = portE + 2 PE3 = portE + 3 PE4 = portE + 4 PE5 = portE + 5 PE6 = portE + 6 PE7 = portE + 7 PE8 = portE + 8 PE9 = portE + 9 PE10 = portE + 10 PE11 = portE + 11 PE12 = portE + 12 PE13 = portE + 13 PE14 = portE + 14 PE15 = portE + 15 PH0 = portH + 0 PH1 = portH + 1 ) func (p Pin) getPort() *stm32.GPIO_Type { switch p / 16 { case 0: return stm32.GPIOA case 1: return stm32.GPIOB case 2: return stm32.GPIOC case 3: return stm32.GPIOD case 4: return stm32.GPIOE case 5: return stm32.GPIOF case 6: return stm32.GPIOG case 7: return stm32.GPIOH case 8: return stm32.GPIOI default: panic("machine: unknown port") } } // enableClock enables the clock for this desired GPIO port. func (p Pin) enableClock() { switch p / 16 { case 0: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIOAEN) case 1: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIOBEN) case 2: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIOCEN) case 3: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIODEN) case 4: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIOEEN) case 5: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIOFEN) case 6: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIOGEN) case 7: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIOHEN) case 8: stm32.RCC.AHB1ENR.SetBits(stm32.RCC_AHB1ENR_GPIOIEN) default: panic("machine: unknown port") } } // Enable peripheral clock func enableAltFuncClock(bus unsafe.Pointer) { switch bus { case unsafe.Pointer(stm32.DAC): // DAC interface clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_DACEN) case unsafe.Pointer(stm32.PWR): // Power interface clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_PWREN) case unsafe.Pointer(stm32.CAN2): // CAN 2 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_CAN2EN) case unsafe.Pointer(stm32.CAN1): // CAN 1 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_CAN1EN) case unsafe.Pointer(stm32.I2C3): // I2C3 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C3EN) case unsafe.Pointer(stm32.I2C2): // I2C2 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C2EN) case unsafe.Pointer(stm32.I2C1): // I2C1 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C1EN) case unsafe.Pointer(stm32.UART5): // UART5 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_UART5EN) case unsafe.Pointer(stm32.UART4): // UART4 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_UART4EN) case unsafe.Pointer(stm32.USART3): // USART3 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART3EN) case unsafe.Pointer(stm32.USART2): // USART2 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART2EN) case unsafe.Pointer(stm32.SPI3): // SPI3 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_SPI3EN) case unsafe.Pointer(stm32.SPI2): // SPI2 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_SPI2EN) case unsafe.Pointer(stm32.WWDG): // Window watchdog clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_WWDGEN) case unsafe.Pointer(stm32.TIM14): // TIM14 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM14EN) case unsafe.Pointer(stm32.TIM13): // TIM13 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM13EN) case unsafe.Pointer(stm32.TIM12): // TIM12 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM12EN) case unsafe.Pointer(stm32.TIM7): // TIM7 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM7EN) case unsafe.Pointer(stm32.TIM6): // TIM6 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM6EN) case unsafe.Pointer(stm32.TIM5): // TIM5 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM5EN) case unsafe.Pointer(stm32.TIM4): // TIM4 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM4EN) case unsafe.Pointer(stm32.TIM3): // TIM3 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM3EN) case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM2EN) case unsafe.Pointer(stm32.TIM11): // TIM11 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM11EN) case unsafe.Pointer(stm32.TIM10): // TIM10 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM10EN) case unsafe.Pointer(stm32.TIM9): // TIM9 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM9EN) case unsafe.Pointer(stm32.SYSCFG): // System configuration controller clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SYSCFGEN) case unsafe.Pointer(stm32.SPI1): // SPI1 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SPI1EN) case unsafe.Pointer(stm32.SDIO): // SDIO clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SDIOEN) case unsafe.Pointer(stm32.ADC3): // ADC3 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADC3EN) case unsafe.Pointer(stm32.ADC2): // ADC2 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADC2EN) case unsafe.Pointer(stm32.ADC1): // ADC1 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADC1EN) case unsafe.Pointer(stm32.USART6): // USART6 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART6EN) case unsafe.Pointer(stm32.USART1): // USART1 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART1EN) case unsafe.Pointer(stm32.TIM8): // TIM8 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM8EN) case unsafe.Pointer(stm32.TIM1): // TIM1 clock enable stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM1EN) } }