Commit Graph

6 Commits

Author SHA1 Message Date
Ayke van Laethem ffa38b183b all: add HiFive1 rev B board with RISC-V architecture
This page has been a big help in adding support for this new chip:
https://wiki.osdev.org/HiFive-1_Bare_Bones
2019-07-07 14:03:24 +02:00
Ayke van Laethem 94b8214529 machine: refactor pins to be of Pin type 2019-05-26 20:48:50 +02:00
Ron Evans 4f4d7976c6 Add core support for multiple UARTs (#152)
* machine/uart: add core support for multiple UARTs by allowing for multiple RingBuffers
* machine/uart: complete core support for multiple UARTs
* machine/uart: no need to store pointer to UART, better to treat like I2C and SPI
* machine/uart: increase ring buffer size to 128 bytes
* machine/uart: improve godocs comments and use comma-ok idiom for buffer Put/Get methods
2019-01-25 22:09:13 +01:00
Ron Evans 65ea74bd84 machine/atsamd21: implements UART0 using the SERCOM0 interface
Signed-off-by: Ron Evans <ron@hybridgroup.com>
2019-01-21 21:14:00 +01:00
Ron Evans 47b667a4b8 machine/stm32: add support for stm32f103xx UART
Signed-off-by: Ron Evans <ron@hybridgroup.com>
2018-12-18 17:17:18 +01:00
Ron Evans ef2ac09561 nrf: implement UART interface
Signed-off-by: Ron Evans <ron@hybridgroup.com>
2018-10-02 17:08:31 +02:00