6e86daa95e
riscv: add I2C support for the SiFive HiFive1 Rev B board
2020-04-01 13:04:25 +02:00
94fec09b31
machine/fe310: implement UART receive interrupts
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This makes the echo example work on the HiFive1 rev B board.
2020-01-27 19:58:39 +01:00
768c652468
machine: rename CPU_FREQUENCY -> CPUFrequency()
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These all-caps constants aren't in the Go style, so rename it to
CPUFrequency (which is more aligned with Go style). Additionally, make
it a function so that it is possible to add support for changing the
frequency in the future.
Tested by running `make smoketest`. None of the outputs did change.
2019-12-16 20:34:39 +01:00
46d468b79d
machine/hifive1b: add support for SPI1
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Signed-off-by: Ron Evans <ron@hybridgroup.com >
2019-10-29 13:25:13 +01:00
2168b1b516
machine/hifive1: add GPIO Get() implementation and update other implementation to match latest SVD wrappers
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Signed-off-by: Ron Evans <ron@hybridgroup.com >
2019-10-09 18:54:10 +02:00
ffa38b183b
all: add HiFive1 rev B board with RISC-V architecture
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This page has been a big help in adding support for this new chip:
https://wiki.osdev.org/HiFive-1_Bare_Bones
2019-07-07 14:03:24 +02:00
Yannis Huber
Ayke van Laethem
Ron Evans