all: add HiFive1 rev B board with RISC-V architecture

This page has been a big help in adding support for this new chip:
https://wiki.osdev.org/HiFive-1_Bare_Bones

tools/gen-device-svd.py

@@ -151,7 +151,10 @@ def readSVD(path, sourceURL):
                     dimIncrement = None
                 else:
                     dim = int(getText(cluster.find('dim')))
-                    dimIncrement = int(getText(cluster.find('dimIncrement')), 0)
+                    if dim == 1:
+                        dimIncrement = None
+                    else:
+                        dimIncrement = int(getText(cluster.find('dimIncrement')), 0)
                 clusterRegisters = []
                 for regEl in cluster.findall('register'):
                     clusterRegisters.extend(parseRegister(groupName or name, regEl, baseAddress + clusterOffset, clusterPrefix))
@@ -241,7 +244,7 @@ def parseBitfields(groupName, regName, fieldsEls, bitfieldPrefix=''):
                 })
             for enumEl in fieldEl.findall('enumeratedValues/enumeratedValue'):
                 enumName = getText(enumEl.find('name'))
-                enumDescription = getText(enumEl.find('description'))
+                enumDescription = getText(enumEl.find('description')).replace('\n', ' ')
                 enumValue = int(getText(enumEl.find('value')), 0)
                 fields.append({
                     'name':        '{}_{}{}_{}_{}'.format(groupName, bitfieldPrefix, regName, fieldName, enumName),