all: add HiFive1 rev B board with RISC-V architecture

This page has been a big help in adding support for this new chip:
https://wiki.osdev.org/HiFive-1_Bare_Bones
This commit is contained in:
Ayke van Laethem
2019-03-30 12:54:36 +01:00
committed by Ron Evans
parent f0eb4eef5a
commit ffa38b183b
37 changed files with 485 additions and 74 deletions
+30
View File
@@ -0,0 +1,30 @@
// +build avr cortexm tinygo.riscv
package runtime
import (
"unsafe"
)
//go:extern _heap_start
var heapStartSymbol unsafe.Pointer
//go:extern _heap_end
var heapEndSymbol unsafe.Pointer
//go:extern _globals_start
var globalsStartSymbol unsafe.Pointer
//go:extern _globals_end
var globalsEndSymbol unsafe.Pointer
//go:extern _stack_top
var stackTopSymbol unsafe.Pointer
var (
heapStart = uintptr(unsafe.Pointer(&heapStartSymbol))
heapEnd = uintptr(unsafe.Pointer(&heapEndSymbol))
globalsStart = uintptr(unsafe.Pointer(&globalsStartSymbol))
globalsEnd = uintptr(unsafe.Pointer(&globalsEndSymbol))
stackTop = uintptr(unsafe.Pointer(&stackTopSymbol))
)