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all: add HiFive1 rev B board with RISC-V architecture

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This page has been a big help in adding support for this new chip:
https://wiki.osdev.org/HiFive-1_Bare_Bones
This commit is contained in:
Ayke van Laethem
2019-03-30 12:54:36 +01:00
committed by Ron Evans
parent f0eb4eef5a
commit ffa38b183b
37 changed files with 485 additions and 74 deletions
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src/runtime/arch_avr.go
+1 -16
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@@ -2,26 +2,11 @@
package runtime
import (
"unsafe"
)
const GOARCH = "avr"
const GOARCH = "arm" // avr pretends to be arm
// The bitness of the CPU (e.g. 8, 32, 64).
const TargetBits = 8
//go:extern _heap_start
var heapStartSymbol unsafe.Pointer
//go:extern _heap_end
var heapEndSymbol unsafe.Pointer
var (
heapStart = uintptr(unsafe.Pointer(&heapStartSymbol))
heapEnd = uintptr(unsafe.Pointer(&heapEndSymbol))
)
// Align on a word boundary.
func align(ptr uintptr) uintptr {
// No alignment necessary on the AVR.