all: add HiFive1 rev B board with RISC-V architecture

This page has been a big help in adding support for this new chip:
https://wiki.osdev.org/HiFive-1_Bare_Bones
This commit is contained in:
Ayke van Laethem
2019-03-30 12:54:36 +01:00
committed by Ron Evans
parent f0eb4eef5a
commit ffa38b183b
37 changed files with 485 additions and 74 deletions
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package riscv
// Run the given assembly code. The code will be marked as having side effects,
// as it doesn't produce output and thus would normally be eliminated by the
// optimizer.
func Asm(asm string)
// ReadRegister returns the contents of the specified register. The register
// must be a processor register, reachable with the "mov" instruction.
func ReadRegister(name string) uintptr