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all: add HiFive1 rev B board with RISC-V architecture

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This page has been a big help in adding support for this new chip:
https://wiki.osdev.org/HiFive-1_Bare_Bones
This commit is contained in:
Ayke van Laethem
2019-03-30 12:54:36 +01:00
committed by Ron Evans
parent f0eb4eef5a
commit ffa38b183b
37 changed files with 485 additions and 74 deletions
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compiler/compiler.go
+5 -5
View File
@@ -226,7 +226,7 @@ func (c *Compiler) Compile(mainPath string) []error {
return path
} else if path == "syscall" {
for _, tag := range c.BuildTags {
if tag == "avr" || tag == "cortexm" || tag == "darwin" {
if tag == "avr" || tag == "cortexm" || tag == "darwin" || tag == "riscv" {
return path
}
}
@@ -1304,11 +1304,11 @@ func (c *Compiler) parseCall(frame *Frame, instr *ssa.CallCommon) (llvm.Value, e
if fn := instr.StaticCallee(); fn != nil {
name := fn.RelString(nil)
switch {
case name == "device/arm.ReadRegister":
return c.emitReadRegister(instr.Args)
case name == "device/arm.Asm" || name == "device/avr.Asm":
case name == "device/arm.ReadRegister" || name == "device/riscv.ReadRegister":
return c.emitReadRegister(name, instr.Args)
case name == "device/arm.Asm" || name == "device/avr.Asm" || name == "device/riscv.Asm":
return c.emitAsm(instr.Args)
case name == "device/arm.AsmFull" || name == "device/avr.AsmFull":
case name == "device/arm.AsmFull" || name == "device/avr.AsmFull" || name == "device/riscv.AsmFull":
return c.emitAsmFull(frame, instr)
case strings.HasPrefix(name, "device/arm.SVCall"):
return c.emitSVCall(frame, instr.Args)
compiler/gc.go
+1 -1
View File
@@ -18,7 +18,7 @@ func (c *Compiler) needsStackObjects() bool {
return false
}
for _, tag := range c.BuildTags {
if tag == "cortexm" {
if tag == "cortexm" || tag == "tinygo.riscv" {
return false
}
}
compiler/inlineasm.go
+11 -2
View File
@@ -18,10 +18,19 @@ import (
// func ReadRegister(name string) uintptr
//
// The register name must be a constant, for example "sp".
func (c *Compiler) emitReadRegister(args []ssa.Value) (llvm.Value, error) {
func (c *Compiler) emitReadRegister(name string, args []ssa.Value) (llvm.Value, error) {
fnType := llvm.FunctionType(c.uintptrType, []llvm.Type{}, false)
regname := constant.StringVal(args[0].(*ssa.Const).Value)
target := llvm.InlineAsm(fnType, "mov $0, "+regname, "=r", false, false, 0)
var asm string
switch name {
case "device/arm.ReadRegister":
asm = "mov $0, " + regname
case "device/riscv.ReadRegister":
asm = "mv $0, " + regname
default:
panic("unknown architecture")
}
target := llvm.InlineAsm(fnType, asm, "=r", false, false, 0)
return c.builder.CreateCall(target, nil, ""), nil
}