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stm32-l5: corrected alt function and other review comments

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This commit is contained in:
Kenneth Bell
2020-12-24 08:11:15 -08:00
committed by deadprogram
parent 289e1aa197
commit fcdaa83368
3 changed files with 3 additions and 5 deletions
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src/machine/machine_stm32_uart.go
+1 -1
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@@ -16,7 +16,7 @@ type UART struct {
Buffer *RingBuffer Buffer *RingBuffer
Bus *stm32.USART_Type Bus *stm32.USART_Type
Interrupt interrupt.Interrupt Interrupt interrupt.Interrupt
AltFuncSelector stm32.AltFunc AltFuncSelector uint8
// Registers specific to the chip // Registers specific to the chip
rxReg *volatile.Register32 rxReg *volatile.Register32
src/machine/machine_stm32l5.go
-2
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@@ -219,7 +219,6 @@ func enableAltFuncClock(bus unsafe.Pointer) {
stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM3EN) stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM3EN)
case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable
stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM2EN) stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM2EN)
case unsafe.Pointer(stm32.UCPD1): // UCPD1 clock enable case unsafe.Pointer(stm32.UCPD1): // UCPD1 clock enable
stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_UCPD1EN) stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_UCPD1EN)
case unsafe.Pointer(stm32.FDCAN1): // FDCAN1 clock enable case unsafe.Pointer(stm32.FDCAN1): // FDCAN1 clock enable
@@ -232,7 +231,6 @@ func enableAltFuncClock(bus unsafe.Pointer) {
stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_I2C4EN) stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_I2C4EN)
case unsafe.Pointer(stm32.LPUART1): // LPUART1 clock enable case unsafe.Pointer(stm32.LPUART1): // LPUART1 clock enable
stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_LPUART1EN) stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_LPUART1EN)
case unsafe.Pointer(stm32.TIM17): // TIM17 clock enable case unsafe.Pointer(stm32.TIM17): // TIM17 clock enable
stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM17EN) stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM17EN)
case unsafe.Pointer(stm32.TIM16): // TIM16 clock enable case unsafe.Pointer(stm32.TIM16): // TIM16 clock enable
targets/cortex-m33.json
+2 -2
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@@ -1,7 +1,7 @@
{ {
"inherits": ["cortex-m"], "inherits": ["cortex-m"],
"llvm-target": "armv7m-none-eabi", "llvm-target": "armv7m-none-eabi",
"cflags": [ "cflags": [
"--target=armv7m-none-eabi", "--target=armv7m-none-eabi",
"-mfloat-abi=soft", "-mfloat-abi=soft",
"-Qunused-arguments" "-Qunused-arguments"