mirror of
https://github.com/tinygo-org/tinygo.git
synced 2026-08-15 00:13:43 +00:00
stm32: add pwm for f4 series
This commit is contained in:
Kenneth Bell
Ron Evans
@@ -6,6 +6,8 @@ package machine
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import (
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"device/stm32"
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"runtime/interrupt"
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"runtime/volatile"
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"unsafe"
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)
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@@ -95,8 +97,56 @@ const (
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PE14 = portE + 14
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PE15 = portE + 15
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PH0 = portH + 0
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PH1 = portH + 1
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PF0 = portF + 0
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PF1 = portF + 1
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PF2 = portF + 2
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PF3 = portF + 3
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PF4 = portF + 4
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PF5 = portF + 5
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PF6 = portF + 6
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PF7 = portF + 7
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PF8 = portF + 8
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PF9 = portF + 9
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PF10 = portF + 10
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PF11 = portF + 11
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PF12 = portF + 12
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PF13 = portF + 13
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PF14 = portF + 14
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PF15 = portF + 15
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PH0 = portH + 0
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PH1 = portH + 1
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PH2 = portH + 2
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PH3 = portH + 3
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PH4 = portH + 4
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PH5 = portH + 5
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PH6 = portH + 6
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PH7 = portH + 7
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PH8 = portH + 8
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PH9 = portH + 9
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PH10 = portH + 10
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PH11 = portH + 11
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PH12 = portH + 12
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PH13 = portH + 13
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PH14 = portH + 14
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PH15 = portH + 15
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PI0 = portI + 0
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PI1 = portI + 1
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PI2 = portI + 2
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PI3 = portI + 3
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PI4 = portI + 4
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PI5 = portI + 5
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PI6 = portI + 6
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PI7 = portI + 7
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PI8 = portI + 8
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PI9 = portI + 9
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PI10 = portI + 10
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PI11 = portI + 11
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PI12 = portI + 12
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PI13 = portI + 13
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PI14 = portI + 14
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PI15 = portI + 15
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)
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func (p Pin) getPort() *stm32.GPIO_Type {
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@@ -227,3 +277,271 @@ func enableAltFuncClock(bus unsafe.Pointer) {
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM1EN)
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}
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}
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//---------- Timer related code
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var (
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TIM1 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM1EN,
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Device: stm32.TIM1,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PA8, AF1_TIM1_2}, {PE9, AF1_TIM1_2}}},
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TimerChannel{Pins: []PinFunction{{PA9, AF1_TIM1_2}, {PE11, AF1_TIM1_2}}},
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TimerChannel{Pins: []PinFunction{{PA10, AF1_TIM1_2}, {PE13, AF1_TIM1_2}}},
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TimerChannel{Pins: []PinFunction{{PA11, AF1_TIM1_2}, {PE14, AF1_TIM1_2}}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM2 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM2EN,
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Device: stm32.TIM2,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PA0, AF1_TIM1_2}, {PA5, AF1_TIM1_2}, {PA15, AF1_TIM1_2}}},
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TimerChannel{Pins: []PinFunction{{PA1, AF1_TIM1_2}, {PB3, AF1_TIM1_2}}},
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TimerChannel{Pins: []PinFunction{{PA2, AF1_TIM1_2}, {PB10, AF1_TIM1_2}}},
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TimerChannel{Pins: []PinFunction{{PA3, AF1_TIM1_2}, {PB11, AF1_TIM1_2}}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM3 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM3EN,
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Device: stm32.TIM3,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PA6, AF2_TIM3_4_5}, {PB4, AF2_TIM3_4_5}, {PC6, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PA7, AF2_TIM3_4_5}, {PB5, AF2_TIM3_4_5}, {PC7, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PB0, AF2_TIM3_4_5}, {PC8, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PB1, AF2_TIM3_4_5}, {PC9, AF2_TIM3_4_5}}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM4 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM4EN,
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Device: stm32.TIM4,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PB6, AF2_TIM3_4_5}, {PD12, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PB7, AF2_TIM3_4_5}, {PD13, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PB8, AF2_TIM3_4_5}, {PD14, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PB9, AF2_TIM3_4_5}, {PD15, AF2_TIM3_4_5}}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM5 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM5EN,
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Device: stm32.TIM5,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PH10, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PH11, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PH12, AF2_TIM3_4_5}}},
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TimerChannel{Pins: []PinFunction{{PI0, AF2_TIM3_4_5}}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM6 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM6EN,
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Device: stm32.TIM6,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM7 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM7EN,
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Device: stm32.TIM7,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM8 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM8EN,
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Device: stm32.TIM8,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PC6, AF3_TIM8_9_10_11}, {PI5, AF3_TIM8_9_10_11}}},
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TimerChannel{Pins: []PinFunction{{PC7, AF3_TIM8_9_10_11}, {PI6, AF3_TIM8_9_10_11}}},
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TimerChannel{Pins: []PinFunction{{PC8, AF3_TIM8_9_10_11}, {PI7, AF3_TIM8_9_10_11}}},
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TimerChannel{Pins: []PinFunction{{PC9, AF3_TIM8_9_10_11}, {PI2, AF3_TIM8_9_10_11}}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM9 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM9EN,
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Device: stm32.TIM9,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PA2, AF3_TIM8_9_10_11}, {PE5, AF3_TIM8_9_10_11}}},
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TimerChannel{Pins: []PinFunction{{PA3, AF3_TIM8_9_10_11}, {PE6, AF3_TIM8_9_10_11}}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM10 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM10EN,
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Device: stm32.TIM10,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PB8, AF3_TIM8_9_10_11}, {PF6, AF3_TIM8_9_10_11}}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM11 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM11EN,
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Device: stm32.TIM11,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PB9, AF3_TIM8_9_10_11}, {PF7, AF3_TIM8_9_10_11}}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM12 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM12EN,
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Device: stm32.TIM12,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PB14, AF9_CAN1_CAN2_TIM12_13_14}, {PH6, AF9_CAN1_CAN2_TIM12_13_14}}},
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TimerChannel{Pins: []PinFunction{{PB15, AF9_CAN1_CAN2_TIM12_13_14}, {PH9, AF9_CAN1_CAN2_TIM12_13_14}}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM13 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM13EN,
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Device: stm32.TIM13,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PA6, AF9_CAN1_CAN2_TIM12_13_14}, {PF8, AF9_CAN1_CAN2_TIM12_13_14}}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM14 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM14EN,
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Device: stm32.TIM14,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{{PA7, AF9_CAN1_CAN2_TIM12_13_14}, {PF9, AF9_CAN1_CAN2_TIM12_13_14}}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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)
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func (t *TIM) registerUPInterrupt() interrupt.Interrupt {
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switch t {
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case &TIM1:
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return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM1.handleUPInterrupt)
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case &TIM2:
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return interrupt.New(stm32.IRQ_TIM2, TIM2.handleUPInterrupt)
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case &TIM3:
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return interrupt.New(stm32.IRQ_TIM3, TIM3.handleUPInterrupt)
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case &TIM4:
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return interrupt.New(stm32.IRQ_TIM4, TIM4.handleUPInterrupt)
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case &TIM5:
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return interrupt.New(stm32.IRQ_TIM5, TIM5.handleUPInterrupt)
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case &TIM6:
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return interrupt.New(stm32.IRQ_TIM6_DAC, TIM6.handleUPInterrupt)
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case &TIM7:
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return interrupt.New(stm32.IRQ_TIM7, TIM7.handleUPInterrupt)
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case &TIM8:
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return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM8.handleUPInterrupt)
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case &TIM9:
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return interrupt.New(stm32.IRQ_TIM1_BRK_TIM9, TIM9.handleUPInterrupt)
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case &TIM10:
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return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM10.handleUPInterrupt)
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case &TIM11:
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return interrupt.New(stm32.IRQ_TIM1_TRG_COM_TIM11, TIM11.handleUPInterrupt)
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case &TIM12:
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return interrupt.New(stm32.IRQ_TIM8_BRK_TIM12, TIM12.handleUPInterrupt)
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case &TIM13:
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return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM13.handleUPInterrupt)
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case &TIM14:
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return interrupt.New(stm32.IRQ_TIM8_TRG_COM_TIM14, TIM14.handleUPInterrupt)
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}
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return interrupt.Interrupt{}
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}
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func (t *TIM) registerOCInterrupt() interrupt.Interrupt {
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switch t {
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case &TIM1:
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return interrupt.New(stm32.IRQ_TIM1_CC, TIM1.handleOCInterrupt)
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case &TIM2:
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return interrupt.New(stm32.IRQ_TIM2, TIM2.handleOCInterrupt)
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case &TIM3:
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return interrupt.New(stm32.IRQ_TIM3, TIM3.handleOCInterrupt)
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case &TIM4:
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return interrupt.New(stm32.IRQ_TIM4, TIM4.handleOCInterrupt)
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case &TIM5:
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return interrupt.New(stm32.IRQ_TIM5, TIM5.handleOCInterrupt)
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case &TIM6:
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return interrupt.New(stm32.IRQ_TIM6_DAC, TIM6.handleOCInterrupt)
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case &TIM7:
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return interrupt.New(stm32.IRQ_TIM7, TIM7.handleOCInterrupt)
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case &TIM8:
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return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM8.handleOCInterrupt)
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case &TIM9:
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return interrupt.New(stm32.IRQ_TIM1_BRK_TIM9, TIM9.handleOCInterrupt)
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case &TIM10:
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return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM10.handleOCInterrupt)
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case &TIM11:
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return interrupt.New(stm32.IRQ_TIM1_TRG_COM_TIM11, TIM11.handleOCInterrupt)
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case &TIM12:
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return interrupt.New(stm32.IRQ_TIM8_BRK_TIM12, TIM12.handleOCInterrupt)
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case &TIM13:
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return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM13.handleOCInterrupt)
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case &TIM14:
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return interrupt.New(stm32.IRQ_TIM8_TRG_COM_TIM14, TIM14.handleOCInterrupt)
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}
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return interrupt.Interrupt{}
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}
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func (t *TIM) enableMainOutput() {
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t.Device.BDTR.SetBits(stm32.TIM_BDTR_MOE)
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}
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type arrtype = uint32
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type arrRegType = volatile.Register32
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const (
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ARR_MAX = 0x10000
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PSC_MAX = 0x10000
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)
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Reference in New Issue
Block a user