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fix: correctly handle interrupt disable on esp32-c3
Priority 0 disables an interrupt on ESP32-C3. This corrects the code to actually use that. Signed-off-by: deadprogram <ron@hybridgroup.com>
This commit is contained in:
@@ -42,7 +42,7 @@ func TestBinarySize(t *testing.T) {
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// This is a small number of very diverse targets that we want to test.
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// This is a small number of very diverse targets that we want to test.
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tests := []sizeTest{
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tests := []sizeTest{
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// microcontrollers
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// microcontrollers
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{"hifive1b", "examples/echo", 3668, 280, 0, 2244},
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{"hifive1b", "examples/echo", 3680, 280, 0, 2252},
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{"microbit", "examples/serial", 2694, 342, 8, 2248},
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{"microbit", "examples/serial", 2694, 342, 8, 2248},
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{"wioterminal", "examples/pininterrupt", 7074, 1510, 120, 7248},
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{"wioterminal", "examples/pininterrupt", 7074, 1510, 120, 7248},
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@@ -75,6 +75,10 @@ handleInterruptASM:
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SFREG f30,(30 + 16)*REGSIZE(sp)
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SFREG f30,(30 + 16)*REGSIZE(sp)
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SFREG f31,(31 + 16)*REGSIZE(sp)
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SFREG f31,(31 + 16)*REGSIZE(sp)
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#endif
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#endif
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// Save ra to a global so handleException can print the caller of the NULL
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// function pointer.
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la t0, tinygo_saved_ra
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SREG ra, 0(t0)
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call handleInterrupt
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call handleInterrupt
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#ifdef __riscv_flen
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#ifdef __riscv_flen
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LFREG f0, (31 + 16)*REGSIZE(sp)
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LFREG f0, (31 + 16)*REGSIZE(sp)
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@@ -128,3 +132,10 @@ handleInterruptASM:
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LREG ra, 0*REGSIZE(sp)
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LREG ra, 0*REGSIZE(sp)
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addi sp, sp, NREG*REGSIZE
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addi sp, sp, NREG*REGSIZE
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mret
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mret
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.section .bss.tinygo_saved_ra
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.global tinygo_saved_ra
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.type tinygo_saved_ra,@object
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.align 2
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tinygo_saved_ra:
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.space REGSIZE
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@@ -10,6 +10,9 @@ import (
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"unsafe"
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"unsafe"
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)
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)
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//go:extern tinygo_saved_ra
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var tinygo_saved_ra uintptr
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// Enable register CPU interrupt with interrupt.Interrupt.
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// Enable register CPU interrupt with interrupt.Interrupt.
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// The ESP32-C3 has 31 CPU independent interrupts.
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// The ESP32-C3 has 31 CPU independent interrupts.
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// The Interrupt.New(x, f) (x = [1..31]) attaches CPU interrupt to function f.
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// The Interrupt.New(x, f) (x = [1..31]) attaches CPU interrupt to function f.
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@@ -88,7 +91,13 @@ const (
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const (
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const (
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defaultThreshold = 5
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defaultThreshold = 5
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disableThreshold = 10
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// Priority 0 disables an interrupt on ESP32-C3 (per the TRM,
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// priority 0 = masked). During handling we set the current
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// interrupt's priority to 0 so it cannot re-fire while MIE is
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// re-enabled for nesting. This is critical for level-triggered
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// interrupts where the hardware line stays asserted until the
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// peripheral source is serviced by the handler.
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disableThreshold = 0
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)
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)
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//go:inline
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//go:inline
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@@ -225,6 +234,7 @@ func handleException(mcause uintptr) {
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println("*** Exception: pc:", riscv.MEPC.Get())
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println("*** Exception: pc:", riscv.MEPC.Get())
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println("*** Exception: code:", uint32(mcause&0x1f))
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println("*** Exception: code:", uint32(mcause&0x1f))
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println("*** Exception: mcause:", mcause)
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println("*** Exception: mcause:", mcause)
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println("*** Exception: ra:", tinygo_saved_ra)
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switch uint32(mcause & 0x1f) {
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switch uint32(mcause & 0x1f) {
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case riscv.InstructionAccessFault:
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case riscv.InstructionAccessFault:
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println("*** virtual address:", riscv.MTVAL.Get())
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println("*** virtual address:", riscv.MTVAL.Get())
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