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machine/rp2040: add interrupt API
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@@ -0,0 +1,73 @@
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//go:build rp2040
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// +build rp2040
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package machine
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import (
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"device/rp"
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)
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// machine_rp2040_sync.go contains interrupt and
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// lock primitives similar to those found in Pico SDK's
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// irq.c
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const (
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// Number of spin locks available
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_NUMSPINLOCKS = 32
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// Number of interrupt handlers available
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_NUMIRQ = 32
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_PICO_SPINLOCK_ID_IRQ = 9
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_NUMBANK0_GPIOS = 30
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)
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// Clears interrupt flag on a pin
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func (p Pin) acknowledgeInterrupt(change PinChange) {
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ioBank0.intR[p>>3].Set(p.ioIntBit(change))
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}
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// Basic interrupt setting via ioBANK0 for GPIO interrupts.
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func (p Pin) setInterrupt(change PinChange, enabled bool) {
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// Separate mask/force/status per-core, so check which core called, and
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// set the relevant IRQ controls.
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switch CurrentCore() {
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case 0:
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p.ctrlSetInterrupt(change, enabled, &ioBank0.proc0IRQctrl)
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case 1:
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p.ctrlSetInterrupt(change, enabled, &ioBank0.proc1IRQctrl)
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}
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}
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// ctrlSetInterrupt acknowledges any pending interrupt and enables or disables
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// the interrupt for a given IRQ control bank (IOBANK, DormantIRQ, QSPI).
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//
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// pico-sdk calls this the _gpio_set_irq_enabled, not to be confused with
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// gpio_set_irq_enabled (no leading underscore).
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func (p Pin) ctrlSetInterrupt(change PinChange, enabled bool, base *irqCtrl) {
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p.acknowledgeInterrupt(change)
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enReg := &base.intE[p>>3]
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if enabled {
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enReg.SetBits(p.ioIntBit(change))
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} else {
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enReg.ClearBits(p.ioIntBit(change))
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}
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}
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// Enable or disable a specific interrupt on the executing core.
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// num is the interrupt number which must be in [0,31].
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func irqSet(num uint32, enabled bool) {
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if num >= _NUMIRQ {
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return
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}
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irqSetMask(1<<num, enabled)
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}
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func irqSetMask(mask uint32, enabled bool) {
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if enabled {
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// Clear pending before enable
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// (if IRQ is actually asserted, it will immediately re-pend)
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rp.PPB.NVIC_ICPR.Set(mask)
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rp.PPB.NVIC_ISER.Set(mask)
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} else {
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rp.PPB.NVIC_ICER.Set(mask)
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}
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}
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