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https://github.com/tinygo-org/tinygo.git
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Puya PY32F MCU support (#5106)
* pinout yamls removed * machine: implement default UART pin configuration for Embedfire boards * flash command moved to chip level so VS Code plugin can select bare chip * machine: add support for alternate pin mode configuration * add build targets for embedfire on py32 * add support for embedfire target in GNUmakefile for py32 * lib/py32-svd: remove duplicate DBGMCU.IDCODE CODE field Update submodule to fix duplicate SetIDCODE/GetIDCODE method declarations in the generated py32f002bxx.go device file. * update subproject commit reference in py32-svd * refactor: update CPU frequency handling in machine and runtime packages * refactor: replace ConfigureUARTPin function with direct pin configuration in UART setup * SetAltFunc documentation for GPIO pin alternate functions * refactor: improve UART write and flush error handling with timeout * machine/py32: generalize UART driver to any USART Add a per-instance setup func to the UART type so the driver is no longer hardwired to USART1. DefaultUART stays USART1; add UART2 (USART2) in a separately build-tagged file since py32f002x parts lack USART2. RX IRQ handlers reference runtime-assigned vars to break the init cycle, and setup is assigned in the var initializer so it runs before InitSerial. Add the py32f003_32k_4k target (32K flash / 4K RAM). * Add canonical PY32F002, F003, and F030 density targets Use CMSIS/pyocd device names for target files and build tags. Add all F003 and F030 densities plus F002A/B, correct F002B to 24K flash and its own startup file, fix the F030x8 pyocd target, and update Embedfire inheritance. * Add targets for all PY32 CMSIS devices * Support all PY32 register layout variants * machine/py32: use generated register definitions * machine/py32: fix alternate-function documentation * machine/py32: report the configured CPU frequency * machine/py32: use unsafe.Add for GPIO ports * machine/py32: bound and yield UART polling * machine/py32: configure UART pins from UARTConfig * build: use the current PY32 SVD repository URL * test: cover PY32 UART register layouts * machine/py32: restore dynamic CPU frequency tracking * machine/py32: share the USART TX-ready bit * targets/py32: scale system stacks with RAM * machine/py32: keep clock state internal * targets/py32: normalize generated metadata * machine/py32: normalize GPIO configuration * machine/py32: fix T020 UART setup * machine/py32: reduce clock variant files * machine/py32: clean up UART variants * machine/py32: decouple UART clock capability * lib/py32-svd: use organization repository * runtime/py32: name 24MHz HSI encodings * machine/py32: derive startup clock from capability * machine/py32: use generated USART clock mask * machine/py32: name T020 8-bit UART mode * ci: include PY32 in sharded smoke tests * runtime: remove PY32 HSI frequency workaround
This commit is contained in:
Pavel Burgr
GitHub
@@ -0,0 +1,254 @@
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// Command gen-py32-targets generates PY32 target and linker definitions from
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// normalized CMSIS-Pack device metadata.
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package main
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import (
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"encoding/csv"
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"encoding/json"
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"errors"
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"flag"
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"fmt"
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"io"
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"os"
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"path/filepath"
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"sort"
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"strconv"
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"strings"
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)
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type device struct {
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Part string
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Family string
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Core string
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FlashStart uint64
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FlashSize uint64
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RAMStart uint64
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RAMSize uint64
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}
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type target struct {
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Inherits []string `json:"inherits"`
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BuildTags []string `json:"build-tags,omitempty"`
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LinkerScript string `json:"linkerscript,omitempty"`
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ExtraFiles []string `json:"extra-files,omitempty"`
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FlashCommand string `json:"flash-command,omitempty"`
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}
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var orphanFamilies = map[string]string{
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// This SVD is present in PY32F0xx_DFP, but that pack has no matching PDSC
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// device entry from which a concrete memory configuration can be derived.
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"py32f001xx": "m0",
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}
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var noGPIOAFRH = map[string]bool{
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"py32f001cxx": true,
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"py32f002bxx": true,
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"py32f002cxx": true,
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"py32f002xxx": true,
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"py32f002zxx": true,
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"py32l020xx": true,
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"py32m010xx": true,
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}
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var gpioOSPDDER = familySet("py32e407xx", "py32f410xx", "py32l090xx", "py32t090xx", "py32t092xx")
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var gpioClockAHB2 = familySet("py32e407xx", "py32f403xx")
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var gpioClockAHB = familySet("py32f410xx")
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var hsiFSOP = familySet("py32l090xx", "py32t090xx", "py32t092xx")
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var noHSIFS = familySet("py32e407xx", "py32f403xx", "py32f410xx")
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var uartType = familySet("py32t020xx")
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var usartSplitData = familySet("py32e407xx")
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var usartUnnumbered = familySet("py32f410xx")
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var usart1ClockLiteral = familySet("py32f001cxx", "py32f001xx")
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var uartClockAPB2 = familySet("py32e407xx", "py32f403xx", "py32f410xx")
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var uartNoInterrupt = familySet("py32f410xx")
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func familySet(names ...string) map[string]bool {
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set := make(map[string]bool, len(names))
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for _, name := range names {
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set[name] = true
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}
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return set
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}
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func familyBuildTags(family string) []string {
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tags := []string{family}
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features := []struct {
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name string
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set map[string]bool
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}{
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{"py32_no_gpio_afrh", noGPIOAFRH},
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{"py32_gpio_ospdder", gpioOSPDDER},
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{"py32_gpio_clock_ahb2", gpioClockAHB2},
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{"py32_gpio_clock_ahb", gpioClockAHB},
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{"py32_hsi_fs_op", hsiFSOP},
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{"py32_no_hsi_fs", noHSIFS},
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{"py32_uart_type", uartType},
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{"py32_usart_split_data", usartSplitData},
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{"py32_usart_unnumbered", usartUnnumbered},
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{"py32_usart1_clock_literal", usart1ClockLiteral},
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{"py32_uart_clock_apb2", uartClockAPB2},
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{"py32_uart_no_interrupt", uartNoInterrupt},
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}
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for _, feature := range features {
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if feature.set[family] {
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tags = append(tags, feature.name)
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}
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}
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return tags
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}
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var flashCommands = map[string]string{
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"py32f002ax5": "pyocd load -t py32f002ax5 {bin}",
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"py32f002bx5": "pyocd load -t py32f002bx5 {bin}",
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"py32f003x4": "pyocd load -t py32f003x4 {bin}",
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"py32f003x6": "pyocd load -t py32f003x6 {bin}",
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"py32f003x7": "pyocd load -t py32f003x7 {bin}",
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"py32f003x8": "pyocd load -t py32f003x8 {bin}",
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"py32f030x4": "pyocd load -t py32f030x4 {bin}",
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"py32f030x6": "pyocd load -t py32f030x6 {bin}",
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"py32f030x7": "pyocd load -t py32f030x7 {bin}",
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"py32f030x8": "pyocd load -t py32f030x8 {bin}",
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}
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func main() {
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table := flag.String("table", "tools/gen-py32-targets/devices.csv", "normalized device table")
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out := flag.String("out", "targets", "target output directory")
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flag.Parse()
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devices, err := readDevices(*table)
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if err != nil {
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fatal(err)
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}
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if err := generate(*out, devices); err != nil {
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fatal(err)
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}
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}
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func fatal(err error) {
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fmt.Fprintln(os.Stderr, "gen-py32-targets:", err)
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os.Exit(1)
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}
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func readDevices(path string) ([]device, error) {
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file, err := os.Open(path)
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if err != nil {
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return nil, err
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}
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defer file.Close()
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reader := csv.NewReader(file)
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header, err := reader.Read()
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if err != nil {
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return nil, err
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}
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wantHeader := []string{"part", "family", "core", "flash_start", "flash_size", "ram_start", "ram_size"}
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if strings.Join(header, ",") != strings.Join(wantHeader, ",") {
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return nil, fmt.Errorf("unexpected CSV header %q", strings.Join(header, ","))
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}
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var devices []device
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seen := make(map[string]bool)
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for line := 2; ; line++ {
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record, err := reader.Read()
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if errors.Is(err, io.EOF) {
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break
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}
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if err != nil {
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return nil, fmt.Errorf("line %d: %w", line, err)
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}
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if seen[record[0]] {
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return nil, fmt.Errorf("line %d: duplicate part %q", line, record[0])
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}
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seen[record[0]] = true
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if record[2] != "m0" && record[2] != "m4" {
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return nil, fmt.Errorf("line %d: unsupported core %q", line, record[2])
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}
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values := make([]uint64, 4)
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for i, field := range record[3:] {
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values[i], err = strconv.ParseUint(field, 0, 64)
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if err != nil || values[i] == 0 {
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return nil, fmt.Errorf("line %d: invalid memory value %q", line, field)
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}
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}
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devices = append(devices, device{
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Part: record[0], Family: record[1], Core: record[2],
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FlashStart: values[0], FlashSize: values[1],
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RAMStart: values[2], RAMSize: values[3],
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})
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}
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return devices, nil
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}
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func systemStackSize(ramSize uint64) uint64 {
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switch {
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case ramSize <= 4*1024:
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return 1024
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case ramSize <= 16*1024:
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return 2 * 1024
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default:
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return 4 * 1024
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}
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}
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func generate(out string, devices []device) error {
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if err := os.MkdirAll(out, 0o755); err != nil {
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return err
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}
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families := make(map[string]string, len(orphanFamilies))
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for name, core := range orphanFamilies {
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families[name] = core
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}
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for _, device := range devices {
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if core, ok := families[device.Family]; ok && core != device.Core {
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return fmt.Errorf("family %q mixes %s and %s cores", device.Family, core, device.Core)
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}
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families[device.Family] = device.Core
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}
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familyNames := make([]string, 0, len(families))
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for name := range families {
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familyNames = append(familyNames, name)
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}
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sort.Strings(familyNames)
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for _, family := range familyNames {
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base := "py32"
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if families[family] == "m4" {
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base = "py32-m4"
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}
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spec := target{
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Inherits: []string{base},
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BuildTags: familyBuildTags(family),
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ExtraFiles: []string{"src/device/py32/" + family + ".s"},
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}
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if err := writeJSON(filepath.Join(out, family+".json"), spec); err != nil {
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return err
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}
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}
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for _, device := range devices {
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spec := target{
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Inherits: []string{device.Family},
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BuildTags: []string{device.Part},
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LinkerScript: "targets/" + device.Part + ".ld",
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FlashCommand: flashCommands[device.Part],
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}
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if err := writeJSON(filepath.Join(out, device.Part+".json"), spec); err != nil {
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return err
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}
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stackSize := systemStackSize(device.RAMSize)
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linker := fmt.Sprintf("MEMORY\n{\n FLASH_TEXT (rx) : ORIGIN = %#x, LENGTH = %#x\n RAM (xrw) : ORIGIN = %#x, LENGTH = %#x\n}\n\n_stack_size = %dK;\n\nINCLUDE \"targets/arm.ld\"\n", device.FlashStart, device.FlashSize, device.RAMStart, device.RAMSize, stackSize/1024)
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if err := os.WriteFile(filepath.Join(out, device.Part+".ld"), []byte(linker), 0o644); err != nil {
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return err
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}
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}
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return nil
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}
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func writeJSON(path string, value any) error {
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data, err := json.MarshalIndent(value, "", " ")
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if err != nil {
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return err
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}
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data = append(data, '\n')
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return os.WriteFile(path, data, 0o644)
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}
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