Puya PY32F MCU support (#5106)

* pinout yamls removed

* machine: implement default UART pin configuration for Embedfire boards

* flash command moved to chip level so VS Code plugin can select bare chip

* machine: add support for alternate pin mode configuration

* add build targets for embedfire on py32

* add support for embedfire target in GNUmakefile for py32

* lib/py32-svd: remove duplicate DBGMCU.IDCODE CODE field

Update submodule to fix duplicate SetIDCODE/GetIDCODE method
declarations in the generated py32f002bxx.go device file.

* update subproject commit reference in py32-svd

* refactor: update CPU frequency handling in machine and runtime packages

* refactor: replace ConfigureUARTPin function with direct pin configuration in UART setup

* SetAltFunc documentation for GPIO pin alternate functions

* refactor: improve UART write and flush error handling with timeout

* machine/py32: generalize UART driver to any USART

Add a per-instance setup func to the UART type so the driver is no longer
hardwired to USART1. DefaultUART stays USART1; add UART2 (USART2) in a
separately build-tagged file since py32f002x parts lack USART2. RX IRQ
handlers reference runtime-assigned vars to break the init cycle, and setup
is assigned in the var initializer so it runs before InitSerial.

Add the py32f003_32k_4k target (32K flash / 4K RAM).

* Add canonical PY32F002, F003, and F030 density targets

Use CMSIS/pyocd device names for target files and build tags. Add all F003 and F030 densities plus F002A/B, correct F002B to 24K flash and its own startup file, fix the F030x8 pyocd target, and update Embedfire inheritance.

* Add targets for all PY32 CMSIS devices

* Support all PY32 register layout variants

* machine/py32: use generated register definitions

* machine/py32: fix alternate-function documentation

* machine/py32: report the configured CPU frequency

* machine/py32: use unsafe.Add for GPIO ports

* machine/py32: bound and yield UART polling

* machine/py32: configure UART pins from UARTConfig

* build: use the current PY32 SVD repository URL

* test: cover PY32 UART register layouts

* machine/py32: restore dynamic CPU frequency tracking

* machine/py32: share the USART TX-ready bit

* targets/py32: scale system stacks with RAM

* machine/py32: keep clock state internal

* targets/py32: normalize generated metadata

* machine/py32: normalize GPIO configuration

* machine/py32: fix T020 UART setup

* machine/py32: reduce clock variant files

* machine/py32: clean up UART variants

* machine/py32: decouple UART clock capability

* lib/py32-svd: use organization repository

* runtime/py32: name 24MHz HSI encodings

* machine/py32: derive startup clock from capability

* machine/py32: use generated USART clock mask

* machine/py32: name T020 8-bit UART mode

* ci: include PY32 in sharded smoke tests

* runtime: remove PY32 HSI frequency workaround

src/runtime/runtime_cortexm_hardfault.go

@@ -1,4 +1,4 @@
-//go:build atsamd21 || nrf51
+//go:build atsamd21 || nrf51 || py32
 
 package runtime
 

src/runtime/runtime_cortexm_hardfault_debug.go

@@ -1,4 +1,4 @@
-//go:build cortexm && !atsamd21 && !nrf51
+//go:build cortexm && !atsamd21 && !nrf51 && !py32
 
 package runtime
 

src/runtime/runtime_py32.go

@@ -0,0 +1,74 @@
+//go:build py32
+
+package runtime
+
+import (
+	"device/arm"
+	"machine"
+	"runtime/volatile"
+)
+
+var tickCounter volatile.Register64
+
+//export Reset_Handler
+func main() {
+	preinit()
+
+	configureHSI()
+
+	configureSystemTimer()
+	machine.InitSerial()
+
+	run()
+	exit(0)
+}
+
+// configureSystemTimer configures SysTick for 1ms ticks.
+func configureSystemTimer() {
+	arm.SetupSystemTimer(machine.CPUFrequency() / 1000)
+}
+
+func ticksToNanoseconds(value timeUnit) int64 {
+	return int64(value * 1000_000)
+}
+
+func nanosecondsToTicks(ns int64) timeUnit {
+	return timeUnit(ns / 1000_000)
+}
+
+//go:linkname ticks runtime.ticks
+func ticks() timeUnit {
+	return timeUnit(tickCounter.Get())
+}
+
+func sleepTicks(d timeUnit) {
+	if d <= 0 {
+		return
+	}
+	start := ticks()
+	stop := start + d
+	for ticks() < stop {
+		waitForEvents()
+	}
+}
+
+func waitForEvents() {
+	arm.Asm("wfe")
+}
+
+func putchar(c byte) {
+	machine.Serial.WriteByte(c)
+}
+
+func getchar() byte {
+	for machine.Serial.Buffered() == 0 {
+		Gosched()
+	}
+	v, _ := machine.Serial.ReadByte()
+	return v
+}
+
+//export SysTick_Handler
+func handleSysTick() {
+	tickCounter.Set(tickCounter.Get() + 1)
+}

src/runtime/runtime_py32_hsi.go

@@ -0,0 +1,9 @@
+//go:build py32 && !py32_hsi_fs_op && !py32_no_hsi_fs
+
+package runtime
+
+import "device/py32"
+
+func configureHSI() {
+	py32.RCC.SetICSCR_HSI_FS(py32.RCC_ICSCR_HSI_FS_Freq24MHz)
+}

src/runtime/runtime_py32_hsi_none.go

@@ -0,0 +1,8 @@
+//go:build py32 && py32_no_hsi_fs
+
+package runtime
+
+// The M4 SVDs do not expose the M0+ ICSCR.HSI_FS selector. Preserve their
+// vendor-defined 8 MHz reset clock instead of writing an unverified encoding.
+func configureHSI() {
+}

src/runtime/runtime_py32_hsi_op.go

@@ -0,0 +1,11 @@
+//go:build py32 && py32_hsi_fs_op
+
+package runtime
+
+import "device/py32"
+
+// The official L090/T09x headers provide HSI_FS_OP position and mask helpers,
+// but no value definitions. Encoding 4 selects the runtime's 24 MHz clock.
+func configureHSI() {
+	py32.RCC.SetICSCR_HSI_FS_OP(4)
+}