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https://github.com/tinygo-org/tinygo.git
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nucleol552ze: implementation with CLOCK, LED, and UART
This commit is contained in:
Kenneth Bell
committed by
deadprogram
deadprogram
parent
801bd2a7ff
commit
af02c09b56
@@ -0,0 +1,45 @@
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// +build nucleol552ze
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package machine
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import (
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"device/stm32"
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"runtime/interrupt"
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)
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const (
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LED = LED_BUILTIN
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LED_BUILTIN = LED_GREEN
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LED_GREEN = PC7
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LED_BLUE = PB7
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LED_RED = PA9
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)
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const (
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BUTTON = BUTTON_USER
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BUTTON_USER = PC13
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)
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// UART pins
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const (
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// PG7 and PG8 are connected to the ST-Link Virtual Com Port (VCP)
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UART_TX_PIN = PG7
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UART_RX_PIN = PG8
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UART_ALT_FN = 8 // GPIO_AF8_LPUART1
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)
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var (
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// LPUART1 is the hardware serial port connected to the onboard ST-LINK
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// debugger to be exposed as virtual COM port over USB on Nucleo boards.
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// Both UART0 and UART1 refer to LPUART1.
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UART0 = UART{
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Buffer: NewRingBuffer(),
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Bus: stm32.LPUART1,
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AltFuncSelector: UART_ALT_FN,
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}
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UART1 = &UART0
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)
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func init() {
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UART0.Interrupt = interrupt.New(stm32.IRQ_LPUART1, UART0.handleInterrupt)
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}
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+1
-1
@@ -1,4 +1,4 @@
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// +build avr nrf sam stm32,!stm32f407,!stm32f7x2,!stm32l0 fe310 k210
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// +build avr nrf sam stm32,!stm32f407,!stm32f7x2,!stm32l5x2,!stm32l0 fe310 k210
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package machine
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@@ -1,4 +1,4 @@
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// +build stm32,!stm32f103,!stm32f407,!stm32f7x2,!stm32l0
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// +build stm32,!stm32f103,!stm32f407,!stm32f7x2,!stm32l5x2,!stm32l0
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package machine
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@@ -0,0 +1,62 @@
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// +build stm32,stm32l5x2
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package machine
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// Peripheral abstraction layer for UARTs on the stm32 family.
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import (
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"device/stm32"
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"runtime/interrupt"
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"unsafe"
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)
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// Configure the UART.
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func (uart UART) Configure(config UARTConfig) {
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// Default baud rate to 115200.
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if config.BaudRate == 0 {
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config.BaudRate = 115200
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}
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// Set the GPIO pins to defaults if they're not set
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if config.TX == 0 && config.RX == 0 {
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config.TX = UART_TX_PIN
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config.RX = UART_RX_PIN
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}
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// Enable USART clock
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enableAltFuncClock(unsafe.Pointer(uart.Bus))
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uart.configurePins(config)
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// Set baud rate
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uart.SetBaudRate(config.BaudRate)
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// Enable USART port, tx, rx and rx interrupts
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uart.Bus.CR1.Set(stm32.USART_CR1_TE | stm32.USART_CR1_RE | stm32.USART_CR1_RXNEIE | stm32.USART_CR1_UE)
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// Enable RX IRQ
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uart.Interrupt.SetPriority(0xc0)
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uart.Interrupt.Enable()
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}
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// handleInterrupt should be called from the appropriate interrupt handler for
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// this UART instance.
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func (uart *UART) handleInterrupt(interrupt.Interrupt) {
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uart.Receive(byte((uart.Bus.RDR.Get() & 0xFF)))
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}
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// SetBaudRate sets the communication speed for the UART. Defer to chip-specific
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// routines for calculation
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func (uart UART) SetBaudRate(br uint32) {
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divider := uart.getBaudRateDivisor(br)
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uart.Bus.BRR.Set(divider)
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}
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// WriteByte writes a byte of data to the UART.
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func (uart UART) WriteByte(c byte) error {
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uart.Bus.TDR.Set(uint32(c))
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for !uart.Bus.ISR.HasBits(stm32.USART_ISR_TXE) {
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}
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return nil
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}
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@@ -1,4 +1,4 @@
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// +build stm32,!stm32f7x2
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// +build stm32,!stm32f7x2,!stm32l5x2
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package machine
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@@ -1,4 +1,4 @@
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// +build stm32,!stm32f7,!stm32l0
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// +build stm32,!stm32f7,!stm32l5x2,!stm32l0
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package machine
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@@ -0,0 +1,253 @@
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// +build stm32l5
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package machine
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// Peripheral abstraction layer for the stm32l5
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import (
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"device/stm32"
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"unsafe"
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)
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const (
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PA0 = portA + 0
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PA1 = portA + 1
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PA2 = portA + 2
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PA3 = portA + 3
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PA4 = portA + 4
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PA5 = portA + 5
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PA6 = portA + 6
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PA7 = portA + 7
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PA8 = portA + 8
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PA9 = portA + 9
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PA10 = portA + 10
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PA11 = portA + 11
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PA12 = portA + 12
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PA13 = portA + 13
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PA14 = portA + 14
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PA15 = portA + 15
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PB0 = portB + 0
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PB1 = portB + 1
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PB2 = portB + 2
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PB3 = portB + 3
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PB4 = portB + 4
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PB5 = portB + 5
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PB6 = portB + 6
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PB7 = portB + 7
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PB8 = portB + 8
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PB9 = portB + 9
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PB10 = portB + 10
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PB11 = portB + 11
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PB12 = portB + 12
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PB13 = portB + 13
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PB14 = portB + 14
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PB15 = portB + 15
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PC0 = portC + 0
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PC1 = portC + 1
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PC2 = portC + 2
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PC3 = portC + 3
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PC4 = portC + 4
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PC5 = portC + 5
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PC6 = portC + 6
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PC7 = portC + 7
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PC8 = portC + 8
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PC9 = portC + 9
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PC10 = portC + 10
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PC11 = portC + 11
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PC12 = portC + 12
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PC13 = portC + 13
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PC14 = portC + 14
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PC15 = portC + 15
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PD0 = portD + 0
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PD1 = portD + 1
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PD2 = portD + 2
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PD3 = portD + 3
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PD4 = portD + 4
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PD5 = portD + 5
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PD6 = portD + 6
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PD7 = portD + 7
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PD8 = portD + 8
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PD9 = portD + 9
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PD10 = portD + 10
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PD11 = portD + 11
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PD12 = portD + 12
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PD13 = portD + 13
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PD14 = portD + 14
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PD15 = portD + 15
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PE0 = portE + 0
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PE1 = portE + 1
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PE2 = portE + 2
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PE3 = portE + 3
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PE4 = portE + 4
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PE5 = portE + 5
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PE6 = portE + 6
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PE7 = portE + 7
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PE8 = portE + 8
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PE9 = portE + 9
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PE10 = portE + 10
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PE11 = portE + 11
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PE12 = portE + 12
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PE13 = portE + 13
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PE14 = portE + 14
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PE15 = portE + 15
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PF0 = portF + 0
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PF1 = portF + 1
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PF2 = portF + 2
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PF3 = portF + 3
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PF4 = portF + 4
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PF5 = portF + 5
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PF6 = portF + 6
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PF7 = portF + 7
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PF8 = portF + 8
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PF9 = portF + 9
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PF10 = portF + 10
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PF11 = portF + 11
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PF12 = portF + 12
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PF13 = portF + 13
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PF14 = portF + 14
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PF15 = portF + 15
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PG0 = portG + 0
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PG1 = portG + 1
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PG2 = portG + 2
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PG3 = portG + 3
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PG4 = portG + 4
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PG5 = portG + 5
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PG6 = portG + 6
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PG7 = portG + 7
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PG8 = portG + 8
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PG9 = portG + 9
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PG10 = portG + 10
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PG11 = portG + 11
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PG12 = portG + 12
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PG13 = portG + 13
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PG14 = portG + 14
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PG15 = portG + 15
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PH0 = portH + 0
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PH1 = portH + 1
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)
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func (p Pin) getPort() *stm32.GPIO_Type {
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switch p / 16 {
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case 0:
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return stm32.GPIOA
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case 1:
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return stm32.GPIOB
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case 2:
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return stm32.GPIOC
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case 3:
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return stm32.GPIOD
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case 4:
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return stm32.GPIOE
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case 5:
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return stm32.GPIOF
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case 6:
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return stm32.GPIOG
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case 7:
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return stm32.GPIOH
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default:
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panic("machine: unknown port")
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}
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}
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// enableClock enables the clock for this desired GPIO port.
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func (p Pin) enableClock() {
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switch p / 16 {
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case 0:
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stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_GPIOAEN)
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case 1:
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stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_GPIOBEN)
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case 2:
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stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_GPIOCEN)
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case 3:
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stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_GPIODEN)
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case 4:
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stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_GPIOEEN)
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case 5:
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stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_GPIOFEN)
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case 6:
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stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_GPIOGEN)
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case 7:
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stm32.RCC.AHB2ENR.SetBits(stm32.RCC_AHB2ENR_GPIOHEN)
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default:
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panic("machine: unknown port")
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}
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}
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// Enable peripheral clock
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func enableAltFuncClock(bus unsafe.Pointer) {
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switch bus {
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case unsafe.Pointer(stm32.DAC): // DAC interface clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_DAC1EN)
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case unsafe.Pointer(stm32.PWR): // Power interface clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_PWREN)
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case unsafe.Pointer(stm32.I2C3): // I2C3 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_I2C3EN)
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case unsafe.Pointer(stm32.I2C2): // I2C2 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_I2C2EN)
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case unsafe.Pointer(stm32.I2C1): // I2C1 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_I2C1EN)
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case unsafe.Pointer(stm32.UART5): // UART5 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_UART5EN)
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case unsafe.Pointer(stm32.UART4): // UART4 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_UART4EN)
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case unsafe.Pointer(stm32.USART3): // USART3 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_USART3EN)
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case unsafe.Pointer(stm32.USART2): // USART2 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_USART2EN)
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case unsafe.Pointer(stm32.SPI3): // SPI3 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_SP3EN)
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case unsafe.Pointer(stm32.SPI2): // SPI2 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_SPI2EN)
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case unsafe.Pointer(stm32.WWDG): // Window watchdog clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_WWDGEN)
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case unsafe.Pointer(stm32.TIM7): // TIM7 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM7EN)
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case unsafe.Pointer(stm32.TIM6): // TIM6 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM6EN)
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case unsafe.Pointer(stm32.TIM5): // TIM5 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM5EN)
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case unsafe.Pointer(stm32.TIM4): // TIM4 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM4EN)
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case unsafe.Pointer(stm32.TIM3): // TIM3 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM3EN)
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case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable
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stm32.RCC.APB1ENR1.SetBits(stm32.RCC_APB1ENR1_TIM2EN)
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case unsafe.Pointer(stm32.UCPD1): // UCPD1 clock enable
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stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_UCPD1EN)
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case unsafe.Pointer(stm32.FDCAN1): // FDCAN1 clock enable
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stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_FDCAN1EN)
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case unsafe.Pointer(stm32.LPTIM3): // LPTIM3 clock enable
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stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_LPTIM3EN)
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case unsafe.Pointer(stm32.LPTIM2): // LPTIM2 clock enable
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stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_LPTIM2EN)
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case unsafe.Pointer(stm32.I2C4): // I2C4 clock enable
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stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_I2C4EN)
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case unsafe.Pointer(stm32.LPUART1): // LPUART1 clock enable
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stm32.RCC.APB1ENR2.SetBits(stm32.RCC_APB1ENR2_LPUART1EN)
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case unsafe.Pointer(stm32.TIM17): // TIM17 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM17EN)
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case unsafe.Pointer(stm32.TIM16): // TIM16 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM16EN)
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case unsafe.Pointer(stm32.TIM15): // TIM15 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM15EN)
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case unsafe.Pointer(stm32.SYSCFG): // System configuration controller clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SYSCFGEN)
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case unsafe.Pointer(stm32.SPI1): // SPI1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SPI1EN)
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case unsafe.Pointer(stm32.USART1): // USART1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART1EN)
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case unsafe.Pointer(stm32.TIM8): // TIM8 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM8EN)
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case unsafe.Pointer(stm32.TIM1): // TIM1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM1EN)
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}
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}
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@@ -0,0 +1,42 @@
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// +build stm32l5x2
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package machine
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|
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// Peripheral abstraction layer for the stm32f407
|
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|
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import (
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"device/stm32"
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"runtime/interrupt"
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)
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func CPUFrequency() uint32 {
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return 110000000
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}
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//---------- UART related types and code
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// UART representation
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type UART struct {
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Buffer *RingBuffer
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Bus *stm32.USART_Type
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Interrupt interrupt.Interrupt
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AltFuncSelector stm32.AltFunc
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}
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// Configure the UART.
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func (uart UART) configurePins(config UARTConfig) {
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if config.RX.getPort() == stm32.GPIOG || config.TX.getPort() == stm32.GPIOG {
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// Enable VDDIO2 power supply, which is an independant power supply for the PGx pins
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stm32.PWR.CR2.SetBits(stm32.PWR_CR2_IOSV)
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}
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// enable the alternate functions on the TX and RX pins
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config.TX.ConfigureAltFunc(PinConfig{Mode: PinModeUARTTX}, uart.AltFuncSelector)
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config.RX.ConfigureAltFunc(PinConfig{Mode: PinModeUARTRX}, uart.AltFuncSelector)
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}
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// UART baudrate calc based on the bus and clockspeed
|
||||
// NOTE: keep this in sync with the runtime/runtime_stm32l5x2.go clock init code
|
||||
func (uart UART) getBaudRateDivisor(baudRate uint32) uint32 {
|
||||
return 256 * (CPUFrequency() / baudRate)
|
||||
}
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
// +build !baremetal sam stm32,!stm32f7x2 fe310 k210 atmega
|
||||
// +build !baremetal sam stm32,!stm32f7x2,!stm32l5x2 fe310 k210 atmega
|
||||
|
||||
package machine
|
||||
|
||||
|
||||
Reference in New Issue
Block a user