tinygo-org/tinygo
1
0
Fork 0
mirror of https://github.com/tinygo-org/tinygo.git synced 2026-08-17 11:13:27 +00:00
Code Issues Packages Projects Releases 6 Wiki Activity

esp32: fix XIP boot crash caused by LLVM 22 / lld l32r relocation bug

Browse Source 
Work around an lld (LLVM 22) bug where l32r PC-relative offsets are
miscalculated when auto-generated .literal.* sections are prepended to
.text.* sections by the linker script. The assembler emits .literal
entries for movi instructions whose constants exceed the 12-bit signed
range; lld then resolves the l32r relocations with incorrect offsets,
causing every l32r in the boot code to load from the wrong literal
pool entry.

The symptom was a TG0WDT_SYS_RESET boot loop: the watchdog disable
code loaded wrong register addresses via l32r and silently wrote to
the wrong peripheral registers, leaving the watchdog running.

Fix by constructing PS_WOE_MASK (0x40000) with movi+slli instead of a
single large-constant movi, eliminating all auto-generated .literal
section entries. This is compatible with both LLVM 20 and LLVM 22.

Also revert DRAM origin to 0x3FFAE000 (200K) and remove rom_phyFuns
symbols that belong in a separate WiFi commit.

Signed-off-by: deadprogram <ron@hybridgroup.com>
This commit is contained in:
deadprogram
2026-07-18 16:08:13 +02:00
committed by Ron Evans
parent 2dea20b769
commit aee0581a32
2 changed files with 33 additions and 51 deletions
Download Patch File Download Diff File Expand all files Collapse all files
targets/esp32.ld
+4 -11
View File
@@ -15,10 +15,9 @@
MEMORY
{
/* SRAM2 usable DRAM (0x3FFB0000-0x3FFE0000, 192K): reserve the first 8KB
* (0x3FFAE000-0x3FFB0000) for ROM conventions, then use the rest for the
* stack, initialized .data, .bss, and the whole Go GC heap. */
DRAM (rw) : ORIGIN = 0x3FFB0000, LENGTH = 192K
/* SRAM2 (0x3FFAE000-0x3FFE0000, 200K): a single safe contiguous block used
* for the stack, initialized .data, .bss, and the whole Go GC heap. */
DRAM (rw) : ORIGIN = 0x3FFAE000, LENGTH = 200K
/* Top of SRAM1 (0x3FFF0000-0x40000000, 64K): pool 7 + pool 6. This is the
* ONLY part of SRAM1 that is safe for us to use:
@@ -186,7 +185,7 @@ SECTIONS
_globals_start = _sbss;
_globals_end = _wifi_bss_end;
_heap_start = _edata;
/* Go GC heap = the rest of SRAM2 above .bss (~113KB), a single safe contiguous
/* Go GC heap = the rest of SRAM2 above .bss (~121KB), a single safe contiguous
* block. The WiFi arena lives in DRAM1 (SRAM1 pool 7/6), so its ~64KB does not
* consume Go heap and its DMA is isolated from GC objects. The heap never
* touches SRAM1's ROM/MAC-dump regions (0x3FFE0000-0x3FFF0000, left unused). */
@@ -194,12 +193,6 @@ _heap_end = 0x3FFE0000;
_stack_size = 4K;
/* ESP32 ROM-owned PHY DRAM symbols from ESP-IDF esp32.rom.ld.
* Exposed as linker symbols so firmware code can reference them without
* hardcoding addresses in C sources. */
PROVIDE ( rom_phyFuns = 0x3ffae0c0 );
PROVIDE ( g_phyFuns_instance = 0x3ffae0c4 );
/* From ESP-IDF:
* components/esp_rom/esp32/ld/esp32.rom.newlib-funcs.ld
* This is the subset that is sometimes used by LLVM during codegen, and thus