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stm32: add nucleo-l031k6 support

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Adds i2c for all L0 series

UART, Blinky (LED) and i2c tested
This commit is contained in:
Kenneth Bell
2021-03-22 18:14:28 -07:00
committed by Ron Evans
parent c246978dd7
commit a30671751f
14 changed files with 389 additions and 95 deletions
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src/machine/machine_stm32l0x2.go
+54
View File
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// +build stm32l0x2
package machine
// Peripheral abstraction layer for the stm32l0
import (
"device/stm32"
"unsafe"
)
// Enable peripheral clock
func enableAltFuncClock(bus unsafe.Pointer) {
switch bus {
case unsafe.Pointer(stm32.DAC): // DAC interface clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_DACEN)
case unsafe.Pointer(stm32.PWR): // Power interface clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_PWREN)
case unsafe.Pointer(stm32.I2C3): // I2C3 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C3EN)
case unsafe.Pointer(stm32.I2C2): // I2C2 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C2EN)
case unsafe.Pointer(stm32.I2C1): // I2C1 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C1EN)
case unsafe.Pointer(stm32.USART5): // UART5 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART5EN)
case unsafe.Pointer(stm32.USART4): // UART4 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART4EN)
case unsafe.Pointer(stm32.USART2): // USART2 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART2EN)
case unsafe.Pointer(stm32.SPI2): // SPI2 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_SPI2EN)
case unsafe.Pointer(stm32.LPUART1): // LPUART1 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_LPUART1EN)
case unsafe.Pointer(stm32.WWDG): // Window watchdog clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_WWDGEN)
case unsafe.Pointer(stm32.TIM7): // TIM7 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM7EN)
case unsafe.Pointer(stm32.TIM6): // TIM6 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM6EN)
case unsafe.Pointer(stm32.TIM3): // TIM3 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM3EN)
case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable
stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM2EN)
case unsafe.Pointer(stm32.SYSCFG): // System configuration controller clock enable
stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SYSCFGEN)
case unsafe.Pointer(stm32.SPI1): // SPI1 clock enable
stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SPI1EN)
case unsafe.Pointer(stm32.ADC): // ADC clock enable
stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADCEN)
case unsafe.Pointer(stm32.USART1): // USART1 clock enable
stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART1EN)
}
}