mirror of
https://github.com/tinygo-org/tinygo.git
synced 2026-08-08 13:03:39 +00:00
stm32: add nucleo-l031k6 support
Adds i2c for all L0 series UART, Blinky (LED) and i2c tested
This commit is contained in:
Kenneth Bell
Ron Evans
@@ -41,13 +41,17 @@ const (
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// LORA RFM95 Radio
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RFM95_DIO0_PIN = PC13
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//TinyGo UART is MCU LPUSART1
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// TinyGo UART is MCU LPUSART1
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UART_RX_PIN = PA13
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UART_TX_PIN = PA14
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//TinyGo UART1 is MCU USART1
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// TinyGo UART1 is MCU USART1
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UART1_RX_PIN = PB6
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UART1_TX_PIN = PB7
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// MPU9250 Nine-Axis (Gyro + Accelerometer + Compass)
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I2C0_SCL_PIN = PA9
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I2C0_SDA_PIN = PA10
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)
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var (
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@@ -68,6 +72,13 @@ var (
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RxAltFuncSelector: 0,
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}
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// MPU9250 Nine-Axis (Gyro + Accelerometer + Compass)
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I2C1 = &I2C{
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Bus: stm32.I2C1,
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AltFuncSelector: 6,
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}
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I2C0 = I2C1
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// SPI
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SPI0 = SPI{
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Bus: stm32.SPI1,
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@@ -0,0 +1,92 @@
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// +build nucleol031k6
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package machine
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import (
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"device/stm32"
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"runtime/interrupt"
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)
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const (
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LED = LED_BUILTIN
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LED_BUILTIN = LED_GREEN
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LED_GREEN = PB3
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)
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const (
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// Arduino Pins
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A0 = PA0 // ADC_IN0
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A1 = PA1 // ADC_IN1
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A2 = PA3 // ADC_IN3
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A3 = PA4 // ADC_IN4
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A4 = PA5 // ADC_IN5 || I2C1_SDA
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A5 = PA6 // ADC_IN6 || I2C1_SCL
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A6 = PA7 // ADC_IN7
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A7 = PA2 // ADC_IN2
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D0 = PA10 // USART1_TX
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D1 = PA9 // USART1_RX
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D2 = PA12
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D3 = PB0 // TIM2_CH3
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D4 = PB7
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D5 = PB6 // TIM16_CH1N
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D6 = PB1 // TIM14_CH1
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D9 = PA8 // TIM1_CH1
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D10 = PA11 // SPI_CS || TIM1_CH4
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D11 = PB5 // SPI1_MOSI || TIM3_CH2
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D12 = PB4 // SPI1_MISO
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D13 = PB3 // SPI1_SCK
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)
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const (
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// UART pins
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// PA2 and PA15 are connected to the ST-Link Virtual Com Port (VCP)
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UART_TX_PIN = PA2
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UART_RX_PIN = PA15
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// SPI
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SPI1_SCK_PIN = PB3
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SPI1_SDI_PIN = PB5
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SPI1_SDO_PIN = PB4
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SPI0_SCK_PIN = SPI1_SCK_PIN
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SPI0_SDI_PIN = SPI1_SDI_PIN
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SPI0_SDO_PIN = SPI1_SDO_PIN
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// I2C pins
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// PB6 and PB7 are mapped to CN4 pin 7 and CN4 pin 8 respectively with the
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// default solder bridge settings
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I2C0_SCL_PIN = PB7
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I2C0_SDA_PIN = PB6
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I2C0_ALT_FUNC = 1
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)
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var (
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// USART2 is the hardware serial port connected to the onboard ST-LINK
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// debugger to be exposed as virtual COM port over USB on Nucleo boards.
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// Both UART0 and UART1 refer to USART2.
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UART0 = UART{
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Buffer: NewRingBuffer(),
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Bus: stm32.USART2,
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TxAltFuncSelector: 4,
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RxAltFuncSelector: 4,
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}
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UART1 = &UART0
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// I2C1 is documented, alias to I2C0 as well
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I2C1 = &I2C{
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Bus: stm32.I2C1,
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AltFuncSelector: 1,
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}
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I2C0 = I2C1
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// SPI
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SPI0 = SPI{
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Bus: stm32.SPI1,
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AltFuncSelector: 0,
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}
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SPI1 = &SPI0
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)
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func init() {
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UART0.Interrupt = interrupt.New(stm32.IRQ_USART2, UART0.handleInterrupt)
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}
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+1
-1
@@ -1,4 +1,4 @@
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// +build atmega nrf sam stm32,!stm32l0 fe310 k210
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// +build atmega nrf sam stm32 fe310 k210
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package machine
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@@ -1,4 +1,4 @@
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// +build stm32l5 stm32f7 stm32l4
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// +build stm32l5 stm32f7 stm32l4 stm32l0
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package machine
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@@ -6,7 +6,6 @@ package machine
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import (
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"device/stm32"
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"unsafe"
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)
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func CPUFrequency() uint32 {
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@@ -142,50 +141,6 @@ func (p Pin) enableClock() {
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}
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}
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// Enable peripheral clock
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func enableAltFuncClock(bus unsafe.Pointer) {
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switch bus {
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case unsafe.Pointer(stm32.DAC): // DAC interface clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_DACEN)
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case unsafe.Pointer(stm32.PWR): // Power interface clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_PWREN)
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case unsafe.Pointer(stm32.I2C3): // I2C3 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C3EN)
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case unsafe.Pointer(stm32.I2C2): // I2C2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C2EN)
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case unsafe.Pointer(stm32.I2C1): // I2C1 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C1EN)
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case unsafe.Pointer(stm32.USART5): // UART5 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART5EN)
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case unsafe.Pointer(stm32.USART4): // UART4 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART4EN)
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case unsafe.Pointer(stm32.USART2): // USART2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART2EN)
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case unsafe.Pointer(stm32.SPI2): // SPI2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_SPI2EN)
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case unsafe.Pointer(stm32.LPUART1): // LPUART1 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_LPUART1EN)
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case unsafe.Pointer(stm32.WWDG): // Window watchdog clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_WWDGEN)
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case unsafe.Pointer(stm32.TIM7): // TIM7 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM7EN)
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case unsafe.Pointer(stm32.TIM6): // TIM6 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM6EN)
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case unsafe.Pointer(stm32.TIM3): // TIM3 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM3EN)
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case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM2EN)
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case unsafe.Pointer(stm32.SYSCFG): // System configuration controller clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SYSCFGEN)
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case unsafe.Pointer(stm32.SPI1): // SPI1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SPI1EN)
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case unsafe.Pointer(stm32.ADC): // ADC clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADCEN)
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case unsafe.Pointer(stm32.USART1): // USART1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART1EN)
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}
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}
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//---------- UART related types and code
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// Configure the UART.
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@@ -285,3 +240,13 @@ func (spi SPI) configurePins(config SPIConfig) {
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config.SDO.ConfigureAltFunc(PinConfig{Mode: PinModeSPISDO}, spi.AltFuncSelector)
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config.SDI.ConfigureAltFunc(PinConfig{Mode: PinModeSPISDI}, spi.AltFuncSelector)
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}
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//---------- I2C related types and code
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// Gets the value for TIMINGR register
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func (i2c I2C) getFreqRange() uint32 {
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// This is a 'magic' value calculated by STM32CubeMX
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// for 80MHz PCLK1.
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// TODO: Do calculations based on PCLK1
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return 0x00303D5B
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}
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@@ -0,0 +1,52 @@
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// +build stm32l0x1
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package machine
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// Peripheral abstraction layer for the stm32l0
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import (
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"device/stm32"
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"unsafe"
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)
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// Enable peripheral clock
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func enableAltFuncClock(bus unsafe.Pointer) {
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switch bus {
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case unsafe.Pointer(stm32.PWR): // Power interface clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_PWREN)
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case unsafe.Pointer(stm32.I2C3): // I2C3 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C3EN)
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case unsafe.Pointer(stm32.I2C2): // I2C2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C2EN)
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case unsafe.Pointer(stm32.I2C1): // I2C1 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C1EN)
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case unsafe.Pointer(stm32.USART5): // UART5 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART5EN)
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case unsafe.Pointer(stm32.USART4): // UART4 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART4EN)
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case unsafe.Pointer(stm32.USART2): // USART2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART2EN)
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case unsafe.Pointer(stm32.SPI2): // SPI2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_SPI2EN)
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case unsafe.Pointer(stm32.LPUART1): // LPUART1 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_LPUART1EN)
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case unsafe.Pointer(stm32.WWDG): // Window watchdog clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_WWDGEN)
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case unsafe.Pointer(stm32.TIM7): // TIM7 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM7EN)
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case unsafe.Pointer(stm32.TIM6): // TIM6 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM6EN)
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case unsafe.Pointer(stm32.TIM3): // TIM3 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM3EN)
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case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM2EN)
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case unsafe.Pointer(stm32.SYSCFG): // System configuration controller clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SYSCFGEN)
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case unsafe.Pointer(stm32.SPI1): // SPI1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SPI1EN)
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case unsafe.Pointer(stm32.ADC): // ADC clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADCEN)
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case unsafe.Pointer(stm32.USART1): // USART1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART1EN)
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}
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}
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@@ -0,0 +1,54 @@
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// +build stm32l0x2
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package machine
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// Peripheral abstraction layer for the stm32l0
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import (
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"device/stm32"
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"unsafe"
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)
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// Enable peripheral clock
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func enableAltFuncClock(bus unsafe.Pointer) {
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switch bus {
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case unsafe.Pointer(stm32.DAC): // DAC interface clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_DACEN)
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case unsafe.Pointer(stm32.PWR): // Power interface clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_PWREN)
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case unsafe.Pointer(stm32.I2C3): // I2C3 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C3EN)
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case unsafe.Pointer(stm32.I2C2): // I2C2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C2EN)
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case unsafe.Pointer(stm32.I2C1): // I2C1 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C1EN)
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case unsafe.Pointer(stm32.USART5): // UART5 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART5EN)
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case unsafe.Pointer(stm32.USART4): // UART4 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART4EN)
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case unsafe.Pointer(stm32.USART2): // USART2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_USART2EN)
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case unsafe.Pointer(stm32.SPI2): // SPI2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_SPI2EN)
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case unsafe.Pointer(stm32.LPUART1): // LPUART1 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_LPUART1EN)
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case unsafe.Pointer(stm32.WWDG): // Window watchdog clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_WWDGEN)
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case unsafe.Pointer(stm32.TIM7): // TIM7 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM7EN)
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case unsafe.Pointer(stm32.TIM6): // TIM6 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM6EN)
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case unsafe.Pointer(stm32.TIM3): // TIM3 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM3EN)
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case unsafe.Pointer(stm32.TIM2): // TIM2 clock enable
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_TIM2EN)
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case unsafe.Pointer(stm32.SYSCFG): // System configuration controller clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SYSCFGEN)
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case unsafe.Pointer(stm32.SPI1): // SPI1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_SPI1EN)
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case unsafe.Pointer(stm32.ADC): // ADC clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_ADCEN)
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case unsafe.Pointer(stm32.USART1): // USART1 clock enable
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_USART1EN)
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}
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}
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