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compiler, runtime: support recover on riscv64

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This commit is contained in:
Jake Bailey
2026-07-23 21:18:38 -07:00
committed by Ron Evans
parent 0c68e1215e
commit 528476f2b3
2 changed files with 13 additions and 5 deletions
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compiler/defer.go
+11 -3
View File
@@ -32,7 +32,7 @@ func (b *builder) supportsRecover() bool {
// proposal of WebAssembly: // proposal of WebAssembly:
// https://github.com/WebAssembly/exception-handling // https://github.com/WebAssembly/exception-handling
return false return false
case "riscv64", "xtensa": case "xtensa":
// TODO: add support for these architectures // TODO: add support for these architectures
return false return false
default: default:
@@ -217,12 +217,20 @@ sw $$ra, 4($$5)
// So only add them when using hardfloat. // So only add them when using hardfloat.
constraints += ",~{$f0},~{$f1},~{$f2},~{$f3},~{$f4},~{$f5},~{$f6},~{$f7},~{$f8},~{$f9},~{$f10},~{$f11},~{$f12},~{$f13},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}" constraints += ",~{$f0},~{$f1},~{$f2},~{$f3},~{$f4},~{$f5},~{$f6},~{$f7},~{$f8},~{$f9},~{$f10},~{$f11},~{$f12},~{$f13},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"
} }
case "riscv32": case "riscv32", "riscv64":
asmString = ` if b.archFamily() == "riscv32" {
asmString = `
la a2, 1f la a2, 1f
sw a2, 4(a1) sw a2, 4(a1)
li a0, 0 li a0, 0
1:` 1:`
} else {
asmString = `
la a2, 1f
sd a2, 8(a1)
li a0, 0
1:`
}
constraints = "={a0},{a1},~{a1},~{a2},~{a3},~{a4},~{a5},~{a6},~{a7},~{s0},~{s1},~{s2},~{s3},~{s4},~{s5},~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{t0},~{t1},~{t2},~{t3},~{t4},~{t5},~{t6},~{ra},~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31},~{memory}" constraints = "={a0},{a1},~{a1},~{a2},~{a3},~{a4},~{a5},~{a6},~{a7},~{s0},~{s1},~{s2},~{s3},~{s4},~{s5},~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{t0},~{t1},~{t2},~{t3},~{t4},~{t5},~{t6},~{ra},~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31},~{memory}"
default: default:
// This case should have been handled by b.supportsRecover(). // This case should have been handled by b.supportsRecover().
src/runtime/asm_riscv.S
+2 -2
View File
@@ -47,8 +47,8 @@ tinygo_scanCurrentStack:
tinygo_longjmp: tinygo_longjmp:
// Note: the code we jump to assumes a0 is non-zero, which is already the // Note: the code we jump to assumes a0 is non-zero, which is already the
// case because that's the defer frame pointer. // case because that's the defer frame pointer.
lw sp, 0(a0) // jumpSP LREG sp, 0(a0) // jumpSP
lw a1, REGSIZE(a0) // jumpPC LREG a1, REGSIZE(a0) // jumpPC
jr a1 jr a1
.section .text.tinygo_checkpointJump .section .text.tinygo_checkpointJump