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riscv: define CSR constants and use them where possible
This commit is contained in:
committed by
Ron Evans
parent
8a73502f11
commit
4bce85dc09
@@ -44,10 +44,10 @@ func main() {
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// Reset the MIE register and enable external interrupts.
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// It must be reset here because it not zeroed at startup.
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riscv.MIE.Set(1 << 11) // bit 11 is for machine external interrupts
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riscv.MIE.Set(riscv.MIE_MEIE) // MEIE is for machine external interrupts
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// Enable global interrupts now that they've been set up.
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riscv.MSTATUS.SetBits(1 << 3) // MIE
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riscv.MSTATUS.SetBits(riscv.MSTATUS_MIE)
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preinit()
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initPeripherals()
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@@ -77,13 +77,13 @@ func handleInterrupt() {
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if cause&(1<<63) != 0 {
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// Topmost bit is set, which means that it is an interrupt.
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switch code {
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case 7: // Machine timer interrupt
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case riscv.MachineTimerInterrupt:
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// Signal timeout.
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timerWakeup.Set(1)
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// Disable the timer, to avoid triggering the interrupt right after
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// this interrupt returns.
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riscv.MIE.ClearBits(1 << 7) // MTIE bit
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case 11: // Machine external interrupt
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riscv.MIE.ClearBits(riscv.MIE_MTIE)
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case riscv.MachineExternalInterrupt:
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hartId := riscv.MHARTID.Get()
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// Claim this interrupt.
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@@ -149,7 +149,7 @@ func ticks() timeUnit {
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func sleepTicks(d timeUnit) {
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target := uint64(ticks() + d)
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kendryte.CLINT.MTIMECMP[0].Set(target)
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riscv.MIE.SetBits(1 << 7) // MTIE
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riscv.MIE.SetBits(riscv.MIE_MTIE)
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for {
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if timerWakeup.Get() != 0 {
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timerWakeup.Set(0)
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