mirror of
https://github.com/tinygo-org/tinygo.git
synced 2026-08-05 03:27:48 +00:00
Viable NXP/Teensy support
- Fix UART & putChar - Timer-based sleep - Enable systick in abort - Buffered, interrupt-based UART TX - Use the new interrupt API and fix sleepTicks - Make pins behave more like other boards - Use the MCU's UART numbering - Allow interrupts to wake the scheduler (#1214)
This commit is contained in:
Ethan Reesor
Ron Evans
@@ -2,91 +2,100 @@
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package machine
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import (
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"device/nxp"
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)
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// CPUFrequency returns the frequency of the ARM core clock (180MHz)
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func CPUFrequency() uint32 { return 180000000 }
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// //go:keep
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// //go:section .flash_config
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// var FlashControl = [16]byte{
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// 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
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// 0xFF, 0xFF, 0xFF, 0xFF, 0xDE, 0xF9, 0xFF, 0xFF,
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// }
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func CPUFrequency() uint32 {
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return 180000000
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}
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// ClockFrequency returns the frequency of the external oscillator (16MHz)
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func ClockFrequency() uint32 { return 16000000 }
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// LED on the Teensy
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const LED Pin = 13
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const LED = PC05
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var pins = []pin{
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// {bit, control register, gpio register bank}
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0: {16, &nxp.PORTB.PCR16, nxp.GPIOB},
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1: {17, &nxp.PORTB.PCR17, nxp.GPIOB},
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2: {0, &nxp.PORTD.PCR0, nxp.GPIOD},
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3: {12, &nxp.PORTA.PCR12, nxp.GPIOA},
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4: {13, &nxp.PORTA.PCR13, nxp.GPIOA},
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5: {7, &nxp.PORTD.PCR7, nxp.GPIOD},
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6: {4, &nxp.PORTD.PCR4, nxp.GPIOD},
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7: {2, &nxp.PORTD.PCR2, nxp.GPIOD},
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8: {3, &nxp.PORTD.PCR3, nxp.GPIOD},
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9: {3, &nxp.PORTC.PCR3, nxp.GPIOC},
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10: {4, &nxp.PORTC.PCR4, nxp.GPIOC},
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11: {6, &nxp.PORTC.PCR6, nxp.GPIOC},
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12: {7, &nxp.PORTC.PCR7, nxp.GPIOC},
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13: {5, &nxp.PORTC.PCR5, nxp.GPIOC},
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14: {1, &nxp.PORTD.PCR1, nxp.GPIOD},
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15: {0, &nxp.PORTC.PCR0, nxp.GPIOC},
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16: {0, &nxp.PORTB.PCR0, nxp.GPIOB},
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17: {1, &nxp.PORTB.PCR1, nxp.GPIOB},
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18: {3, &nxp.PORTB.PCR3, nxp.GPIOB},
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19: {2, &nxp.PORTB.PCR2, nxp.GPIOB},
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20: {5, &nxp.PORTD.PCR5, nxp.GPIOD},
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21: {6, &nxp.PORTD.PCR6, nxp.GPIOD},
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22: {1, &nxp.PORTC.PCR1, nxp.GPIOC},
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23: {2, &nxp.PORTC.PCR2, nxp.GPIOC},
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24: {26, &nxp.PORTE.PCR26, nxp.GPIOE},
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25: {5, &nxp.PORTA.PCR5, nxp.GPIOA},
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26: {14, &nxp.PORTA.PCR14, nxp.GPIOA},
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27: {15, &nxp.PORTA.PCR15, nxp.GPIOA},
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28: {16, &nxp.PORTA.PCR16, nxp.GPIOA},
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29: {18, &nxp.PORTB.PCR18, nxp.GPIOB},
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30: {19, &nxp.PORTB.PCR19, nxp.GPIOB},
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31: {10, &nxp.PORTB.PCR10, nxp.GPIOB},
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32: {11, &nxp.PORTB.PCR11, nxp.GPIOB},
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33: {24, &nxp.PORTE.PCR24, nxp.GPIOE},
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34: {25, &nxp.PORTE.PCR25, nxp.GPIOE},
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35: {8, &nxp.PORTC.PCR8, nxp.GPIOC},
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36: {9, &nxp.PORTC.PCR9, nxp.GPIOC},
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37: {10, &nxp.PORTC.PCR10, nxp.GPIOC},
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38: {11, &nxp.PORTC.PCR11, nxp.GPIOC},
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39: {17, &nxp.PORTA.PCR17, nxp.GPIOA},
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40: {28, &nxp.PORTA.PCR28, nxp.GPIOA},
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41: {29, &nxp.PORTA.PCR29, nxp.GPIOA},
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42: {26, &nxp.PORTA.PCR26, nxp.GPIOA},
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43: {20, &nxp.PORTB.PCR20, nxp.GPIOB},
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44: {22, &nxp.PORTB.PCR22, nxp.GPIOB},
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45: {23, &nxp.PORTB.PCR23, nxp.GPIOB},
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46: {21, &nxp.PORTB.PCR21, nxp.GPIOB},
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47: {8, &nxp.PORTD.PCR8, nxp.GPIOD},
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48: {9, &nxp.PORTD.PCR9, nxp.GPIOD},
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49: {4, &nxp.PORTB.PCR4, nxp.GPIOB},
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50: {5, &nxp.PORTB.PCR5, nxp.GPIOB},
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51: {14, &nxp.PORTD.PCR14, nxp.GPIOD},
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52: {13, &nxp.PORTD.PCR13, nxp.GPIOD},
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53: {12, &nxp.PORTD.PCR12, nxp.GPIOD},
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54: {15, &nxp.PORTD.PCR15, nxp.GPIOD},
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55: {11, &nxp.PORTD.PCR11, nxp.GPIOD},
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56: {10, &nxp.PORTE.PCR10, nxp.GPIOE},
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57: {11, &nxp.PORTE.PCR11, nxp.GPIOE},
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58: {0, &nxp.PORTE.PCR0, nxp.GPIOE},
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59: {1, &nxp.PORTE.PCR1, nxp.GPIOE},
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60: {2, &nxp.PORTE.PCR2, nxp.GPIOE},
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61: {3, &nxp.PORTE.PCR3, nxp.GPIOE},
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62: {4, &nxp.PORTE.PCR4, nxp.GPIOE},
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63: {5, &nxp.PORTE.PCR5, nxp.GPIOE},
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}
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// digital IO
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const (
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D00 = PB16
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D01 = PB17
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D02 = PD00
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D03 = PA12
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D04 = PA13
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D05 = PD07
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D06 = PD04
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D07 = PD02
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D08 = PD03
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D09 = PC03
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D10 = PC04
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D11 = PC06
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D12 = PC07
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D13 = PC05
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D14 = PD01
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D15 = PC00
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D16 = PB00
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D17 = PB01
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D18 = PB03
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D19 = PB02
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D20 = PD05
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D21 = PD06
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D22 = PC01
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D23 = PC02
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D24 = PE26
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D25 = PA05
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D26 = PA14
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D27 = PA15
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D28 = PA16
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D29 = PB18
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D30 = PB19
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D31 = PB10
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D32 = PB11
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D33 = PE24
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D34 = PE25
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D35 = PC08
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D36 = PC09
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D37 = PC10
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D38 = PC11
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D39 = PA17
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D40 = PA28
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D41 = PA29
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D42 = PA26
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D43 = PB20
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D44 = PB22
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D45 = PB23
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D46 = PB21
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D47 = PD08
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D48 = PD09
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D49 = PB04
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D50 = PB05
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D51 = PD14
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D52 = PD13
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D53 = PD12
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D54 = PD15
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D55 = PD11
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D56 = PE10
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D57 = PE11
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D58 = PE00
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D59 = PE01
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D60 = PE02
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D61 = PE03
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D62 = PE04
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D63 = PE05
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)
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//go:inline
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func (p Pin) reg() pin { return pins[p] }
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var (
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TeensyUART1 = &UART0
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TeensyUART2 = &UART1
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TeensyUART3 = &UART2
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TeensyUART4 = &UART3
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TeensyUART5 = &UART4
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)
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const (
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defaultUART0RX = D00
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defaultUART0TX = D01
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defaultUART1RX = D09
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defaultUART1TX = D10
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defaultUART2RX = D07
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defaultUART2TX = D08
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defaultUART3RX = D31
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defaultUART3TX = D32
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defaultUART4RX = D34
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defaultUART4TX = D33
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)
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@@ -1,33 +0,0 @@
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// +build nxp
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package machine
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import (
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"device/arm"
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"device/nxp"
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)
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type PinMode uint8
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const (
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PinInput PinMode = iota
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PinOutput
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)
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// Stop enters STOP (deep sleep) mode
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func Stop() {
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// set SLEEPDEEP to enable deep sleep
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nxp.SystemControl.SCR.SetBits(nxp.SystemControl_SCR_SLEEPDEEP)
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// enter STOP mode
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arm.Asm("wfi")
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}
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// Wait enters WAIT (sleep) mode
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func Wait() {
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// clear SLEEPDEEP bit to disable deep sleep
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nxp.SystemControl.SCR.ClearBits(nxp.SystemControl_SCR_SLEEPDEEP)
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// enter WAIT mode
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arm.Asm("wfi")
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}
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@@ -1,3 +1,32 @@
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// Derivative work of Teensyduino Core Library
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// http://www.pjrc.com/teensy/
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// Copyright (c) 2017 PJRC.COM, LLC.
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//
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// Permission is hereby granted, free of charge, to any person obtaining
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// a copy of this software and associated documentation files (the
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// "Software"), to deal in the Software without restriction, including
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// without limitation the rights to use, copy, modify, merge, publish,
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// distribute, sublicense, and/or sell copies of the Software, and to
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// permit persons to whom the Software is furnished to do so, subject to
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// the following conditions:
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//
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// 1. The above copyright notice and this permission notice shall be
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// included in all copies or substantial portions of the Software.
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//
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// 2. If the Software is incorporated into a build system that allows
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// selection among a list of target devices, then similar target
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// devices manufactured by PJRC.COM must be included in the list of
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// target devices and selectable in the same manner.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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// NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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// ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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// CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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// SOFTWARE.
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// +build nxp,mk66f18
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package machine
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@@ -5,8 +34,240 @@ package machine
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import (
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"device/nxp"
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"runtime/volatile"
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"unsafe"
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)
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type PinMode uint8
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const (
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PinInput PinMode = iota
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PinInputPullUp
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PinInputPullDown
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PinOutput
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PinOutputOpenDrain
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PinDisable
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)
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const (
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PA00 Pin = iota
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PA01
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PA02
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PA03
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PA04
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PA05
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PA06
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PA07
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PA08
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PA09
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PA10
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PA11
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PA12
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PA13
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PA14
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PA15
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PA16
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PA17
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PA18
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PA19
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PA20
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PA21
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PA22
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PA23
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PA24
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PA25
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PA26
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PA27
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PA28
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PA29
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)
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const (
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PB00 Pin = iota + 32
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PB01
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PB02
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PB03
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PB04
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PB05
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PB06
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PB07
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PB08
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PB09
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PB10
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PB11
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_
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_
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_
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_
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PB16
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PB17
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PB18
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PB19
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PB20
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PB21
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PB22
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PB23
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)
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const (
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PC00 Pin = iota + 64
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PC01
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PC02
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PC03
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PC04
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PC05
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PC06
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PC07
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PC08
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PC09
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PC10
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PC11
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PC12
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PC13
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PC14
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PC15
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PC16
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PC17
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PC18
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PC19
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)
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const (
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PD00 Pin = iota + 96
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PD01
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PD02
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PD03
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PD04
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PD05
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PD06
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PD07
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PD08
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PD09
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PD10
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PD11
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PD12
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PD13
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PD14
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PD15
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)
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const (
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PE00 Pin = iota + 128
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PE01
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PE02
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PE03
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PE04
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PE05
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PE06
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PE07
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PE08
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PE09
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PE10
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PE11
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PE12
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PE13
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PE14
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PE15
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PE16
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PE17
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PE18
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PE19
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PE20
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PE21
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PE22
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PE23
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PE24
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PE25
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PE26
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PE27
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PE28
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)
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//go:inline
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func (p Pin) reg() (*nxp.GPIO_Type, *volatile.Register32, uint8) {
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var gpio *nxp.GPIO_Type
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var pcr *nxp.PORT_Type
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if p < 32 {
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gpio, pcr = nxp.GPIOA, nxp.PORTA
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} else if p < 64 {
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gpio, pcr = nxp.GPIOB, nxp.PORTB
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} else if p < 96 {
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gpio, pcr = nxp.GPIOC, nxp.PORTC
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} else if p < 128 {
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gpio, pcr = nxp.GPIOD, nxp.PORTD
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} else if p < 160 {
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gpio, pcr = nxp.GPIOE, nxp.PORTE
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} else {
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panic("invalid pin number")
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}
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return gpio, &(*[32]volatile.Register32)(unsafe.Pointer(pcr))[p%32], uint8(p % 32)
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}
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// Configure this pin with the given configuration.
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func (p Pin) Configure(config PinConfig) {
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gpio, pcr, pos := p.reg()
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switch config.Mode {
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case PinOutput:
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gpio.PDDR.SetBits(1 << pos)
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pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos) | nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_DSE)
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case PinOutputOpenDrain:
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gpio.PDDR.SetBits(1 << pos)
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pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos) | nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_DSE | nxp.PORT_PCR0_ODE)
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case PinInput:
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gpio.PDDR.ClearBits(1 << pos)
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pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos))
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case PinInputPullUp:
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gpio.PDDR.ClearBits(1 << pos)
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pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos) | nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS)
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case PinInputPullDown:
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gpio.PDDR.ClearBits(1 << pos)
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pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos) | nxp.PORT_PCR0_PE)
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case PinDisable:
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gpio.PDDR.ClearBits(1 << pos)
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pcr.Set((0 << nxp.PORT_PCR0_MUX_Pos))
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}
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}
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// Set changes the value of the GPIO pin. The pin must be configured as output.
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func (p Pin) Set(value bool) {
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gpio, _, pos := p.reg()
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if value {
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gpio.PSOR.Set(1 << pos)
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} else {
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gpio.PCOR.Set(1 << pos)
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}
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}
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// Get returns the current value of a GPIO pin.
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func (p Pin) Get() bool {
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gpio, _, pos := p.reg()
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return gpio.PDIR.HasBits(1 << pos)
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}
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func (p Pin) Control() *volatile.Register32 {
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_, pcr, _ := p.reg()
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return pcr
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}
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func (p Pin) Fast() FastPin {
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gpio, _, pos := p.reg()
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return FastPin{
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PDOR: gpio.PDOR.Bit(pos),
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PSOR: gpio.PSOR.Bit(pos),
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PCOR: gpio.PCOR.Bit(pos),
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PTOR: gpio.PTOR.Bit(pos),
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PDIR: gpio.PDIR.Bit(pos),
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PDDR: gpio.PDDR.Bit(pos),
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}
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}
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|
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type FastPin struct {
|
||||
PDOR *volatile.BitRegister
|
||||
PSOR *volatile.BitRegister
|
||||
@@ -16,58 +277,6 @@ type FastPin struct {
|
||||
PDDR *volatile.BitRegister
|
||||
}
|
||||
|
||||
type pin struct {
|
||||
Bit uint8
|
||||
PCR *volatile.Register32
|
||||
GPIO *nxp.GPIO_Type
|
||||
}
|
||||
|
||||
// Configure this pin with the given configuration.
|
||||
func (p Pin) Configure(config PinConfig) {
|
||||
switch config.Mode {
|
||||
case PinInput:
|
||||
panic("todo")
|
||||
|
||||
case PinOutput:
|
||||
r := p.reg()
|
||||
r.GPIO.PDDR.SetBits(1 << r.Bit)
|
||||
r.PCR.SetBits(nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_DSE | nxp.PORT_PCR0_MUX(1))
|
||||
r.PCR.ClearBits(nxp.PORT_PCR0_ODE)
|
||||
}
|
||||
}
|
||||
|
||||
// Set changes the value of the GPIO pin. The pin must be configured as output.
|
||||
func (p Pin) Set(value bool) {
|
||||
r := p.reg()
|
||||
if value {
|
||||
r.GPIO.PSOR.Set(1 << r.Bit)
|
||||
} else {
|
||||
r.GPIO.PCOR.Set(1 << r.Bit)
|
||||
}
|
||||
}
|
||||
|
||||
// Get returns the current value of a GPIO pin.
|
||||
func (p Pin) Get() bool {
|
||||
r := p.reg()
|
||||
return r.GPIO.PDIR.HasBits(1 << r.Bit)
|
||||
}
|
||||
|
||||
func (p Pin) Control() *volatile.Register32 {
|
||||
return p.reg().PCR
|
||||
}
|
||||
|
||||
func (p Pin) Fast() FastPin {
|
||||
r := p.reg()
|
||||
return FastPin{
|
||||
PDOR: r.GPIO.PDOR.Bit(r.Bit),
|
||||
PSOR: r.GPIO.PSOR.Bit(r.Bit),
|
||||
PCOR: r.GPIO.PCOR.Bit(r.Bit),
|
||||
PTOR: r.GPIO.PTOR.Bit(r.Bit),
|
||||
PDIR: r.GPIO.PDIR.Bit(r.Bit),
|
||||
PDDR: r.GPIO.PDDR.Bit(r.Bit),
|
||||
}
|
||||
}
|
||||
|
||||
func (p FastPin) Set() { p.PSOR.Set(true) }
|
||||
func (p FastPin) Clear() { p.PCOR.Set(true) }
|
||||
func (p FastPin) Toggle() { p.PTOR.Set(true) }
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
// +build avr nrf sam sifive stm32 k210
|
||||
// +build avr nrf sam sifive stm32 k210 nxp
|
||||
|
||||
package machine
|
||||
|
||||
|
||||
+147
-93
@@ -1,3 +1,32 @@
|
||||
// Derivative work of Teensyduino Core Library
|
||||
// http://www.pjrc.com/teensy/
|
||||
// Copyright (c) 2017 PJRC.COM, LLC.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining
|
||||
// a copy of this software and associated documentation files (the
|
||||
// "Software"), to deal in the Software without restriction, including
|
||||
// without limitation the rights to use, copy, modify, merge, publish,
|
||||
// distribute, sublicense, and/or sell copies of the Software, and to
|
||||
// permit persons to whom the Software is furnished to do so, subject to
|
||||
// the following conditions:
|
||||
//
|
||||
// 1. The above copyright notice and this permission notice shall be
|
||||
// included in all copies or substantial portions of the Software.
|
||||
//
|
||||
// 2. If the Software is incorporated into a build system that allows
|
||||
// selection among a list of target devices, then similar target
|
||||
// devices manufactured by PJRC.COM must be included in the list of
|
||||
// target devices and selectable in the same manner.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
// NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
// ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
// CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
// SOFTWARE.
|
||||
|
||||
// +build nxp,mk66f18
|
||||
|
||||
package machine
|
||||
@@ -6,6 +35,7 @@ import (
|
||||
"device/arm"
|
||||
"device/nxp"
|
||||
"errors"
|
||||
"runtime/interrupt"
|
||||
"runtime/volatile"
|
||||
|
||||
_ "unsafe" // for go:linkname
|
||||
@@ -18,6 +48,10 @@ const (
|
||||
uartC2TXInactive = uartC2Enable
|
||||
|
||||
uartIRQPriority = 64
|
||||
|
||||
// determined from UARTx_PFIFO
|
||||
uartRXFIFODepth = 8
|
||||
uartTXFIFODepth = 8
|
||||
)
|
||||
|
||||
var (
|
||||
@@ -25,61 +59,81 @@ var (
|
||||
ErrNotConfigured = errors.New("device has not been configured")
|
||||
)
|
||||
|
||||
type UARTConfig struct {
|
||||
BaudRate uint32
|
||||
//go:linkname gosched runtime.Gosched
|
||||
func gosched()
|
||||
|
||||
// PutcharUART writes a byte to the UART synchronously, without using interrupts
|
||||
// or calling the scheduler
|
||||
func PutcharUART(u UART, c byte) {
|
||||
// ensure the UART has been configured
|
||||
if !u.SCGC.HasBits(u.SCGCMask) {
|
||||
u.configure(UARTConfig{}, false)
|
||||
}
|
||||
|
||||
for u.TCFIFO.Get() > 0 {
|
||||
// busy wait
|
||||
}
|
||||
u.D.Set(c)
|
||||
u.C2.Set(uartC2TXActive)
|
||||
}
|
||||
|
||||
type UART struct {
|
||||
// PollUART manually checks a UART status and calls the ISR. This should only be
|
||||
// called by runtime.abort.
|
||||
func PollUART(u UART) {
|
||||
if u.SCGC.HasBits(u.SCGCMask) {
|
||||
u.handleStatusInterrupt(u.Interrupt)
|
||||
}
|
||||
}
|
||||
|
||||
type UART = *UARTData
|
||||
|
||||
type UARTData struct {
|
||||
*nxp.UART_Type
|
||||
RXPCR *volatile.Register32
|
||||
TXPCR *volatile.Register32
|
||||
SCGC *volatile.Register32
|
||||
SCGCMask uint32
|
||||
IRQNumber uint32
|
||||
SCGC *volatile.Register32
|
||||
SCGCMask uint32
|
||||
|
||||
DefaultRX Pin
|
||||
DefaultTX Pin
|
||||
|
||||
// state
|
||||
RXBuffer RingBuffer
|
||||
Buffer RingBuffer // RX Buffer
|
||||
TXBuffer RingBuffer
|
||||
Configured bool
|
||||
Transmitting volatile.Register8
|
||||
Interrupt interrupt.Interrupt
|
||||
}
|
||||
|
||||
// 'UART0' in the K66 manual corresponds to 'UART1' on the Teensy's pinout
|
||||
var UART1 = UART{UART_Type: nxp.UART0, RXPCR: pins[0].PCR, TXPCR: pins[1].PCR, SCGC: &nxp.SIM.SCGC4, SCGCMask: nxp.SIM_SCGC4_UART0, IRQNumber: nxp.IRQ_UART0_RX_TX}
|
||||
var UART2 = UART{UART_Type: nxp.UART1, RXPCR: pins[9].PCR, TXPCR: pins[10].PCR, SCGC: &nxp.SIM.SCGC4, SCGCMask: nxp.SIM_SCGC4_UART1, IRQNumber: nxp.IRQ_UART1_RX_TX}
|
||||
var UART3 = UART{UART_Type: nxp.UART2, RXPCR: pins[7].PCR, TXPCR: pins[8].PCR, SCGC: &nxp.SIM.SCGC4, SCGCMask: nxp.SIM_SCGC4_UART2, IRQNumber: nxp.IRQ_UART2_RX_TX}
|
||||
var UART4 = UART{UART_Type: nxp.UART3, RXPCR: pins[31].PCR, TXPCR: pins[32].PCR, SCGC: &nxp.SIM.SCGC4, SCGCMask: nxp.SIM_SCGC4_UART3, IRQNumber: nxp.IRQ_UART3_RX_TX}
|
||||
var UART5 = UART{UART_Type: nxp.UART4, RXPCR: pins[34].PCR, TXPCR: pins[33].PCR, SCGC: &nxp.SIM.SCGC1, SCGCMask: nxp.SIM_SCGC1_UART4, IRQNumber: nxp.IRQ_UART4_RX_TX}
|
||||
var UART0 = UARTData{UART_Type: nxp.UART0, SCGC: &nxp.SIM.SCGC4, SCGCMask: nxp.SIM_SCGC4_UART0, DefaultRX: defaultUART0RX, DefaultTX: defaultUART0TX}
|
||||
var UART1 = UARTData{UART_Type: nxp.UART1, SCGC: &nxp.SIM.SCGC4, SCGCMask: nxp.SIM_SCGC4_UART1, DefaultRX: defaultUART1RX, DefaultTX: defaultUART1TX}
|
||||
var UART2 = UARTData{UART_Type: nxp.UART2, SCGC: &nxp.SIM.SCGC4, SCGCMask: nxp.SIM_SCGC4_UART2, DefaultRX: defaultUART2RX, DefaultTX: defaultUART2TX}
|
||||
var UART3 = UARTData{UART_Type: nxp.UART3, SCGC: &nxp.SIM.SCGC4, SCGCMask: nxp.SIM_SCGC4_UART3, DefaultRX: defaultUART3RX, DefaultTX: defaultUART3TX}
|
||||
var UART4 = UARTData{UART_Type: nxp.UART4, SCGC: &nxp.SIM.SCGC1, SCGCMask: nxp.SIM_SCGC1_UART4, DefaultRX: defaultUART4RX, DefaultTX: defaultUART4TX}
|
||||
|
||||
//go:export UART0_RX_TX_IRQHandler
|
||||
func uart0StatusISR() { UART1.handleStatusInterrupt() }
|
||||
|
||||
//go:export UART1_RX_TX_IRQHandler
|
||||
func uart1StatusISR() { UART2.handleStatusInterrupt() }
|
||||
|
||||
//go:export UART2_RX_TX_IRQHandler
|
||||
func uart2StatusISR() { UART3.handleStatusInterrupt() }
|
||||
|
||||
//go:export UART3_RX_TX_IRQHandler
|
||||
func uart3StatusISR() { UART4.handleStatusInterrupt() }
|
||||
|
||||
//go:export UART4_RX_TX_IRQHandler
|
||||
func uart4StatusISR() { UART5.handleStatusInterrupt() }
|
||||
func init() {
|
||||
UART0.Interrupt = interrupt.New(nxp.IRQ_UART0_RX_TX, UART0.handleStatusInterrupt)
|
||||
UART1.Interrupt = interrupt.New(nxp.IRQ_UART1_RX_TX, UART1.handleStatusInterrupt)
|
||||
UART2.Interrupt = interrupt.New(nxp.IRQ_UART2_RX_TX, UART2.handleStatusInterrupt)
|
||||
UART3.Interrupt = interrupt.New(nxp.IRQ_UART3_RX_TX, UART3.handleStatusInterrupt)
|
||||
UART4.Interrupt = interrupt.New(nxp.IRQ_UART4_RX_TX, UART4.handleStatusInterrupt)
|
||||
}
|
||||
|
||||
// Configure the UART.
|
||||
func (u *UART) Configure(config UARTConfig) {
|
||||
en := u.SCGC.HasBits(u.SCGCMask)
|
||||
func (u UART) Configure(config UARTConfig) {
|
||||
u.configure(config, true)
|
||||
}
|
||||
|
||||
// adapted from Teensy core's serial_begin
|
||||
func (u UART) configure(config UARTConfig, canSched bool) {
|
||||
// from: serial_begin
|
||||
|
||||
if !en {
|
||||
if !u.Configured {
|
||||
u.Transmitting.Set(0)
|
||||
|
||||
// turn on the clock
|
||||
u.SCGC.Set(u.SCGCMask)
|
||||
|
||||
// configure pins
|
||||
u.RXPCR.Set(nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS | nxp.PORT_PCR0_PFE | nxp.PORT_PCR0_MUX(3))
|
||||
u.TXPCR.Set(nxp.PORT_PCR0_DSE | nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_MUX(3))
|
||||
u.DefaultRX.Control().Set(nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS | nxp.PORT_PCR0_PFE | (3 << nxp.PORT_PCR0_MUX_Pos))
|
||||
u.DefaultTX.Control().Set(nxp.PORT_PCR0_DSE | nxp.PORT_PCR0_SRE | (3 << nxp.PORT_PCR0_MUX_Pos))
|
||||
u.C1.Set(nxp.UART_C1_ILT)
|
||||
}
|
||||
|
||||
@@ -89,14 +143,20 @@ func (u *UART) Configure(config UARTConfig) {
|
||||
}
|
||||
|
||||
// copied from teensy core's BAUD2DIV macro
|
||||
divisor := ((CPUFrequency() * 2) + ((config.BaudRate) >> 1)) / config.BaudRate
|
||||
divisor := ((CPUFrequency() * 2) + (config.BaudRate >> 1)) / config.BaudRate
|
||||
if divisor < 32 {
|
||||
divisor = 32
|
||||
}
|
||||
|
||||
if en {
|
||||
if u.Configured {
|
||||
// don't change baud rate mid transmit
|
||||
u.Flush()
|
||||
if canSched {
|
||||
u.Flush()
|
||||
} else {
|
||||
for u.Transmitting.Get() != 0 {
|
||||
// busy wait flush
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// set the divisor
|
||||
@@ -104,23 +164,27 @@ func (u *UART) Configure(config UARTConfig) {
|
||||
u.BDL.Set(uint8((divisor >> 5) & 0xFF))
|
||||
u.C4.Set(uint8(divisor & 0x1F))
|
||||
|
||||
if !en {
|
||||
if !u.Configured {
|
||||
u.Configured = true
|
||||
|
||||
u.C1.Set(nxp.UART_C1_ILT)
|
||||
|
||||
// configure TX and RX watermark
|
||||
u.TWFIFO.Set(2) // causes bit TDRE of S1 to set
|
||||
u.RWFIFO.Set(4) // causes bit RDRF of S1 to set
|
||||
|
||||
// enable FIFOs
|
||||
u.PFIFO.Set(nxp.UART_PFIFO_TXFE | nxp.UART_PFIFO_RXFE)
|
||||
u.C2.Set(uartC2TXInactive)
|
||||
|
||||
arm.SetPriority(u.IRQNumber, uartIRQPriority)
|
||||
arm.EnableIRQ(u.IRQNumber)
|
||||
// setup interrupts
|
||||
u.C2.Set(uartC2TXInactive)
|
||||
u.Interrupt.SetPriority(uartIRQPriority)
|
||||
u.Interrupt.Enable()
|
||||
}
|
||||
}
|
||||
|
||||
func (u *UART) Disable() {
|
||||
// adapted from Teensy core's serial_end
|
||||
func (u UART) Disable() {
|
||||
// from: serial_end
|
||||
|
||||
// check if the device has been enabled already
|
||||
if !u.SCGC.HasBits(u.SCGCMask) {
|
||||
@@ -129,27 +193,29 @@ func (u *UART) Disable() {
|
||||
|
||||
u.Flush()
|
||||
|
||||
arm.DisableIRQ(u.IRQNumber)
|
||||
u.Interrupt.Disable()
|
||||
u.C2.Set(0)
|
||||
|
||||
// reconfigure pin
|
||||
u.RXPCR.Set(nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS | nxp.PORT_PCR0_MUX(1))
|
||||
u.TXPCR.Set(nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS | nxp.PORT_PCR0_MUX(1))
|
||||
u.DefaultRX.Configure(PinConfig{Mode: PinInputPullUp})
|
||||
u.DefaultTX.Configure(PinConfig{Mode: PinInputPullUp})
|
||||
|
||||
// clear flags
|
||||
u.S1.Get()
|
||||
u.D.Get()
|
||||
u.RXBuffer.Clear()
|
||||
u.Buffer.Clear()
|
||||
}
|
||||
|
||||
func (u *UART) Flush() {
|
||||
func (u UART) Flush() {
|
||||
for u.Transmitting.Get() != 0 {
|
||||
// gosched()
|
||||
gosched()
|
||||
}
|
||||
}
|
||||
|
||||
// adapted from Teensy core's uart0_status_isr
|
||||
func (u *UART) handleStatusInterrupt() {
|
||||
func (u UART) handleStatusInterrupt(interrupt.Interrupt) {
|
||||
// from: uart0_status_isr
|
||||
|
||||
// receive
|
||||
if u.S1.HasBits(nxp.UART_S1_RDRF | nxp.UART_S1_IDLE) {
|
||||
intrs := arm.DisableInterrupts()
|
||||
avail := u.RCFIFO.Get()
|
||||
@@ -177,7 +243,7 @@ func (u *UART) handleStatusInterrupt() {
|
||||
arm.EnableInterrupts(intrs)
|
||||
|
||||
for {
|
||||
u.RXBuffer.Put(u.D.Get())
|
||||
u.Buffer.Put(u.D.Get())
|
||||
avail--
|
||||
if avail <= 0 {
|
||||
break
|
||||
@@ -186,66 +252,54 @@ func (u *UART) handleStatusInterrupt() {
|
||||
}
|
||||
}
|
||||
|
||||
c := u.C2.Get()
|
||||
if c&nxp.UART_C2_TIE != 0 && u.S1.HasBits(nxp.UART_S1_TDRE) {
|
||||
for {
|
||||
n, ok := u.TXBuffer.Get()
|
||||
if !ok {
|
||||
break
|
||||
}
|
||||
// transmit
|
||||
if u.C2.HasBits(nxp.UART_C2_TIE) && u.S1.HasBits(nxp.UART_S1_TDRE) {
|
||||
data := make([]byte, 0, uartTXFIFODepth)
|
||||
avail := uartTXFIFODepth - u.TCFIFO.Get()
|
||||
|
||||
u.S1.Get()
|
||||
u.D.Set(n)
|
||||
|
||||
if u.TCFIFO.Get() >= 8 {
|
||||
// get avail bytes from ring buffer
|
||||
for len(data) < int(avail) {
|
||||
if b, ok := u.TXBuffer.Get(); ok {
|
||||
data = append(data, b)
|
||||
} else {
|
||||
break
|
||||
}
|
||||
}
|
||||
|
||||
// write data to FIFO
|
||||
l := len(data)
|
||||
for i, b := range data {
|
||||
if i == l-1 {
|
||||
// only clear TDRE on last write, per the manual
|
||||
u.S1.Get()
|
||||
}
|
||||
u.D.Set(b)
|
||||
}
|
||||
|
||||
// if FIFO still has room, disable TIE, enable TCIE
|
||||
if u.S1.HasBits(nxp.UART_S1_TDRE) {
|
||||
u.Transmitting.Set(0)
|
||||
u.C2.Set(uartC2TXCompleting)
|
||||
}
|
||||
}
|
||||
|
||||
if c&nxp.UART_C2_TCIE != 0 && u.S1.HasBits(nxp.UART_S1_TC) {
|
||||
// transmit complete
|
||||
if u.C2.HasBits(nxp.UART_C2_TCIE) && u.S1.HasBits(nxp.UART_S1_TC) {
|
||||
u.Transmitting.Set(0)
|
||||
u.C2.Set(uartC2TXInactive)
|
||||
}
|
||||
}
|
||||
|
||||
//go:linkname gosched runtime.Gosched
|
||||
func gosched()
|
||||
|
||||
// WriteByte writes a byte of data to the UART.
|
||||
func (u *UART) WriteByte(c byte) error {
|
||||
if !u.SCGC.HasBits(u.SCGCMask) {
|
||||
func (u UART) WriteByte(c byte) error {
|
||||
if !u.Configured {
|
||||
return ErrNotConfigured
|
||||
}
|
||||
|
||||
for !u.S1.HasBits(nxp.UART_S1_TDRE) {
|
||||
for !u.TXBuffer.Put(c) {
|
||||
gosched()
|
||||
}
|
||||
u.D.Set(c)
|
||||
|
||||
// // wait for room on the buffer
|
||||
// for !u.TXBuffer.Put(c) {
|
||||
// gosched()
|
||||
// }
|
||||
|
||||
// var wrote bool
|
||||
// for u.S1.HasBits(nxp.UART_S1_TDRE) {
|
||||
// n, ok := u.TXBuffer.Get()
|
||||
// if ok {
|
||||
// u.D.Set(n)
|
||||
// wrote = true
|
||||
// } else {
|
||||
// break
|
||||
// }
|
||||
// }
|
||||
|
||||
// if wrote {
|
||||
// u.Transmitting.Set(1)
|
||||
// u.C2.Set(uartC2TXActive)
|
||||
// }
|
||||
u.Transmitting.Set(1)
|
||||
u.C2.Set(uartC2TXActive)
|
||||
return nil
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user