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esp32s3: fix register-window corruption under interrupt load
Remove the C3 bluetooth hook addresses from esp32s3.ld (on the S3 they point into the ROM md5/crc thunk table, and being bare assignments they also shadowed the blob's own definitions), keep the interrupt frame clear of the 16-byte windowed-ABI save area below SP, and make tinygo_swapTask hold INTLEVEL across the stack switch while keeping the running frame's WINDOWSTART bit set. Signed-off-by: deadprogram <ron@hybridgroup.com>
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@@ -299,13 +299,37 @@ _handle_kernel_exc:
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.global _handle_level1
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_handle_level1:
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// --- allocate 96-byte exception frame on the interrupted stack ---
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// --- EXCCAUSE 5 (alloca / MOVSP) is not a fault, it is a request ---
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//
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// MOVSP raises this whenever it moves the stack pointer while the caller's
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// register window is still live in the register file: the hardware is
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// asking us to spill that window, not reporting an error. LLVM emits MOVSP
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// for any call that needs a 7th argument on the stack (the windowed ABI
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// passes six in registers), so it shows up in ordinary C and Go code alike.
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//
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// Without this, such a call takes a fatal user exception. The check goes
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// first, before any state is touched, so a0 is still in EXCSAVE1 where
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// _xt_alloca_exc wants it and every other cause falls through to the
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// handler below completely unchanged.
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rsr a0, EXCCAUSE
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bnei a0, 5, 1f
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j _xt_alloca_exc
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1:
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rsr a0, EXCSAVE1 // restore a0 clobbered by the EXCCAUSE read
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// --- allocate the exception frame on the interrupted stack ---
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// Layout (offsets from a1 after adjustment):
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// 0: a0 4: a1(orig) 8: a2 12: a3 16: a4 20: a5
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// 24: a6 28: a7 32: a8 36: a9 40: a10 44: a11
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// 48: a12 52: a13 56: a14 60: a15
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// 64: SAR 68: EPC1 72: PS
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addi a0, a1, -96 // a0 = new frame pointer
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// 64: SAR 68: EPC1 72: PS 76: WINDOWBASE 80: WINDOWSTART
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//
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// 128, not the 88 the layout needs: the 16 bytes below the interrupted SP
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// are the windowed-ABI caller save area, written by window overflow and
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// read back by underflow. Clobbering them corrupts the interrupted code's
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// a0, which surfaces later as an Illegal Instruction on its retw. ESP-IDF
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// reserves the same gap (the 0x20 in XT_STK_FRMSZ).
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addi a0, a1, -128 // a0 = new frame pointer
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s32i a1, a0, 4 // save original a1 (SP)
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mov a1, a0 // a1 = frame pointer
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@@ -339,6 +363,15 @@ _handle_level1:
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// level-1 interrupts.
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rsr a2, PS
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s32i a2, a1, 72 // save PS (with EXCM=1 set by hardware)
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// Window state as it was at the fault. Reading it from the C handler
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// instead describes the handler: getting there costs a callx4, and the
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// printfs rotate and spill windows of their own.
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rsr a3, WINDOWBASE
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s32i a3, a1, 76
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rsr a3, WINDOWSTART
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s32i a3, a1, 80
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movi a3, ~0x1F // mask: clear INTLEVEL (bits 0-3) + EXCM (bit 4)
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and a2, a2, a3
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movi a3, 1 // INTLEVEL = 1
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@@ -412,6 +445,52 @@ _handle_level1:
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rfe
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// -----------------------------------------------------------------------
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// Alloca (MOVSP) exception handler.
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//
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// Rotates back to the window that executed MOVSP, fixes up PS.OWB to match
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// the new WINDOWBASE, and falls into the window underflow handler that
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// corresponds to the caller's call size. The underflow handler spills the
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// window and returns to the interrupted MOVSP via rfwu, which then completes.
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//
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// All of the interruptee's registers are intact except a0, which is in
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// EXCSAVE1. PS.EXCM is set by the hardware, so this cannot be interrupted.
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// The registers of the base-save area are free scratch here, because taking
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// this exception means they have already been spilled and the underflow
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// handler will restore them.
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// -----------------------------------------------------------------------
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.balign 4
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.global _xt_alloca_exc
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_xt_alloca_exc:
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rsr a0, WINDOWBASE // grab WINDOWBASE before rotw changes it
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rotw -1 // WINDOWBASE goes to a4, new a0-a3 are scratch
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rsr a2, PS
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extui a3, a2, 8, 4 // a3 = PS.OWB (shift 8, 4 bits)
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xor a3, a3, a4 // bits that changed from old to current WB
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rsr a4, EXCSAVE1 // restore the interruptee's a0 (now in a4)
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slli a3, a3, 8
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xor a2, a2, a3 // flip those bits in PS.OWB
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wsr a2, PS // PS.OWB now matches the new WINDOWBASE
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rsync
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// Dispatch on the call size encoded in the interruptee's return address:
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// bits 31:30 of a0 are 00/01 for call4, 10 for call8, 11 for call12.
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//
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// The canonical sequence branches straight to the underflow vectors with
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// _bbci.l, but that has only an 8-bit displacement and this handler lives
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// outside the vector table, well out of reach. Inverting each test and
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// putting the vector target on a full-range `j` is the same dispatch
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// without the range limit.
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_bbsi.l a4, 31, 1f
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j _window_underflow4
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1:
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rotw -1 // interruptee's a0 moves to a8
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_bbsi.l a8, 30, 2f
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j _window_underflow8
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2:
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rotw -1
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j _window_underflow12
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// -----------------------------------------------------------------------
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// Default weak espradio_user_exception: infinite loop halt.
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// Overridden by the strong definition in espradio's isr.c when linked.
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+1017
-2
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