riscv: refactor assembly files to support RV64 and F extension

targets/k210.json

@@ -1,5 +1,6 @@
 {
 	"inherits": ["riscv64"],
 	"features": ["+a", "+c", "+m", "+f", "+d"],
-	"build-tags": ["k210", "kendryte"]
+	"build-tags": ["k210", "kendryte"],
+	"cflags": ["-D=F_EXTENSION"]
 }

targets/riscv.json

@@ -17,7 +17,9 @@
 		"--gc-sections"
 	],
 	"extra-files": [
-		"src/device/riscv/start.S"
+		"src/device/riscv/start.S",
+		"src/runtime/scheduler_tinygoriscv.S",
+		"src/device/riscv/handleinterrupt.S"
 	],
 	"gdb": "riscv64-unknown-elf-gdb"
 }

targets/riscv32.json

@@ -9,9 +9,5 @@
 	],
 	"ldflags": [
 		"-melf32lriscv"
-	],
-	"extra-files": [
-		"src/runtime/scheduler_tinygoriscv.S",
-		"src/device/riscv/handleinterrupt32.S"
 	]
 }

targets/riscv64.json

@@ -5,13 +5,10 @@
 	"cflags": [
 		"--target=riscv64--none",
 		"-march=rv64gc",
-		"-mabi=lp64"
+		"-mabi=lp64",
+		"-D=RV64"
 	],
 	"ldflags": [
 		"-melf64lriscv"
-	],
-	"extra-files": [
-		"src/runtime/scheduler_tinygoriscv64.S",
-		"src/device/riscv/handleinterrupt64.S"
 	]
 }