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riscv: refactor assembly files to support RV64 and F extension

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This commit is contained in:
Yannis Huber
2020-07-01 23:26:33 +02:00
committed by Ron Evans
parent 66b21b4c86
commit 43a66b39cc
9 changed files with 163 additions and 147 deletions
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src/runtime/scheduler_tinygoriscv.S
+26 -16
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@@ -1,32 +1,42 @@
#ifdef RV64
#define REGSIZE 8
#define SREG sd
#define LREG ld
#else
#define REGSIZE 4
#define SREG sw
#define LREG lw
#endif
.section .text.tinygo_scanCurrentStack
.global tinygo_scanCurrentStack
.type tinygo_scanCurrentStack, %function
tinygo_scanCurrentStack:
// Push callee-saved registers onto the stack.
addi sp, sp, -64
sw ra, 60(sp)
sw s11, 56(sp)
sw s10, 52(sp)
sw s9, 48(sp)
sw s8, 44(sp)
sw s7, 40(sp)
sw s6, 36(sp)
sw s5, 32(sp)
sw s4, 28(sp)
sw s3, 24(sp)
sw s2, 20(sp)
sw s1, 16(sp)
sw s0, 12(sp)
addi sp, sp, -13*REGSIZE
SREG ra, 0*REGSIZE(sp)
SREG s11, 1*REGSIZE(sp)
SREG s10, 2*REGSIZE(sp)
SREG s9, 3*REGSIZE(sp)
SREG s8, 4*REGSIZE(sp)
SREG s7, 5*REGSIZE(sp)
SREG s6, 6*REGSIZE(sp)
SREG s5, 7*REGSIZE(sp)
SREG s4, 8*REGSIZE(sp)
SREG s3, 9*REGSIZE(sp)
SREG s2, 10*REGSIZE(sp)
SREG s1, 11*REGSIZE(sp)
SREG s0, 12*REGSIZE(sp)
// Scan the stack.
mv a0, sp
call tinygo_scanstack
// Restore return address.
lw ra, 60(sp)
LREG ra, 0(sp)
// Restore stack state.
addi sp, sp, 64
addi sp, sp, 13*REGSIZE
// Return to the caller.
ret
src/runtime/scheduler_tinygoriscv64.S
-32
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@@ -1,32 +0,0 @@
.section .text.tinygo_scanCurrentStack
.global tinygo_scanCurrentStack
.type tinygo_scanCurrentStack, %function
tinygo_scanCurrentStack:
// Push callee-saved registers onto the stack.
addi sp, sp, -104
sd ra, 96(sp)
sd s11, 88(sp)
sd s10, 80(sp)
sd s9, 72(sp)
sd s8, 64(sp)
sd s7, 56(sp)
sd s6, 48(sp)
sd s5, 40(sp)
sd s4, 32(sp)
sd s3, 24(sp)
sd s2, 16(sp)
sd s1, 8(sp)
sd s0, 0(sp)
// Scan the stack.
mv a0, sp
call tinygo_scanstack
// Restore return address.
ld ra, 96(sp)
// Restore stack state.
addi sp, sp, 104
// Return to the caller.
ret