Add RP2350 support (#4459)

machine/rp2350: add support

* add linker scripts for rp2350
* add bootloader
* begin melding rp2040 and rp2350 APIs
* add UART
* add rp2350 boot patching
* Fix RP2350 memory layout (#4626)
* Remove rp2040-style second stage bootloader.
* Add 'minimum viable' IMAGE_DEF embedded block
* Create a pico2 specific target
* Implement rp2350 init, clock, and uart support
* Merge rp2 reset code back together
* Separate chip-specific clock definitions
* Clear pad isolation bit on rp2350
* Init UART in rp2350 runtime
* Correct usb/serial initialization order
* Implement jump-to-bootloader
* test: add pico2 to smoketests

---------

Signed-off-by: deadprogram <ron@hybridgroup.com>
Co-authored-by: Matthew Mets <matt.mets@cibomahto.com>
Co-authored-by: Matt Mets <matt@blinkinlabs.com>
Co-authored-by: deadprogram <ron@hybridgroup.com>

targets/arm.ld

@@ -9,6 +9,7 @@ SECTIONS
     .text :
     {
         KEEP(*(.isr_vector))
+        KEEP(*(.after_isr_vector)) /* for the RP2350 */
         *(.text)
         *(.text.*)
         *(.rodata)

targets/pico2.json

@@ -0,0 +1,7 @@
+{
+    "inherits": [
+        "rp2350"
+    ],
+    "build-tags": ["pico2"],
+    "serial-port": ["2e8a:000A"]
+}

targets/rp2350.json

@@ -0,0 +1,19 @@
+{
+    "inherits": ["cortex-m33"],
+    "build-tags": ["rp2350", "rp"],
+    "flash-1200-bps-reset": "true",
+    "flash-method": "msd",
+    "serial": "usb",
+    "msd-volume-name": ["RP2350"],
+    "msd-firmware-name": "firmware.uf2",
+    "binary-format": "uf2",
+    "uf2-family-id": "0xe48bff59","comment":"See page 393 of RP2350 datasheet: RP2350 Arm Secure image (i.e. one intended to be booted directly by the bootrom)",
+    "extra-files": [
+        "src/device/rp/rp2350.s",
+        "targets/rp2350_embedded_block.s"
+    ],
+    "linkerscript": "targets/rp2350.ld",
+    "openocd-interface": "picoprobe",
+    "openocd-transport": "swd",
+    "openocd-target": "rp2350"
+}

targets/rp2350.ld

@@ -0,0 +1,23 @@
+/* See Rust for a more complete reference: https://github.com/rp-rs/rp-hal/blob/main/rp235x-hal-examples/memory.x */
+MEMORY
+{
+   /* 2MiB safe default.  */
+    FLASH : ORIGIN = 0x10000000, LENGTH = 2048k
+    /* RAM consists of 8 banks, SRAM0..SRAM7 with striped mapping. */
+    SRAM : ORIGIN = 0x20000000, LENGTH = 512k
+    /* Banks 8 and 9 use direct mapping which can be
+       specailized for applications where predictable access time is beneficial.
+       i.e: Separate stacks for core0 and core1. */
+    SRAM4 : ORIGIN = 0x20080000, LENGTH = 4k
+    SRAM5 : ORIGIN = 0x20081000, LENGTH = 4k
+    FLASH_TEXT (rx) : ORIGIN = 0x10000000, LENGTH = 2048k
+    RAM (rwx)       : ORIGIN = 0x20000000, LENGTH = 512k
+}
+
+_stack_size = 2K;
+
+SECTIONS
+{
+}
+
+INCLUDE "targets/arm.ld"

targets/rp2350_embedded_block.s

@@ -0,0 +1,10 @@
+// Minimum viable block image from datasheet section 5.9.5.1, "Minimum Arm IMAGE_DEF"
+.section .after_isr_vector, "a"
+.p2align 2
+embedded_block:
+.word 0xffffded3
+.word 0x10210142
+.word 0x000001ff
+.word 0x00000000
+.word 0xab123579
+embedded_block_end: