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Split RISC-V targets into 32/64-bit

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This commit is contained in:
Yannis Huber
2020-06-01 16:39:05 +02:00
committed by Ron Evans
parent 875d36cba0
commit 34e0961a79
7 changed files with 20 additions and 71 deletions
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targets/maixbit.ld
+11
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@@ -0,0 +1,11 @@
MEMORY
{
RAM (xrw) : ORIGIN = 0xffffffff80000000, LENGTH = 6M
}
REGION_ALIAS("FLASH_TEXT", RAM);
_stack_size = 2K;
INCLUDE "targets/riscv.ld"